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1. 发明授权

US5426405A Family of different-sized demountable hybrid assemblies with microwave-bandwidth interconnects 失效
标题翻译：具有微波带宽互连的不同大小的可拆卸混合组合系列
公开(公告)号：US5426405A
公开(公告)日：1995-06-20
申请号：US366000
申请日：1994-12-29
申请人： Daniel J. Miller , Kim H. Chen , Lewis R. Dove , Vaddoarahalli K. Nagesh
发明人： Daniel J. Miller , Kim H. Chen , Lewis R. Dove , Vaddoarahalli K. Nagesh
IPC分类号： H01L23/50 , H01L23/40 , H01P1/02 , H01P3/08 , H01P5/08 , H05K1/00 , H05K1/02 , H05K1/14 , H05K3/32 , H05K3/34 , H05K3/36 , H01L23/32
CPC分类号： H01L23/66 , H01L23/4006 , H05K1/141 , H01L2023/405 , H01L2023/4062 , H01L2023/4087 , H01L2924/0002 , H01L2924/3011 , H05K1/0237 , H05K1/0243 , H05K1/0286 , H05K2201/10393 , H05K2201/10477 , H05K2201/10946 , H05K3/325 , H05K3/3421 , H05K3/368
摘要： A family of modular hybrid assemblies with high frequency interconnections is effected by a high frequency circuit assembly attached to a motherboard. Each assembly comprises standardized conducting elements and customizable transitions and circuit regions. The customizable transitions can be placed anywhere along the conducting element and are capable of low and high frequency performance. Attachment of the assembly can be effected via a standardized clamping structure which compresses an elastomeric member upon the conducting elements or by bending the conducting elements and soldering on end to attachment sites on the motherboard. Each member of the family of modular hybrid assemblies provides a controlled impedance transition from a transmission line on the circuit assembly to a transmission line on the motherboard.
摘要翻译：具有高频互连的一系列模块化混合组件由附接到母板的高频电路组件实现。每个组件包括标准化的导电元件和可定制的转变和电路区域。可定制的转换可以放置在导电元件的任何地方，并且能够实现低频和高频性能。组件的附接可以通过标准化的夹紧结构实现，该结构将弹性构件压缩在导电元件上，或通过弯曲导电元件并在端部焊接到主板上的附接位置。模块化混合组件系列的每个成员提供从电路组件上的传输线到主板上的传输线的受控阻抗转变。

2. 发明授权

US5161090A Heat pipe-electrical interconnect integration for chip modules 失效
标题翻译：用于芯片模块的热管 - 电气互连集成
公开(公告)号：US5161090A
公开(公告)日：1992-11-03
申请号：US806997
申请日：1991-12-13
申请人： Robert K. Crawford , Jacques Leibovitz , Daniel J. Miller , Kim H. Chen
发明人： Robert K. Crawford , Jacques Leibovitz , Daniel J. Miller , Kim H. Chen
IPC分类号： H01L23/427 , H01L23/538 , H01L25/065 , H05K7/20
CPC分类号： H01L25/0652 , H01L23/427 , H01L23/5385 , H01L2224/16235 , H01L2224/48227 , H01L2224/48472
摘要： Method and apparatus for controlling the temperature of one or more electrical component chips positioned on a face of a substrate and for providing component-to-component electrical interconnect traces between the chips. One or a selected set of electrical interconnections, contained within the substrate and connected to a chip, is also connected to a column of high electrical and thermal conductivity material within the substrate that is in direct thermal contact with the working fluid in a heat pipe. The heat pipe is sealed and is contained in the substrate interior and is in electrical and thermal contact with the electronic components on a chip. The heat pipe working fluid receives heat from the electronic components through the thermally conducting column, changes phase through absorption of this heat, and transports the heat to heat dissipation means located elsewhere.

3. 发明授权

US5199165A Heat pipe-electrical interconnect integration method for chip modules 失效
标题翻译：用于芯片模块的热管 - 电互连集成方法
公开(公告)号：US5199165A
公开(公告)日：1993-04-06
申请号：US925541
申请日：1992-08-05
申请人： Robert K. Crawford , Jacques Leibovitz , Daniel J. Miller , Kim H. Chen
发明人： Robert K. Crawford , Jacques Leibovitz , Daniel J. Miller , Kim H. Chen
IPC分类号： H01L23/427 , H01L23/538 , H01L25/065 , H05K7/20
CPC分类号： H01L25/0652 , H01L23/427 , H01L23/5385 , H01L2224/16225 , Y10T29/49155
摘要： Method and apparatus for controlling the temperature of one or more electrical component chips positioned on a face of a substrate and for providing component-to-component electrical interconnect traces between the chips. One or a selected set of electrical interconnections, contained within the substrate and connected to a chip, is also connected to a column of high electrical and thermal conductivity material within the substrate that is in direct thermal contact with the working fluid in a heat pipe. The heat pipe is sealed and is contained in the substrate interior and is in electrical and thermal contact with the electronic components on a chip. The heat pipe working fluid receives heat from the electronic components through the thermally conducting column, changes phase through absorption of this heat, and transports the heat to heat dissipation means located elsewhere.
摘要翻译：用于控制位于基板表面上的一个或多个电气元件芯片的温度并用于在芯片之间提供元件间组件电互连迹线的方法和装置。包含在衬底内并连接到芯片的一组或一组选定的电互连也连接到衬底内的高导热材料和与热管中的工作流体直接热接触的柱。热管被密封并且被包含在基板内部中并且与芯片上的电子部件电接触和热接触。热管工作流体通过导热塔从电子部件接收热量，通过吸收该热量来改变相位，并将热量输送到位于其他地方的散热装置。

4. 发明授权

US5155661A Aluminum nitride multi-chip module 失效
标题翻译：氮化铝多芯片模块
公开(公告)号：US5155661A
公开(公告)日：1992-10-13
申请号：US700784
申请日：1991-05-15
申请人： Voddarahalli K. Nagesh , Kim H. Chen
发明人： Voddarahalli K. Nagesh , Kim H. Chen
IPC分类号： H05K7/20 , H01L23/373 , H01L23/40 , H05K7/10
CPC分类号： H05K7/1061 , H01L23/3731 , H01L23/4006 , H01L2023/4062 , H01L2023/4087 , H01L2924/0002
摘要： A multi-chip module is configured using an aluminum nitride, or AlN, multi-chip substrate, sandwiched chip side down under an extruded aluminum convection cooled heat sink. An alignment ring includes grooves for control of z-axis elastomeric conductors slightly compressed between the chip connection surface of the substrate and the top surface of a PCB to provide the interconnections therebetween. The alignment ring includes a stopper portion which controls the height of the heat sink above the PCB as well as a smaller rail portion which controls the height of the substrate above the PCB. The good thermal conductivity, ruggedness and relatively good TCE match of the AlN substrate to the silicon chips permits a convenient, dense and thermally rugged MCM.
摘要翻译：多芯片模块使用氮化铝或AlN多芯片衬底，在挤压的铝对流冷却散热片下方夹着芯片侧面。对准环包括用于控制在基板的芯片连接表面和PCB的顶表面之间稍微压缩的z轴弹性体导体的凹槽，以提供它们之间的互连。对准环包括控制PCB上方的散热器的高度的止动部分以及控制PCB上方的基板的高度的较小的轨道部分。 AlN衬底与硅芯片的良好的导热性，坚固性和较好的TCE匹配能够使MCM方便，密集和耐热。

5. 发明授权

US5585671A Reliable low thermal resistance package for high power flip clip ICs 失效
标题翻译：适用于大功率倒装夹IC的可靠低热阻封装
公开(公告)号：US5585671A
公开(公告)日：1996-12-17
申请号：US319764
申请日：1994-10-07
申请人： Voddarahalli K. Nagesh , Kim H. Chen , Cheng-Cheng Chang , Bahram Afshari , Jacques Leibovitz
发明人： Voddarahalli K. Nagesh , Kim H. Chen , Cheng-Cheng Chang , Bahram Afshari , Jacques Leibovitz
IPC分类号： H01L23/367 , H01L23/373 , H01L23/10 , H01L23/34
CPC分类号： H01L23/3675 , H01L23/367 , H01L23/3737 , H01L2224/16225 , H01L2224/16227 , H01L2224/32245 , H01L2224/73253
摘要： A flip-chip IC package (10) provides a thermally-conductive lid (20) attached to a backside of the chip (12) by a die attach layer (18) of a predetermined thickness range. A rim (22), preferably KOVAR iron-nickel alloy, is formed on the lid (20) with a depth (44) less than a sum (42) of a thickness of the chip, the interconnects (16), and a minimum final thickness (40) of the die attach layer (18) by a predetermined margin (46). An initial thickness of thermally-filled epoxy is applied to the backside of the chip and a layer of lid attach epoxy (24) is applied to the rim of the lid in a thickness sufficient to span the predetermined margin. The lid is floated on the die attach layer (18) with the rim of the lid surrounding the chip and floating on the lid attach material. The lid is clamped against the chip with a force sufficient to compress the die attach material to a predetermined thickness in a range less than the initial thickness and not less than the minimum final thickness (40). An oxide layer, such as an iron or iron-alloy oxide layer, is formed on the bottom surface of the rim. A spacer is placed on the backside of the chip within the die attach material (18), to define the minimum final thickness (40) of the die attach layer. A beveled or stepped vent hole is formed in the lid and plugged and sealed.
摘要翻译：倒装芯片IC封装（10）通过预定厚度范围的管芯附着层（18）提供安装在芯片（12）背面的导热盖（20）。在盖子（20）上形成一个边缘（22），其深度（44）小于芯片厚度（16）和互连件（16）的总和（42）芯片附着层（18）的最终厚度（40）预定的边缘（46）。将热填充环氧树脂的初始厚度施加到芯片的背面，并且将盖子附着环氧树脂层（24）以足以跨越预定边缘的厚度施加到盖的边缘。盖子悬挂在芯片附着层（18）上，盖子的边缘围绕着芯片并漂浮在盖子附着材料上。盖子以足以在小于初始厚度并且不小于最小最终厚度（40）的范围内将管芯附接材料压缩到预定厚度的力夹紧在芯片上。在边缘的底面上形成氧化物层，例如铁或铁 - 合金氧化物层。间隔件被放置在芯片附接材料（18）内的芯片的背面，以限定芯片附着层的最小最终厚度（40）。在盖子上形成一个倾斜或有级的通风孔，并将其密封。

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