专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07810806B2 Paper feed mechanism and image generating apparatus with reversely driven feed roller 有权
标题翻译：进纸机构和反向驱动进给辊的图像生成装置
公开(公告)号：US07810806B2
公开(公告)日：2010-10-12
申请号：US12140690
申请日：2008-06-17
申请人： Daisuke Takasaka , Takahiro Naito
发明人： Daisuke Takasaka , Takahiro Naito
IPC分类号： B65H9/10
CPC分类号： B65H3/0623 , B65H1/266 , B65H2301/331 , B65H2405/1117 , B65H2405/1142 , B65H2801/06 , Y10S271/902
摘要： This paper feed mechanism includes a paper feed cassette integrally having a paper contact portion on a position deviating from the center of a rear-side inner wall surface in the cross direction by a prescribed distance in the cross direction and an apparatus body mountable with the paper feed cassette, and the apparatus body includes a driving portion rotating a paper feed roller in a paper feed direction and a paper discharge direction and a control portion bringing the rear end of the paper into contact with the paper contact portion for generating torque for the paper and thereafter transporting the paper to the apparatus body in paper feeding.
摘要翻译：该送纸机构包括：进纸盒，其一体地具有纸张接触部分，该纸张接触部分在横向方向上从背面内壁表面的中心偏离预定距离的位置，以及可安装在纸张上的装置主体进给盒，装置主体包括驱动部，其沿供纸方向和排纸方向旋转供纸辊，使控制部使纸的后端与纸张接触部接触，以产生纸张的扭矩然后在送纸中将纸张输送到装置主体。

2. 发明授权

US08816506B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08816506B2
公开(公告)日：2014-08-26
申请号：US13340165
申请日：2011-12-29
申请人： Michihiro Kawashita , Yasuhiro Yoshimura , Naotaka Tanaka , Takahiro Naito , Takashi Akazawa
发明人： Michihiro Kawashita , Yasuhiro Yoshimura , Naotaka Tanaka , Takahiro Naito , Takashi Akazawa
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L25/0657 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L23/5226 , H01L23/528 , H01L23/5386 , H01L24/11 , H01L24/12 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/81 , H01L24/94 , H01L25/074 , H01L25/50 , H01L2221/68372 , H01L2224/0401 , H01L2224/05557 , H01L2224/0557 , H01L2224/05572 , H01L2224/06181 , H01L2224/1147 , H01L2224/11472 , H01L2224/13009 , H01L2224/13012 , H01L2224/13013 , H01L2224/13014 , H01L2224/13021 , H01L2224/13022 , H01L2224/13025 , H01L2224/13099 , H01L2224/16058 , H01L2224/16112 , H01L2224/16146 , H01L2224/274 , H01L2224/81136 , H01L2224/81345 , H01L2224/81365 , H01L2224/81801 , H01L2224/81898 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/00014 , H01L2924/0002 , H01L2924/01002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/10253 , H01L2924/1205 , H01L2924/1306 , H01L2924/14 , H01L2924/1451 , H01L2924/19041 , H01L2924/30107 , H01L2924/35121 , H01L2924/00 , H01L2224/05552 , H01L2924/00012
摘要： In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.
摘要翻译：在层叠多个半导体芯片的半导体装置中，不会降低生产率而提高性能。半导体器件具有多个元件，层间绝缘膜，焊盘和与依次形成在硅基板的主表面上的焊盘电连接的凸块电极，并且具有形成在硅衬底的背面上的背面电极硅基板并与凸块电极电连接。凸块电极具有贯穿焊盘并朝向硅衬底侧突出的突出部分。背面电极形成为从硅衬底的背面侧朝向主面侧到达突起电极的突出部，并覆盖未到达的背面电极孔部的内侧垫，使得背面电极与凸块电极电连接。

3. 发明授权

US08178977B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08178977B2
公开(公告)日：2012-05-15
申请号：US12483751
申请日：2009-06-12
申请人： Michihiro Kawashita , Yasuhiro Yoshimura , Naotaka Tanaka , Takahiro Naito , Takashi Akazawa
发明人： Michihiro Kawashita , Yasuhiro Yoshimura , Naotaka Tanaka , Takahiro Naito , Takashi Akazawa
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H01L21/76898 , H01L23/481 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05025 , H01L2224/05144 , H01L2224/05155 , H01L2224/05553 , H01L2224/0557 , H01L2224/05572 , H01L2224/1134 , H01L2224/13025 , H01L2224/13099 , H01L2224/81136 , H01L2224/81801 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06555 , H01L2924/00013 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12044 , H01L2924/14 , H01L2924/19043 , H01L2924/30107 , H01L2924/00014 , H01L2224/05552
摘要： When a through-hole electrode and a rear-surface wire are formed on a rear surface of a chip, a convex portion is formed on the rear surface of the chip due to a rear-surface wiring pad which is a part of the through-hole electrode and the rear-surface wire. This causes the air leakage when the chip is sucked, and therefore, the reduction of the sucking force of the chip occurs. A concave portion is formed in advance in a region where a rear-surface wiring pad and a rear-surface wire are formed. The rear-surface wiring pad and the rear-surface wire are provided inside the concave portion. Thus, a flatness of the rear surface of the chip is ensured by a convex portion caused by thicknesses of the rear-surface wiring pad and the rear-surface wire, so that the reduction of the sucking force does not occur when the chip is handled.
摘要翻译：当在芯片的后表面上形成通孔电极和后表面线时，由于作为通孔的一部分的后表面布线板，在芯片的后表面上形成凸部，孔电极和后表面电线。这导致当芯片被吸入时的空气泄漏，因此发生芯片的吸力的降低。预先在形成背面布线衬垫和背面导线的区域中形成凹部。后表面布线板和后表面布线设置在凹部内。因此，通过由背面布线衬垫和后表面线的厚度引起的凸部来确保芯片的后表面的平坦度，使得当处理芯片时不会发生吸力的降低。

4. 外观设计

USD602466S1 Audio player 有权
公开(公告)号：USD602466S1
公开(公告)日：2009-10-20
申请号：US29311036
申请日：2008-12-12
申请人： Takuro Hibino , Takahiro Naito
设计人： Takuro Hibino , Takahiro Naito

5. 发明授权

US07593027B2 Image generating apparatus 失效
标题翻译：图像生成装置
公开(公告)号：US07593027B2
公开(公告)日：2009-09-22
申请号：US12027660
申请日：2008-02-07
申请人： Kunio Sawai , Takahiro Naito
发明人： Kunio Sawai , Takahiro Naito
IPC分类号： B41J2/32 , B41J29/00
CPC分类号： B41J17/32 , B41J29/02 , B41J35/28
摘要： This image generating apparatus includes a chassis and a side plate, a cartridge stop member provided on a first side surface of the chassis integrally has a first shaft stop portion coming into contact with a first end surface of a shaft of a print head pressing member, and a side plate provided on a second side surface of the chassis integrally has a second shaft stop portion coming into contact with a second end surface of the shaft of the print head pressing member.
摘要翻译：该图像产生装置包括底盘和侧板，设置在底盘的第一侧表面上的盒止动构件一体地具有与打印头按压构件的轴的第一端面接触的第一轴止动部，并且设置在底盘的第二侧表面上的侧板具有与打印头按压构件的轴的第二端面接触的第二轴止挡部。

6. 发明申请

US20090189256A1 MANUFACTURING PROCESS OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件和半导体器件的制造工艺
公开(公告)号：US20090189256A1
公开(公告)日：2009-07-30
申请号：US12360466
申请日：2009-01-27
申请人： Yasuhiro Yoshimura , Naotaka Tanaka , Michihiro Kawashita , Takahiro Naito , Takashi Akazawa
发明人： Yasuhiro Yoshimura , Naotaka Tanaka , Michihiro Kawashita , Takahiro Naito , Takashi Akazawa
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L24/16 , H01L21/6835 , H01L21/7682 , H01L21/76898 , H01L23/481 , H01L24/83 , H01L24/90 , H01L25/0657 , H01L25/50 , H01L2221/68372 , H01L2224/0401 , H01L2224/0557 , H01L2224/05571 , H01L2224/05572 , H01L2224/1134 , H01L2224/13025 , H01L2224/13099 , H01L2224/16145 , H01L2224/16147 , H01L2224/16225 , H01L2224/16237 , H01L2224/73204 , H01L2224/81141 , H01L2224/81191 , H01L2224/838 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/00012 , H01L2224/05552
摘要： After forming a ring-shaped trench penetrating through a semiconductor substrate from a rear surface side thereof and forming an insulating film inside the trench and on the rear surface of the semiconductor substrate, a through hole is formed in the insulating film and semiconductor substrate on an inner side of the ring-shaped trench from the rear surface side, thereby exposing a surface protection insulating film formed on a front surface of the semiconductor substrate at a bottom of the through hole. After removing the surface protection insulating film at the bottom of the through hole to form an opening to expose an element surface electrode, a contact electrode connected to the element surface electrode is formed on inner walls of the through hole and opening, and a pad electrode made of the same layer as the contact electrode is formed on the rear surface of the semiconductor substrate.
摘要翻译：在形成从其后表面侧穿过半导体衬底的环形沟槽形成并在沟槽内部和半导体衬底的后表面上形成绝缘膜之后，在绝缘膜和半导体衬底上形成通孔从后表面侧的环形沟槽的内侧，露出在通孔的底部形成在半导体衬底的前表面上的表面保护绝缘膜。在去除通孔底部的表面保护绝缘膜以形成露出元件表面电极的开口之后，在通孔和开口的内壁上形成连接到元件表面电极的接触电极，并且焊盘电极由与所述接触电极相同的层形成在所述半导体衬底的后表面上。

7. 发明申请

US20080248611A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：US20080248611A1
公开(公告)日：2008-10-09
申请号：US12037984
申请日：2008-02-27
申请人： Kenji HANADA , Norihisa Toma , Masaki Nakanishi , Takahiro Naito , Naotaka Tanaka
发明人： Kenji HANADA , Norihisa Toma , Masaki Nakanishi , Takahiro Naito , Naotaka Tanaka
IPC分类号： H01L21/60
CPC分类号： H01L24/11 , H01L21/563 , H01L23/3128 , H01L24/12 , H01L24/16 , H01L24/81 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/1134 , H01L2224/13099 , H01L2224/13144 , H01L2224/16 , H01L2224/16235 , H01L2224/73203 , H01L2224/81136 , H01L2224/81801 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06555 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/30105 , H01L2924/3511 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： The quality and reliability of a semiconductor device can be improved by eliminating a warp of a chip and performing a chip-stack. A wiring substrate, the first semiconductor chip connected via the first gold bump on the wiring substrate, the second semiconductor chip stacked via the second gold bump on the first semiconductor chip, and a sealing body are comprised. A first gold bump is connected to the wiring substrate, heating, and injection by pressure welding of the first gold bump is done under normal temperature after that at the hole-like electrode of the first semiconductor chip. Since injection by pressure welding of the second gold bump of the second semiconductor chip is done under normal temperature into the hole-like electrode of the first semiconductor chip and the second semiconductor chip is stacked, the chip-stack can be performed under normal temperature. The chip after the second stage can be stacked in the state where there is no warp in the first stage chip, by this, and the quality and reliability of the semiconductor device (semiconductor package) can be improved.
摘要翻译：可以通过消除芯片翘曲和执行芯片堆叠来提高半导体器件的质量和可靠性。布线基板，经由布线基板上的第一金凸块连接的第一半导体芯片，经由第一半导体芯片上的第二金凸块堆叠的第二半导体芯片和密封体。第一金凸块连接到布线基板，通过第一金凸块的压焊进行加热和注入，在第一半导体芯片的孔状电极之后的常温下进行。由于通过第二半导体芯片的第二金凸块的压焊而进行的注入是在常温下进入第一半导体芯片的孔状电极而第二半导体芯片堆叠的，所以可以在常温下进行芯片堆叠。由此，可以在第一级芯片中没有翘曲的状态下堆叠第二级之后的芯片，并且可以提高半导体器件（半导体封装）的质量和可靠性。

8. 发明授权

US06646350B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US06646350B2
公开(公告)日：2003-11-11
申请号：US09922230
申请日：2001-08-03
申请人： Naotaka Tanaka , Hideo Miura , Yoshiyuki Kado , Ikuo Yoshida , Takahiro Naito
发明人： Naotaka Tanaka , Hideo Miura , Yoshiyuki Kado , Ikuo Yoshida , Takahiro Naito
IPC分类号： H01L2352
CPC分类号： H01L23/562 , H01L21/563 , H01L23/145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/12044 , H01L2924/00
摘要： In order to realize a semiconductor device and a manufacturing method thereof which can keep with a high reliability an electric connection between each of bump pads formed on LSI chips and each of electrode pads formed on an interconnection substrate, within an guaranteed temperature range, a thermal expansion coefficient of an adhesive (3) is in the range of 20 to 60 ppm, and an elastic modulus of a build-up portion (6) is in the range of 5 to 10 GPa. Further, the build-up portion (6) is constituted by a multi-layer build-up substrate in which buid-up portion a peak value (a glass transition temperature) of a loss coefficient exists within a range of 100° C. to 250° C. and does not exist within a range of 0° C. to 100° C. By setting or selecting the physical properties in the manner disclosed above, it is possible to realize a semiconductor device and a manufacturing method thereof which can keep with a high reliability an electric bonding between the bump pads (2) formed on the LSI chips (1) and the electrode pads (4) on the interconnection substrate (5) within an guaranteed temperature range.
摘要翻译：为了实现能够保持高可靠性的半导体器件及其制造方法，在形成在LSI芯片上的每个凸块焊盘和形成在互连基板上的每个电极焊盘之间的电连接在保证的温度范围内，粘合剂（3）的膨胀系数在20〜60ppm的范围内，积聚部（6）的弹性模量在5〜10GPa的范围内。此外，积存部（6）由多层积层基板构成，在该多层积层基板中，增益部分的损耗系数的峰值（玻璃化转变温度）存在于100℃〜 250℃，并且不存在于0℃至100℃的范围内。通过以上述方式设置或选择物理性质，可以实现可以保持的半导体器件及其制造方法在保证温度范围内，形成在LSI芯片（1）上的凸块焊盘（2）和互连基板（5）上的电极焊盘（4）之间的电连接具有高可靠性。

9. 发明授权

US5378656A Leadframe, semiconductor integrated circuit device using the same, and method of and process for fabricating the same 失效
标题翻译：引线框，使用其的半导体集成电路器件及其制造方法和工艺
公开(公告)号：US5378656A
公开(公告)日：1995-01-03
申请号：US38684
申请日：1993-03-29
申请人： Yujiro Kajihara , Kazunari Suzuki , Kunihiro Tsubosaki , Hiromichi Suzuki , Yoshinori Miyaki , Takahiro Naito , Sueo Kawai
发明人： Yujiro Kajihara , Kazunari Suzuki , Kunihiro Tsubosaki , Hiromichi Suzuki , Yoshinori Miyaki , Takahiro Naito , Sueo Kawai
IPC分类号： H01L23/50 , H01L21/48 , H01L21/52 , H01L21/60 , H01L23/495
CPC分类号： H01L24/743 , H01L21/4842 , H01L23/49503 , H01L23/49513 , H01L23/49541 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/83 , H01L2224/02166 , H01L2224/29007 , H01L2224/2919 , H01L2224/32014 , H01L2224/32055 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/49171 , H01L2224/73265 , H01L2224/743 , H01L2224/82181 , H01L2224/83192 , H01L2224/83194 , H01L2224/838 , H01L2224/85181 , H01L2224/859 , H01L2224/92 , H01L2224/92247 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/14 , H01L2924/1433 , H01L2924/181 , Y10T29/49121
摘要： In order to improve the package body cracking resistance of an LSI package at the reflow soldering and to provide both a leadframe suitable for fabricating the LSI package according to the flexible manufacturing system and an LSI using the leadframe, the adhered area between a semiconductor chip 2 and a resin is enlarged by making the external size of a die pad 3 smaller than that of the semiconductor chip to be mounted thereon. Moreover, a variety of semiconductor chips 2 having different external sizes can be mounted on the die pad 3 by cutting the leading ends of leads 5 to a suitable length in accordance with the external sizes of the semiconductor chips 2.
摘要翻译：为了提高回流焊时的LSI封装的封装体抗开裂性，并且提供适用于制造根据柔性制造系统的LSI封装的引线框和使用引线框的LSI，半导体芯片2 并且通过使管芯焊盘3的外部尺寸小于要安装在其上的半导体芯片的外部尺寸来扩大树脂。此外，通过根据半导体芯片2的外部尺寸将引线5的前端切割成合适的长度，可以将不同的外部尺寸的各种半导体芯片2安装在管芯焊盘3上。

10. 再颁专利

USRE43443E1 Leadframe semiconductor integrated circuit device using the same, and method of and process for fabricating the two 有权
标题翻译：使用其的引线框半导体集成电路器件及其制造方法和工艺
公开(公告)号：USRE43443E1
公开(公告)日：2012-06-05
申请号：US09987978
申请日：2001-11-16
申请人： Yujiro Kajihara , Kazunari Suzuki , Kunihiro Tsubosaki , Hiromichi Suzuki , Yoshinori Miyaki , Takahiro Naito , Sueo Kawai
发明人： Yujiro Kajihara , Kazunari Suzuki , Kunihiro Tsubosaki , Hiromichi Suzuki , Yoshinori Miyaki , Takahiro Naito , Sueo Kawai
IPC分类号： H01L23/495
CPC分类号： H01L24/743 , H01L21/4842 , H01L23/49503 , H01L23/49513 , H01L23/49541 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L2224/02166 , H01L2224/29007 , H01L2224/2919 , H01L2224/32014 , H01L2224/32055 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/49171 , H01L2224/73265 , H01L2224/743 , H01L2224/82181 , H01L2224/83192 , H01L2224/83194 , H01L2224/838 , H01L2224/85181 , H01L2224/859 , H01L2224/92 , H01L2224/92247 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/14 , H01L2924/1433 , H01L2924/181 , Y10T29/49121 , H01L2924/00012 , H01L2924/00 , H01L2924/3512 , H01L2224/05599
摘要： In order to improve the package body cracking resistance of an LSI package at the reflow soldering and to provide both a leadframe suitable for fabricating the LSI package according to the flexible manufacturing system and an LSI using the leadframe, the adhered area between a semiconductor chip 2 and a resin is enlarged by making the external size of a die pad 3 smaller than that of the semiconductor chip to be mounted thereon. Moreover, a variety of semiconductor chips 2 having different external sizes can be mounted on the die pad 3 by cutting the leading ends of leads 5 to a suitable length in accordance with the external sizes of the semiconductor chips 2.
摘要翻译：为了提高回流焊时的LSI封装的封装体抗开裂性，并且提供适用于制造根据柔性制造系统的LSI封装的引线框和使用引线框的LSI，半导体芯片2 并且通过使管芯焊盘3的外部尺寸小于要安装在其上的半导体芯片的外部尺寸来扩大树脂。此外，通过根据半导体芯片2的外部尺寸将引线5的前端切割成合适的长度，可以将不同的外部尺寸的各种半导体芯片2安装在管芯焊盘3上。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式