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1. 发明授权

US07391249B2 Multi-threshold CMOS latch circuit 失效
标题翻译：多阈值CMOS锁存电路
公开(公告)号：US07391249B2
公开(公告)日：2008-06-24
申请号：US11607743
申请日：2006-12-01
申请人： Dae Woo Lee , Yil Suk Yang , Gyu Hyun Kim , Soon Il Yeo , Jong Dae Kim
发明人： Dae Woo Lee , Yil Suk Yang , Gyu Hyun Kim , Soon Il Yeo , Jong Dae Kim
IPC分类号： H03K3/289
CPC分类号： H03K3/356156 , H03K3/012
摘要： Provided is a multi-threshold complementary metal oxide semiconductor (MTCMOS) latch circuit including: a data inverting circuit for inverting and outputting input data under the control of a sleep control signal; a transmission gate for transferring the data signal output from the data inverting circuit under the control of a clock control signal; a signal control circuit for outputting the data signal output from the transmission gate under the control of a reset control signal and the sleep control signal; and a feedback circuit for feeding back the signal output from the signal control circuit and preserving the data in a sleep mode. The MTCMOS latch circuit can minimize power consumption caused by a leakage current due to elements scaled down to nano scale and also contribute to high-speed operation of a logic circuit by using an element having a low threshold voltage.
摘要翻译：提供了一种多阈值互补金属氧化物半导体（MTCMOS）锁存电路，包括：数据反相电路，用于在睡眠控制信号的控制下反相输出输入数据; 传输门，用于在时钟控制信号的控制下传送从数据反相电路输出的数据信号; 信号控制电路，用于在复位控制信号和睡眠控制信号的控制下输出从传输门输出的数据信号; 以及用于反馈从信号控制电路输出的信号并且以睡眠模式保存数据的反馈电路。 MTCMOS锁存电路可以将由于按比例缩小到纳米级的元件引起的漏电流引起的功耗最小化，并且还通过使用具有低阈值电压的元件有助于逻辑电路的高速操作。

2. 发明申请

US20070126486A1 Multi-threshold CMOS latch circuit 失效
标题翻译：多阈值CMOS锁存电路
公开(公告)号：US20070126486A1
公开(公告)日：2007-06-07
申请号：US11607743
申请日：2006-12-01
申请人： Dae Woo Lee , Yil Suk Yang , Gyu Hyun Kim , Soon Il Yeo , Jong Dae Kim
发明人： Dae Woo Lee , Yil Suk Yang , Gyu Hyun Kim , Soon Il Yeo , Jong Dae Kim
IPC分类号： H03K3/00
CPC分类号： H03K3/356156 , H03K3/012
摘要： Provided is a multi-threshold complementary metal oxide semiconductor (MTCMOS) latch circuit including: a data inverting circuit for inverting and outputting input data under the control of a sleep control signal; a transmission gate for transferring the data signal output from the data inverting circuit under the control of a clock control signal; a signal control circuit for outputting the data signal output from the transmission gate under the control of a reset control signal and the sleep control signal; and a feedback circuit for feeding back the signal output from the signal control circuit and preserving the data in a sleep mode. The MTCMOS latch circuit can minimize power consumption caused by a leakage current due to elements scaled down to nano scale and also contribute to high-speed operation of a logic circuit by using an element having a low threshold voltage.
摘要翻译：提供了一种多阈值互补金属氧化物半导体（MTCMOS）锁存电路，包括：数据反相电路，用于在睡眠控制信号的控制下反相输出输入数据; 传输门，用于在时钟控制信号的控制下传送从数据反相电路输出的数据信号; 信号控制电路，用于在复位控制信号和睡眠控制信号的控制下输出从传输门输出的数据信号; 以及用于反馈从信号控制电路输出的信号并且以睡眠模式保存数据的反馈电路。 MTCMOS锁存电路可以将由于按比例缩小到纳米级的元件引起的漏电流引起的功耗最小化，并且还通过使用具有低阈值电压的元件有助于逻辑电路的高速操作。

3. 发明申请

US20070126663A1 Pixel driving circuit with threshold voltage compensation circuit 审中-公开
标题翻译：带阈值电压补偿电路的像素驱动电路
公开(公告)号：US20070126663A1
公开(公告)日：2007-06-07
申请号：US11521338
申请日：2006-09-14
申请人： Gyu Hyun Kim , Yil Suk Yang , Dae Woo Lee , Jong Dae Kim
发明人： Gyu Hyun Kim , Yil Suk Yang , Dae Woo Lee , Jong Dae Kim
IPC分类号： G09G3/30
CPC分类号： G09G3/3241 , G09G3/3283 , G09G2300/0819 , G09G2300/0842
摘要： Provided is a pixel driving circuit including a threshold voltage compensation circuit. The pixel driving circuit includes a diode-connected type first transistor through which input current data flows; a second transistor copying the current data flowing through the first transistor; a third transistor connected in series to the second transistor; a fourth transistor diode-connected between a power supply voltage terminal and the third transistor; and a driving transistor connected to the power supply voltage terminal, copying the current data flowing through the third transistor, and providing the data to a light emitting diode. Since the pixel driving circuit compensates for variation in the threshold voltage of the driving transistor driving each pixel, brightness uniformity of pixels according to applied current data can be maintained.
摘要翻译：提供了包括阈值电压补偿电路的像素驱动电路。像素驱动电路包括输入电流数据流过的二极管连接型第一晶体管; 第二晶体管复制流过第一晶体管的电流数据; 与第二晶体管串联连接的第三晶体管; 连接在电源电压端子和第三晶体管之间的第四晶体管二极管; 以及连接到电源电压端子的驱动晶体管，复制流过第三晶体管的电流数据，并将数据提供给发光二极管。由于像素驱动电路补偿驱动每个像素的驱动晶体管的阈值电压的变化，所以可以保持根据所施加的当前数据的像素的亮度均匀性。

4. 发明授权

US07769981B2 Row of floating point accumulators coupled to respective PEs in uppermost row of PE array for performing addition operation 有权
标题翻译：耦合到PE阵列的最上排中的相应PE的浮点累加器的行，用于执行附加操作
公开(公告)号：US07769981B2
公开(公告)日：2010-08-03
申请号：US12045844
申请日：2008-03-11
申请人： Chun Gi Lyuh , Yil Suk Yang , Se Wan Heo , Soon Il Yeo , Tae Moon Roh , Jong Dae Kim , Ki Chul Kim , Se Hoon Yoo
发明人： Chun Gi Lyuh , Yil Suk Yang , Se Wan Heo , Soon Il Yeo , Tae Moon Roh , Jong Dae Kim , Ki Chul Kim , Se Hoon Yoo
IPC分类号： G06F15/80
CPC分类号： G06F15/8007
摘要： Provided is a parallel processor for supporting a floating-point operation. The parallel processor has a flexible structure for easy development of a parallel algorithm involving multimedia computing, requires low hardware cost, and consumes low power. To support floating-point operations, the parallel processor uses floating-point accumulators and a flag for floating-point multiplication. Using the parallel processor, it is possible to process a geometric transformation operation in a 3-dimensional (3D) graphics process at low cost. Also, the cost of a bus width for instructions can be minimized by a partitioned Single-Instruction Multiple-Data (SIMD) method and a method of conditionally executing instructions.
摘要翻译：提供了一种用于支持浮点运算的并行处理器。并行处理器具有灵活的结构，便于开发涉及多媒体计算的并行算法，需要较低的硬件成本，并且消耗低功耗。为了支持浮点运算，并行处理器使用浮点累加器和浮点乘法的标志。使用并行处理器，可以以低成本在三维（3D）图形处理中处理几何变换操作。此外，可以通过分区单指令多数据（SIMD）方法和有条件执行指令的方法来最小化用于指令的总线宽度的成本。

5. 发明申请

US20070150763A1 Highly energy-efficient processor employing dynamic voltage scaling 有权
标题翻译：采用动态电压调节的高能效处理器
公开(公告)号：US20070150763A1
公开(公告)日：2007-06-28
申请号：US11520177
申请日：2006-09-13
申请人： Yil Suk Yang , Jong Dae Kim , Soon Il Yeo , Chun Gi Lyuh
发明人： Yil Suk Yang , Jong Dae Kim , Soon Il Yeo , Chun Gi Lyuh
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/3287 , G06F1/3293 , G06F1/3296 , Y02D10/122 , Y02D10/171 , Y02D10/172 , Y02D50/20
摘要： Provided is a highly energy-efficient processor architecture. The architecture employs 2-stage dynamic voltage scaling (DVS) and a sleep mode for high energy efficiency, dynamically controls the power supply voltage and activation of an embedded processor with instructions, and thus can prevent performance deterioration while reducing power consumption.A highly energy-efficient processor employing the processor architecture includes: a function unit block for performing an operation according to instructions input from the outside; at least one peripheral unit block for performing data communication with an external device; an instruction decoder for interpreting the input instructions and determining operation modes of the function unit block and peripheral unit block required for executing the interpreted instructions; a function unit block driver for applying a different power supply voltage according to the operation mode of the function unit block to the function unit block; and a peripheral unit block driver for applying a different power supply voltage according to the operation mode of the peripheral unit block to the peripheral unit block.
摘要翻译：提供了一种高能效的处理器架构。该架构采用2级动态电压调节（DVS）和睡眠模式以实现高能效，通过指令动态控制电源电压和嵌入式处理器的激活，从而可以在降低功耗的同时防止性能下降。采用该处理器架构的高能效处理器包括：功能单元块，用于根据从外部输入的指令进行操作; 用于与外部设备进行数据通信的至少一个外围单元块; 用于解释输入指令并确定执行解释指令所需的功能单元块和外围单元块的操作模式的指令解码器; 功能单元块驱动器，用于根据功能单元块的操作模式将不同的电源电压施加到功能单元块; 以及外围单元块驱动器，用于根据外围单元块的操作模式向外围单元块施加不同的电源电压。

6. 发明授权

US07805620B2 Highly energy-efficient processor employing dynamic voltage scaling 有权
标题翻译：采用动态电压调节的高能效处理器
公开(公告)号：US07805620B2
公开(公告)日：2010-09-28
申请号：US11520177
申请日：2006-09-13
申请人： Yil Suk Yang , Jong Dae Kim , Soon Il Yeo , Chun Gi Lyuh
发明人： Yil Suk Yang , Jong Dae Kim , Soon Il Yeo , Chun Gi Lyuh
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/3287 , G06F1/3293 , G06F1/3296 , Y02D10/122 , Y02D10/171 , Y02D10/172 , Y02D50/20
摘要： Provided is a highly energy-efficient processor architecture. The architecture employs 2-stage dynamic voltage scaling (DVS) and a sleep mode for high energy efficiency, dynamically controls the power supply voltage and activation of an embedded processor with instructions, and thus can prevent performance deterioration while reducing power consumption.A highly energy-efficient processor employing the processor architecture includes: a function unit block for performing an operation according to instructions input from the outside; at least one peripheral unit block for performing data communication with an external device; an instruction decoder for interpreting the input instructions and determining operation modes of the function unit block and peripheral unit block required for executing the interpreted instructions; a function unit block driver for applying a different power supply voltage according to the operation mode of the function unit block to the function unit block; and a peripheral unit block driver for applying a different power supply voltage according to the operation mode of the peripheral unit block to the peripheral unit block.
摘要翻译：提供了一种高能效的处理器架构。该架构采用2级动态电压调节（DVS）和睡眠模式以实现高能效，通过指令动态控制电源电压和嵌入式处理器的激活，从而可以在降低功耗的同时防止性能下降。采用该处理器架构的高能效处理器包括：功能单元块，用于根据从外部输入的指令进行操作; 用于与外部设备进行数据通信的至少一个外围单元块; 用于解释输入指令并确定执行解释指令所需的功能单元块和外围单元块的操作模式的指令解码器; 功能单元块驱动器，用于根据功能单元块的操作模式将不同的电源电压施加到功能单元块; 以及外围单元块驱动器，用于根据外围单元块的操作模式向外围单元块施加不同的电源电压。

7. 发明授权

US07403178B2 Sources driver circuit for active matrix electroluminescent display and driving method thereof 有权
标题翻译：用于有源矩阵电致发光显示器的源极驱动电路及其驱动方法
公开(公告)号：US07403178B2
公开(公告)日：2008-07-22
申请号：US10817838
申请日：2004-04-06
申请人： Yil Suk Yang , Jong Dae Kim , Dae Woo Lee , Tae Moon Roh , Il Yong Park , Sung Ku Kwon , Byoung Gon Yu
发明人： Yil Suk Yang , Jong Dae Kim , Dae Woo Lee , Tae Moon Roh , Il Yong Park , Sung Ku Kwon , Byoung Gon Yu
IPC分类号： G09G3/30 , G09G3/20 , G09G3/22
CPC分类号： G09G3/30 , G09G2310/027 , G09G2320/0276
摘要： Provided is a source driver circuit for an active matrix electroluminescent (EL) display including a digital-to-analog converter/ramp circuit for converting a digital signal into an analog signal, and generating a ramp signal in this process, simultaneously, whereby high degree of integration would be possible since a conventional complicated circuit is not required and gray scale with the high characteristic can be implanted, regardless of a change of a temperature or a threshold voltage.
摘要翻译：提供了一种用于有源矩阵电致发光（EL）显示器的源极驱动电路，其包括用于将数字信号转换为模拟信号的数模转换器/斜坡电路，并且在该过程中同时产生斜坡信号，由此高度的集成是可能的，因为不需要常规的复杂电路，而不管温度或阈值电压的变化，都可以植入具有高特性的灰度级。

8. 发明授权

US06855581B2 Method for fabricating a high-voltage high-power integrated circuit device 有权
标题翻译：高压大功率集成电路器件的制造方法
公开(公告)号：US06855581B2
公开(公告)日：2005-02-15
申请号：US10153975
申请日：2002-05-23
申请人： Tae Moon Roh , Dae Woo Lee , Yil Suk Yang , Il Yong Park , Sang Gi Kim , Jin Gun Koo , Jong Dae Kim
发明人： Tae Moon Roh , Dae Woo Lee , Yil Suk Yang , Il Yong Park , Sang Gi Kim , Jin Gun Koo , Jong Dae Kim
IPC分类号： H01L21/76 , H01L21/84 , H01L27/12
CPC分类号： H01L27/1203 , H01L21/84
摘要： The present invention relates to a method of fabricating a high-voltage high-power integrated circuit device using a substrate of a SOI structure in which an insulating film and a silicon layer are sequentially stacked on a silicon substrate. The method comprising the steps of sequentially forming an oxide film and a photoresist film on the silicon layer and then performing a photolithography process using a trench mask to pattern the photoresist film; patterning the oxide film using the patterned photoresist film as a mask and then removing the photoresist film remained after the patterning; etching the silicon layer using the patterned oxide film as a mask until the insulating film is exposed to form a trench; forming a nitride film on the entire surface including the trench, performing an annealing process and depositing polysilicon on the entire surface so that the trench is buried; and sequentially removing the polysilicon and the nitride film until the silicon layer is exposed to flatten the surface, thus forming a device isolating film for electrical isolation between devices within the trench. Therefore, the present invention can effectively reduce the isolation area of the trench between the high-voltage high-power device and the logic CMOS device and can easily control the concentration of a deep well.
摘要翻译：本发明涉及使用其中绝缘膜和硅层依次层叠在硅衬底上的SOI结构的衬底的高压大功率集成电路器件的制造方法。该方法包括以下步骤：在硅层上依次形成氧化物膜和光致抗蚀剂膜，然后使用沟槽掩模进行光刻工艺以对光刻胶膜进行图案化; 使用图案化的光致抗蚀剂膜作为掩模来图案化氧化膜，然后在图案化之后除去光致抗蚀剂膜; 使用所述图案化氧化膜作为掩模蚀刻所述硅层，直到所述绝缘膜暴露以形成沟槽; 在包括沟槽的整个表面上形成氮化物膜，执行退火处理并在整个表面上沉积多晶硅，使得沟槽被埋置; 并且顺序地去除多晶硅和氮化物膜，直到硅层暴露以使表面变平，从而形成用于在沟槽内的器件之间进行电隔离的器件隔离膜。因此，本发明能够有效地降低高压大功率器件与逻辑CMOS器件之间的沟槽的隔离面积，能够容易地控制深井的浓度。

9. 发明授权

US06770529B2 EDMOS device having a lattice type drift region and method of manufacturing the same 有权
标题翻译：具有晶格型漂移区域的EDMOS器件及其制造方法
公开(公告)号：US06770529B2
公开(公告)日：2004-08-03
申请号：US10611502
申请日：2003-06-30
申请人： Dae Woo Lee , Tae Moon Roh , II Yong Park , Yil Suk Yang , Jong Dae Kim
发明人： Dae Woo Lee , Tae Moon Roh , II Yong Park , Yil Suk Yang , Jong Dae Kim
IPC分类号： H01L218242
CPC分类号： H01L29/0634 , H01L29/7835
摘要： The present invention provides an EDMOS (extended drain MOS) device having a lattice type drift region and a method of manufacturing the same. In the case of n channel EDMOS(nEDMOS), the drift region has a lattice structure in which an n lattice having a high concentration and a p lattice having a low concentration are alternately arranged. As a drain voltage is applied, a depletion layer is abruptly extended by a pn junction of the n lattice and the p lattice, so that the entire drift region is easily depleted. Therefore, a breakdown voltage of the device is increased, and an on resistance of the device is decreased due to the n lattice with high concentration.
摘要翻译：本发明提供一种具有晶格型漂移区域的EDMOS（延伸漏极MOS）器件及其制造方法。在n沟道EDMOS（nEDMOS）的情况下，漂移区域具有晶格结构，其中具有高浓度的n晶格和具有低浓度的p晶格交替排列。当施加漏极电压时，耗尽层被n晶格和p晶格的pn结突然延伸，使得整个漂移区域容易耗尽。因此，器件的击穿电压增加，并且由于具有高浓度的n晶格，器件的导通电阻降低。

10. 发明授权

US07482997B2 Voltage/current driven active matrix organic electroluminescent pixel circuit and display device 有权
标题翻译：电压/电流驱动有源矩阵有机电致发光像素电路和显示装置
公开(公告)号：US07482997B2
公开(公告)日：2009-01-27
申请号：US11197013
申请日：2005-08-04
申请人： Yil Suk Yang , Dae Woo Lee , Jong Dae Kim
发明人： Yil Suk Yang , Dae Woo Lee , Jong Dae Kim
IPC分类号： G09G3/00
CPC分类号： G09G3/3266 , G09G3/325 , G09G3/3258 , G09G2300/0842
摘要： Provided is a voltage/current driven active matrix organic electroluminescent (EL) pixel circuit. In particular, a voltage/current driven active matrix organic EL pixel circuit capable of driving organic ELs by a voltage programming method and a current programming method using one pixel circuit and an organic EL display device that uses such a pixel circuit are provided. The voltage/current driven active matrix organic EL pixel circuit can be used for a voltage driven active matrix organic EL and a current driven active matrix organic EL by programming such that the flexibility and applicability of the pixel circuit and the driving circuit are excellent.
摘要翻译：提供电压/电流驱动的有源矩阵有机电致发光（EL）像素电路。特别地，提供了能够通过电压编程方法驱动有机EL的电压/电流驱动的有源矩阵有机EL像素电路和使用一个像素电路的当前编程方法和使用这种像素电路的有机EL显示装置。电压/电流驱动的有源矩阵有机EL像素电路可以通过编程使用于电压驱动的有源矩阵有机EL和电流驱动的有源矩阵有机EL，使得像素电路和驱动电路的灵活性和适用性非常优异。

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