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1. 发明申请

WO2009029917A1 SYSTEMS AND METHODS FOR COMMUNICATION BETWEEN A PC APPLICATION AND THE DSP IN AN HDA AUDIO CODEC 审中-公开
标题翻译： PC应用与HDA音频编解码器之间的通信的系统和方法
公开(公告)号：WO2009029917A1
公开(公告)日：2009-03-05
申请号：PCT/US2008/074964
申请日：2008-09-01
申请人： D2AUDIO CORPORATION , CHIENG, Daniel L. , GEPHARDT, Douglas D. , HAND, Larry E. , KLAAS, Jeffrey M. , ZAHARIAS, Adam
发明人： CHIENG, Daniel L. , GEPHARDT, Douglas D. , HAND, Larry E. , KLAAS, Jeffrey M. , ZAHARIAS, Adam
IPC分类号： G06F3/16
CPC分类号： G06F3/162
摘要： Systems and methods implemented in a PC for enabling communication between an application executing on the CPU and a DSP that is incorporated into a codec in the High Definition Audio (HDA) system, wherein the communication is carried out via the HDA bus. In one embodiment, an HDA codec includes one or more conventional HDA widgets coupled to a programmable processor such as a DSP. The codec includes a set of registers that are configured to store HDA verbs and data transmitted via the HDA bus. The programmable processor is configured to identify verbs that indicate associated information is a communication from an application executing on the CPU, read the associated information, and process the information according to the associated verbs. The information may be program instructions, parametric data, requests for information, etc.
摘要翻译：在PC中实现的用于实现在CPU上执行的应用程序与被并入高清晰度音频（HDA）系统中的编解码器的DSP之间的通信的系统和方法，其中通过HDA总线进行通信。在一个实施例中，HDA编解码器包括耦合到诸如DSP的可编程处理器的一个或多个常规HDA小部件。编解码器包括一组寄存器，用于存储通过HDA总线传输的HDA动词和数据。可编程处理器被配置为识别指示相关信息的动词是来自在CPU上执行的应用程序的通信，读取相关联的信息，以及根据相关联的动词处理信息。该信息可以是程序指令，参数数据，信息请求等。

2. 发明申请

WO2009029916A1 SYSTEMS AND METHODS FOR CONTROLLING AUDIO VOLUME IN THE PROCESSOR OF A HIGH DEFINITION AUDIO CODEC 审中-公开
标题翻译：用于在高定义音频编解码器的处理器中控制音量的系统和方法
公开(公告)号：WO2009029916A1
公开(公告)日：2009-03-05
申请号：PCT/US2008/074963
申请日：2008-09-01
申请人： D2AUDIO CORPORATION , CHIENG, Daniel L. , GEPHARDT, Douglas D. , HAND, Larry E. , KLAAS, Jeffrey M. , ZAHARIAS, Adam
发明人： CHIENG, Daniel L. , GEPHARDT, Douglas D. , HAND, Larry E. , KLAAS, Jeffrey M. , ZAHARIAS, Adam
IPC分类号： H03F3/217 , G06F3/16 , H03G3/34 , H03G7/00 , H04N5/60 , G10L19/02 , H04S7/00 , G11B20/10
CPC分类号： H03G3/3089 , G06F3/16 , G10L15/26 , G11B20/10527 , G11B2020/10574 , H03F3/217
摘要： Systems and methods for controlling the audio volume of an audio signal in a High 'Definition Audio HDA codec having a programmable processor such as a DSP, wherein the codec receives digital audio signals and audio volume control verbs over an HDA bus, and the audio volume levels associated with the audio volume control verbs are used by the processor in the generation pulse width modulated (PWM) output signals, thereby controlling the audio volume levels of the output signals. The processor may be configured to adjust non-volume parameters such as PWM deadtime, in addition to adjusting audio volume, based on the audio volume levels. The codec may be implemented in a, PC or other system that implements an HDA system that includes the HDA bus and HDA codec.
摘要翻译：用于在具有诸如DSP的可编程处理器的高清晰度音频HDA编解码器中控制音频信号音频的系统和方法，其中编解码器通过HDA总线接收数字音频信号和音频音量控制动词，音频音量处理器在生成脉冲宽度调制（PWM）输出信号中使用与音频音量控制动词相关联的电平，从而控制输出信号的音频音量。除了根据音频音量水平调整音频音量之外，处理器可以被配置为调整诸如PWM死时间之类的非体积参数。编解码器可以在实现包括HDA总线和HDA编解码器的HDA系统的PC或其他系统中实现。

3. 发明申请

WO2009029920A1 SYSTEMS AND METHODS FOR CONTROLLING HDA SYSTEM CAPABILITIES 审中-公开
标题翻译：用于控制HDA系统能力的系统和方法
公开(公告)号：WO2009029920A1
公开(公告)日：2009-03-05
申请号：PCT/US2008/074967
申请日：2008-09-01
申请人： D2AUDIO CORPORATION , TAYLOR, Wilson E. , GEPHARDT, Douglas D. , HAND, Larry E. , SPINA, Richard
发明人： TAYLOR, Wilson E. , GEPHARDT, Douglas D. , HAND, Larry E. , SPINA, Richard
IPC分类号： G06F3/16
CPC分类号： G06F3/162 , G06F21/84
摘要： Systems and methods for controlling the capabilities of an High Definition Audio (HDA) system, wherein the system determines whether an optional component such as a plug-in card is connected to the system and then configures itself in a baseline configuration if the optional component is not connected or configures itself in a different, alternative configuration if the optional component is connected. In one embodiment, a codec of the system includes a programmable processor configured to read configuration authorization information and also read configuration information from the optional component if it is connected to the system. The processor also controls the configuration of the HDA system and the operation of the codec based on the authorization and configuration information. The system can thereby provide different features and functionality using the same hardware.
摘要翻译：用于控制高清晰度音频（HDA）系统的能力的系统和方法，其中系统确定诸如插件卡的可选组件是否连接到系统，然后如果可选组件是如果可选组件连接，则不连接或将其自身配置为不同的替代配置。在一个实施例中，系统的编解码器包括可编程处理器，其被配置为读取配置授权信息，并且如果连接到系统，则从可选组件读取配置信息。处理器还根据授权和配置信息控制HDA系统的配置和编解码器的操作。因此，该系统可以使用相同的硬件来提供不同的特征和功能。

4. 发明申请

WO2009065068A2 SWITCHING AMPLIFIERS 审中-公开
标题翻译：开关放大器
公开(公告)号：WO2009065068A2
公开(公告)日：2009-05-22
申请号：PCT/US2008/083677
申请日：2008-11-14
申请人： INTERSIL AMERICAS INC. , ATTWOOD, Brian E. , TAYLOR, Wilson E. , HAND, Larry E.
发明人： ATTWOOD, Brian E. , TAYLOR, Wilson E. , HAND, Larry E.
IPC分类号： H03F3/217 , H03F1/32
CPC分类号： H03F3/217 , H03F3/2173 , H03F2200/03 , H03F2200/271 , H03F2200/273
摘要： Systems and methods implemented in a switching amplifier for providing consistent, matching switching between top and bottom switching devices in a switching amplifier. One embodiment includes a half-bridge circuit output stage, a driver stage and a transformer. The driver stage, which drives the switches of the output stage, is very fast, has a low propagation delay, and has minimal input capacitance. The transformer drives the drive paths from the transformer inputs to the switches. The transformer avoids resonances within the audio band and at the amplifier switching frequencies, has low and spread free leakage inductance, has enough magnetizing inductance to keep transformer currents low in proportion to the total driver stage current drain, has low core losses at the switching frequency, has minimal inductance change and operates well below its saturation point. The amplifier stage provides a substantially constant amplitude drive signal to the output power switching devices.
摘要翻译：开关放大器中实现的系统和方法，用于在开关放大器中的顶部和底部开关器件之间提供一致的匹配切换。一个实施例包括半桥电路输出级，驱动器级和变压器。驱动输出级开关的驱动器级非常快，具有低传播延迟，并具有最小的输入电容。变压器驱动从变压器输入到开关的驱动路径。该变压器避免了音频带内和放大器开关频率处的谐振，具有低且分散的自由漏电感，具有足够的磁化电感以保持变压器电流与总驱动器级电流消耗成比例的低，在开关频率处具有低核心损耗，具有最小的电感变化，并且工作在远低于其饱和点。放大器级向输出功率开关器件提供基本恒定幅度的驱动信号。

5. 发明公开

EP2188710A1 SYSTEMS AND METHODS FOR CONTROLLING HDA SYSTEM CAPABILITIES 审中-公开
标题翻译：系统和方法用于控制HDA系统能力
公开(公告)号：EP2188710A1
公开(公告)日：2010-05-26
申请号：EP08828228.0
申请日：2008-09-01
申请人： D2Audio Corporation
发明人： TAYLOR, Wilson E. , GEPHARDT, Douglas D. , HAND, Larry E. , SPINA, Richard
IPC分类号： G06F3/16
CPC分类号： G06F3/162 , G06F21/84
摘要： Systems and methods for controlling the capabilities of an High Definition Audio (HDA) system, wherein the system determines whether an optional component such as a plug-in card is connected to the system and then configures itself in a baseline configuration if the optional component is not connected or configures itself in a different, alternative configuration if the optional component is connected. In one embodiment, a codec of the system includes a programmable processor configured to read configuration authorization information and also read configuration information from the optional component if it is connected to the system. The processor also controls the configuration of the HDA system and the operation of the codec based on the authorization and configuration information. The system can thereby provide different features and functionality using the same hardware.

6. 发明公开

EP2188709A1 SYSTEMS AND METHODS FOR COMMUNICATION BETWEEN A PC APPLICATION AND THE DSP IN AN HDA AUDIO CODEC 审中-公开
标题翻译：系统和方法之间。在一个HDA声卡的PC应用程序和DSP通信
公开(公告)号：EP2188709A1
公开(公告)日：2010-05-26
申请号：EP08799039.6
申请日：2008-09-01
申请人： D2Audio Corporation
发明人： CHIENG, Daniel L. , GEPHARDT, Douglas D. , HAND, Larry E. , KLAAS, Jeffrey M. , ZAHARIAS, Adam
IPC分类号： G06F3/16
CPC分类号： G06F3/162
摘要： Systems and methods implemented in a PC for enabling communication between an application executing on the CPU and a DSP that is incorporated into a codec in the High Definition Audio (HDA) system, wherein the communication is carried out via the HDA bus. In one embodiment, an HDA codec includes one or more conventional HDA widgets coupled to a programmable processor such as a DSP. The codec includes a set of registers that are configured to store HDA verbs and data transmitted via the HDA bus. The programmable processor is configured to identify verbs that indicate associated information is a communication from an application executing on the CPU, read the associated information, and process the information according to the associated verbs. The information may be program instructions, parametric data, requests for information, etc.

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