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1. 发明申请

US20100140708A1 Multi-Thickness Semiconductor with Fully Depleted Devices and Photonic Integration 有权
标题翻译：具有完全耗尽器件和光子整合的多厚度半导体
公开(公告)号：US20100140708A1
公开(公告)日：2010-06-10
申请号：US12328853
申请日：2008-12-05
申请人： Craig M. Hill , Andrew T. Pomerene , Daniel N. Carothers , Timothy J. Conway , Vu A. Vu
发明人： Craig M. Hill , Andrew T. Pomerene , Daniel N. Carothers , Timothy J. Conway , Vu A. Vu
IPC分类号： H01L27/12 , H01L21/84
CPC分类号： H01L21/84 , G02B6/136 , H01L27/1203 , H01L2924/0002 , H01L2924/00
摘要： Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.
摘要翻译：公开了促进包括不同厚度的结构和器件的半导体的制造的技术。一个实施例提供了一种用于半导体器件制造的方法，其包括使要形成器件的半导体晶片的区域变薄从而限定晶片的薄区域和厚区域。该方法继续在厚区域上形成一个或多个光子器件和/或部分耗尽的电子器件，并且在薄区域上形成一个或多个完全耗尽的电子器件。另一个实施例提供一种半导体器件，其包括限定薄区域和厚区域的半导体晶片。该器件还包括形成在厚区域上的一个或多个光子器件和/或部分耗尽的电子器件，以及形成在薄区域上的一个或多个完全耗尽的电子器件。可以在薄区域和厚区域之间形成隔离区域。

2. 发明授权

US07847353B2 Multi-thickness semiconductor with fully depleted devices and photonic integration 有权
标题翻译：具有完全耗尽器件和光子整合的多厚度半导体
公开(公告)号：US07847353B2
公开(公告)日：2010-12-07
申请号：US12328853
申请日：2008-12-05
申请人： Craig M. Hill , Andrew T. Pomerene , Daniel N. Carothers , Timothy J. Conway , Vu A. Vu
发明人： Craig M. Hill , Andrew T. Pomerene , Daniel N. Carothers , Timothy J. Conway , Vu A. Vu
IPC分类号： H01L27/12
CPC分类号： H01L21/84 , G02B6/136 , H01L27/1203 , H01L2924/0002 , H01L2924/00
摘要： Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.
摘要翻译：公开了促进包括不同厚度的结构和器件的半导体的制造的技术。一个实施例提供了一种用于半导体器件制造的方法，其包括使要形成器件的半导体晶片的区域变薄从而限定晶片的薄区域和厚区域。该方法继续在厚区域上形成一个或多个光子器件和/或部分耗尽的电子器件，并且在薄区域上形成一个或多个完全耗尽的电子器件。另一个实施例提供一种半导体器件，其包括限定薄区域和厚区域的半导体晶片。该器件还包括形成在厚区域上的一个或多个光子器件和/或部分耗尽的电子器件，以及形成在薄区域上的一个或多个完全耗尽的电子器件。可以在薄区域和厚区域之间形成隔离区域。

3. 发明申请

US20120252158A1 Method for Manufacturing Lateral Germanium Detectors 失效
标题翻译：制造侧向锗探测器的方法
公开(公告)号：US20120252158A1
公开(公告)日：2012-10-04
申请号：US12521853
申请日：2008-10-27
申请人： Daniel N. Carothers , Craig M. Hill , Andrew T. S. Pomerene , Vu A. Vu , Robert Kamocsai , Timothy J. Conway
发明人： Daniel N. Carothers , Craig M. Hill , Andrew T. S. Pomerene , Vu A. Vu , Robert Kamocsai , Timothy J. Conway
IPC分类号： H01L31/18
CPC分类号： H01L27/1467
摘要： An improved method for manufacturing a lateral germanium detector is disclosed. A detector window is opened through an oxide layer to expose a doped single crystalline silicon layer situated on a substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished to leave only a small portion around the single crystal germanium layer. A dielectric layer is deposited on the amorphous germanium layer and the single crystal germanium layer. Using resist masks and ion implants, multiple doped regions are formed on the single crystal germanium layer. After opening several oxide windows on the dielectric layer, a refractory metal layer is deposited on the doped regions to form multiple germanide layers.
摘要翻译：公开了用于制造侧向锗检测器的改进方法。检测器窗口通过氧化物层打开以暴露位于衬底上的掺杂单晶硅层。接下来，在检测器窗口内生长单晶锗层，并且在氧化物层上生长非晶锗层。然后抛光无定形锗层以在单晶锗层周围仅留下一小部分。介电层沉积在非晶锗层和单晶锗层上。使用抗蚀剂掩模和离子注入，在单晶锗层上形成多个掺杂区。在介电层上打开几个氧化物窗后，在掺杂区域上沉积难熔金属层以形成多个锗化物层。

4. 发明申请

US20090111200A1 Method for Fabricating Electronic and Photonic Devices on a Semiconductor Substrate 有权
标题翻译：在半导体基板上制造电子和光子器件的方法
公开(公告)号：US20090111200A1
公开(公告)日：2009-04-30
申请号：US12201943
申请日：2008-08-29
申请人： Daniel N. Carothers , Craig M. Hill , Andrew T.S. Pomerene , Timothy J. Conway , Rick L. Thompson , Vu A. Vu , Robert Kamocsai , Joe Giunta , Jonathan N. Ishii
发明人： Daniel N. Carothers , Craig M. Hill , Andrew T.S. Pomerene , Timothy J. Conway , Rick L. Thompson , Vu A. Vu , Robert Kamocsai , Joe Giunta , Jonathan N. Ishii
IPC分类号： H01L21/02
CPC分类号： H01L27/0617
摘要： A method for fabricating photonic and electronic devices on a substrate is disclosed. Multiple slabs are initially patterned and etched on a layer of a substrate. An electronic device is fabricated on a first one of the slabs and a photonic device is fabricated on a second one of the slabs, such that the electronic device and the photonic device are formed on the same layer of the substrate.
摘要翻译：公开了一种在衬底上制造光子和电子器件的方法。最初对多个板坯进行图案化并在衬底层上进行蚀刻。在第一板上制造电子器件，并且在第二板上制造光子器件，使得电子器件和光子器件形成在基片的同一层上。

5. 发明授权

US08343792B2 Method for manufacturing lateral germanium detectors 失效
标题翻译：制造侧向锗探测器的方法
公开(公告)号：US08343792B2
公开(公告)日：2013-01-01
申请号：US12521853
申请日：2008-10-27
申请人： Daniel N. Carothers , Craig M. Hill , Andrew T. S. Pomerene , Vu A. Vu , Robert Kamocsai , Timothy J. Conway
发明人： Daniel N. Carothers , Craig M. Hill , Andrew T. S. Pomerene , Vu A. Vu , Robert Kamocsai , Timothy J. Conway
IPC分类号： H01L21/00
CPC分类号： H01L27/1467
摘要： An improved method for manufacturing a lateral germanium detector is disclosed. A detector window is opened through an oxide layer to expose a doped single crystalline silicon layer situated on a substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished to leave only a small portion around the single crystal germanium layer. A dielectric layer is deposited on the amorphous germanium layer and the single crystal germanium layer. Using resist masks and ion implants, multiple doped regions are formed on the single crystal germanium layer. After opening several oxide windows on the dielectric layer, a refractory metal layer is deposited on the doped regions to form multiple germanide layers.
摘要翻译：公开了用于制造侧向锗检测器的改进方法。检测器窗口通过氧化物层打开以暴露位于衬底上的掺杂单晶硅层。接下来，在检测器窗口内生长单晶锗层，并且在氧化物层上生长非晶锗层。然后抛光无定形锗层以在单晶锗层周围仅留下一小部分。介电层沉积在非晶锗层和单晶锗层上。使用抗蚀剂掩模和离子注入，在单晶锗层上形成多个掺杂区。在介电层上打开几个氧化物窗后，在掺杂区域上沉积难熔金属层以形成多个锗化物层。

6. 发明授权

US07811844B2 Method for fabricating electronic and photonic devices on a semiconductor substrate 有权
标题翻译：在半导体衬底上制造电子和光子器件的方法
公开(公告)号：US07811844B2
公开(公告)日：2010-10-12
申请号：US12201943
申请日：2008-08-29
申请人： Daniel N. Carothers , Craig M. Hill , Andrew T. S. Pomerene , Timothy J. Conway , Rick L. Thompson , Vu A. Vu , Robert Kamocsai , Joe Giunta , Jonathan N. Ishii
发明人： Daniel N. Carothers , Craig M. Hill , Andrew T. S. Pomerene , Timothy J. Conway , Rick L. Thompson , Vu A. Vu , Robert Kamocsai , Joe Giunta , Jonathan N. Ishii
IPC分类号： H01L21/00
CPC分类号： H01L27/0617
摘要： A method for fabricating photonic and electronic devices on a substrate is disclosed. Multiple slabs are initially patterned and etched on a layer of a substrate. An electronic device is fabricated on a first one of the slabs and a photonic device is fabricated on a second one of the slabs, such that the electronic device and the photonic device are formed on the same layer of the substrate.
摘要翻译：公开了一种在衬底上制造光子和电子器件的方法。最初对多个板坯进行图案化并在衬底层上进行蚀刻。在第一板上制造电子器件，并且在第二板上制造光子器件，使得电子器件和光子器件形成在基片的同一层上。

7. 发明授权

US07927979B2 Multi-thickness semiconductor with fully depleted devices and photonic integration 有权
标题翻译：具有完全耗尽器件和光子整合的多厚度半导体
公开(公告)号：US07927979B2
公开(公告)日：2011-04-19
申请号：US12913187
申请日：2010-10-27
申请人： Craig M. Hill , Andrew T S Pomerene , Daniel N. Carothers , Timothy J. Conway , Vu A. Vu
发明人： Craig M. Hill , Andrew T S Pomerene , Daniel N. Carothers , Timothy J. Conway , Vu A. Vu
IPC分类号： H01L21/762 , H01L27/12
CPC分类号： H01L21/84 , G02B6/136 , H01L27/1203 , H01L2924/0002 , H01L2924/00
摘要： Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.
摘要翻译：公开了促进包括不同厚度的结构和器件的半导体的制造的技术。一个实施例提供了一种用于半导体器件制造的方法，其包括使要形成器件的半导体晶片的区域变薄从而限定晶片的薄区域和厚区域。该方法继续在厚区域上形成一个或多个光子器件和/或部分耗尽的电子器件，并且在薄区域上形成一个或多个完全耗尽的电子器件。另一个实施例提供一种半导体器件，其包括限定薄区域和厚区域的半导体晶片。该器件还包括形成在厚区域上的一个或多个光子器件和/或部分耗尽的电子器件，以及形成在薄区域上的一个或多个完全耗尽的电子器件。可以在薄区域和厚区域之间形成隔离区域。

8. 发明授权

US08148265B2 Two-step hardmask fabrication methodology for silicon waveguides 有权
标题翻译：硅波导的两步硬掩模制造方法
公开(公告)号：US08148265B2
公开(公告)日：2012-04-03
申请号：US12201807
申请日：2008-08-29
申请人： Daniel N. Carothers , Craig M. Hill , Andrew T. Pomerene
发明人： Daniel N. Carothers , Craig M. Hill , Andrew T. Pomerene
IPC分类号： H01L21/302
CPC分类号： G02B6/136 , B82Y20/00 , G02B6/1223 , G02B2006/12061 , G02B2006/12097
摘要： Techniques are disclosed for efficiently fabricating semiconductors including waveguide structures. In particular, a two-step hardmask technology is provided that enables a stable etch base within semiconductor processing environments, such as the CMOS fabrication environment. The process is two-step in that there is deposition of a two-layer hardmask, followed by a first photolithographic pattern, followed by a first silicon etch, then a second photolithographic pattern, and then a second silicon etch. The process can be used, for example, to form a waveguide structure having both ridge and channel configurations, or a waveguide (ridge and/or channel) and a salicide heater structure, all achieved using the same hardmask. The second photolithographic pattern allows for the formation of the lower electrical contacts to the waveguides (or other structures) without a complicated rework of the hardmask.
摘要翻译：公开了用于有效地制造包括波导结构的半导体的技术。特别地，提供两步硬掩模技术，其能够在诸如CMOS制造环境的半导体处理环境内实现稳定的蚀刻基底。该过程是两步，其中存在两层硬掩模的沉积，随后是第一光刻图案，接着是第一硅蚀刻，然后是第二光刻图案，然后是第二硅蚀刻。该工艺可以用于例如形成具有脊和沟道结构的波导结构，或者使用相同硬掩模实现的波导（脊和/或沟道）和自对准硅加热器结构。第二光刻图案允许在波导（或其他结构）下形成较低的电触点，而不需要硬掩模的复杂的返工。

9. 发明申请

US20100055906A1 TWO-STEP HARDMASK FABRICATION METHODOLOGY FOR SILICON WAVEGUIDES 有权
标题翻译：用于硅波的两步骤硬化制造方法
公开(公告)号：US20100055906A1
公开(公告)日：2010-03-04
申请号：US12201807
申请日：2008-08-29
申请人： Daniel N. Carothers , Craig M. Hill , Andrew T. Pomerene
发明人： Daniel N. Carothers , Craig M. Hill , Andrew T. Pomerene
IPC分类号： H01L21/302
CPC分类号： G02B6/136 , B82Y20/00 , G02B6/1223 , G02B2006/12061 , G02B2006/12097
摘要： Techniques are disclosed for efficiently fabricating semiconductors including waveguide structures. In particular, a two-step hardmask technology is provided that enables a stable etch base within semiconductor processing environments, such as the CMOS fabrication environment. The process is two-step in that there is deposition of a two-layer hardmask, followed by a first photolithographic pattern, followed by a first silicon etch, then a second photolithographic pattern, and then a second silicon etch. The process can be used, for example, to form a waveguide structure having both ridge and channel configurations, or a waveguide (ridge and/or channel) and a salicide heater structure, all achieved using the same hardmask. The second photolithographic pattern allows for the formation of the lower electrical contacts to the waveguides (or other structures) without a complicated rework of the hardmask.
摘要翻译：公开了用于有效地制造包括波导结构的半导体的技术。特别地，提供两步硬掩模技术，其能够在诸如CMOS制造环境的半导体处理环境内实现稳定的蚀刻基底。该过程是两步，其中存在两层硬掩模的沉积，随后是第一光刻图案，接着是第一硅蚀刻，然后是第二光刻图案，然后是第二硅蚀刻。该工艺可以用于例如形成具有脊和沟道结构的波导结构，或者使用相同硬掩模实现的波导（脊和/或沟道）和自对准硅加热器结构。第二光刻图案允许在波导（或其他结构）下形成较低的电触点，而不需要硬掩模的复杂的返工。

10. 发明申请

US20110036289A1 METHOD FOR GROWING GERMANIUM EPITAXIAL FILMS 有权
标题翻译：生长锗外膜的方法
公开(公告)号：US20110036289A1
公开(公告)日：2011-02-17
申请号：US12539003
申请日：2009-08-11
申请人： Daniel N. Carothers , Craig M. Hill , Andrew T.S. Pomerene , Vu A. Vu
发明人： Daniel N. Carothers , Craig M. Hill , Andrew T.S. Pomerene , Vu A. Vu
IPC分类号： C30B25/02
CPC分类号： H01L21/02532 , H01L21/02381 , H01L21/0245 , H01L21/02502 , H01L21/02579 , H01L21/0262 , H01L21/02645 , H01L21/02658
摘要： A method for growing germanium epitaxial films is disclosed. Initially, a silicon substrate is preconditioned with hydrogen gas. The temperature of the preconditioned silicon substrate is then decreased, and germane gas is flowed over the preconditioned silicon substrate to form an intrinsic germanium seed layer. Next, a mixture of germane and phosphine gases can be flowed over the intrinsic germanium seed layer to produce an n-doped germanium seed layer. Otherwise, a mixture of diborane and germane gases can be flowed over the intrinsic germanium seed layer to produce a p-doped germanium seed layer. At this point, a bulk germanium layer can be grown on top of the doped germanium seed layer.
摘要翻译：公开了一种用于生长锗外延膜的方法。首先，用氢气预处理硅衬底。然后，预处理的硅衬底的温度降低，并且锗烷气体在预处理的硅衬底上流动以形成固有的锗种子层。接下来，可以将锗烷烃和磷化氢气体的混合物流过本征锗种子层，以产生n掺杂的锗种子层。否则，乙硼烷和锗烷气体的混合物可以流过本征锗种子层，以产生p掺杂锗种子层。此时，可以在掺杂的锗种子层的顶部上生长大块锗层。

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