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1. 发明授权

US11658623B2 Class D amplifiers 有权
公开(公告)号：US11658623B2
公开(公告)日：2023-05-23
申请号：US17378861
申请日：2021-07-19
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： John Paul Lesso , Toru Ido
IPC分类号： H03F3/21 , H03F3/217 , H04R3/00 , H04R29/00 , H03F3/185
CPC分类号： H03F3/2173 , H04R3/00 , H04R29/001 , H03F3/185 , H03F2200/03 , H03F2200/165 , H03F2200/168 , H03F2200/267 , H04R2499/11
摘要： The present disclosure relates to Class D amplifier circuitry comprising a mode controller configured to dynamically adjust an operational switching mode of the Class D amplifier over a range between a Class AD mode and a Class BD mode.

2. 发明授权

US10461714B2 Class D amplifier circuit 有权
公开(公告)号：US10461714B2
公开(公告)日：2019-10-29
申请号：US15886103
申请日：2018-02-01
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： John Paul Lesso , Toru Ido
IPC分类号： H03F1/34 , H03G3/30 , H03F3/217 , H03F1/26 , H03F1/32 , H03F3/187 , H03G7/00
摘要： This application relates to Class D amplifier circuits (200). A modulator (201) controls a Class D output stage (202) based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block (205), which may comprise an ADC (207), generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input (204) of a signal selector block (203). The input signal may be received at a second input (206) of the signal selector block (203). The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block (205).

3. 发明授权

US09628040B2 Class D amplifier circuit 有权
公开(公告)号：US09628040B2
公开(公告)日：2017-04-18
申请号：US14836006
申请日：2015-08-26
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： John Paul Lesso , Toru Ido
IPC分类号： H03F3/217 , H03G3/30 , H03F1/26 , H03F1/32 , H03F3/187 , H03F1/34
CPC分类号： H03G3/3089 , H03F1/26 , H03F1/32 , H03F1/34 , H03F3/187 , H03F3/217 , H03F3/2171 , H03F3/2173 , H03F3/2175 , H03F2200/102 , H03F2200/339 , H03F2200/432 , H03G7/002 , H03G7/007
摘要： This application relates to Class D amplifier circuits (200). A modulator (201) controls a Class D output stage (202) based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block (205), which may comprise an ADC (207), generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input (204) of a signal selector block (203). The input signal may be received at a second input (206) of the signal selector block (203). The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block (205).

4. 发明申请

US20170019079A1 CLASS-D AMPLIFIER CIRCUITS 有权
标题翻译： CLASS-D放大器电路
公开(公告)号：US20170019079A1
公开(公告)日：2017-01-19
申请号：US15278862
申请日：2016-09-28
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： John P. Lesso , Toru Ido
IPC分类号： H03F3/217 , H03G1/00 , H03F3/187
CPC分类号： H03F3/2171 , H03F1/0211 , H03F3/187 , H03F3/217 , H03F2200/165 , H03F2200/171 , H03F2200/333 , H03F2200/351 , H03G1/0088
摘要： Methods and apparatus for Class-D amplifier circuits with improved power efficiency. The circuit has an output stage with at least first and second switches and a modulator that receives an input signal to be amplified, SIN, and a first clock signal fSW. The modulator controls the duty cycles of the first and second switches, within a switching cycle based on the input signal, wherein the switching cycle has a switching frequency based on the first clock signal. A frequency controller controls the frequency of the first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second, lower, input signal amplitude. A lower switching frequency can be tolerated at low signal amplitudes and varying the switching frequency in this way thus maintains stability whilst reducing switching power losses.
摘要翻译：具有提高功率效率的D类放大器电路的方法和装置。电路具有至少具有第一和第二开关的输出级和接收要被放大的输入信号SIN和第一时钟信号fSW的调制器。调制器基于输入信号在开关周期内控制第一和第二开关的占空比，其中开关周期具有基于第一时钟信号的开关频率。频率控制器响应于输入信号的幅度的指示来控制第一时钟信号的频率，以便提供第一输入信号幅度的第一开关频率和在第二输入信号幅度下的第二，较低开关频率，输入信号幅度。在低信号幅度下可以容忍较低的开关频率，并且以这种方式改变开关频率，从而在降低开关功率损耗的同时保持稳定性。

5. 发明授权

US12144606B2 Cough detection 有权
公开(公告)号：US12144606B2
公开(公告)日：2024-11-19
申请号：US18406665
申请日：2024-01-08
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： John P. Lesso , Yanto Suryono , Toru Ido
IPC分类号： A61B5/08 , A61B5/00
CPC分类号： A61B5/0823 , A61B5/0803 , A61B5/6803 , A61B5/7246 , A61B5/725 , A61B5/7264 , A61B5/7275 , A61B2562/0219
摘要： A method of cough detection in a headset, the method comprising: receiving a first signal from an external transducer of the headset; receiving a second signal from an in-ear transducer of the headset; and detecting a cough of a user of the headset based on the first and second signals.

6. 发明授权

US11958075B2 Driver circuitry 有权
公开(公告)号：US11958075B2
公开(公告)日：2024-04-16
申请号：US17092613
申请日：2020-11-09
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： John P. Lesso , Toru Ido
IPC分类号： H03K17/30 , B06B1/02 , B06B1/06
CPC分类号： B06B1/0223 , B06B1/06 , H03K17/30 , B06B2201/55
摘要： The present disclosure relates to circuitry for driving a load. The circuitry comprises driver circuitry configured to generate a drive signal, based on an input signal to the driver circuitry, for driving the load, and commutator circuitry for coupling the driver circuitry to the load. The commutator circuitry is configured to alternate between commutation states in response to a level of the drive signal meeting a drive signal threshold or in response to a level of the input signal meeting a first input signal threshold. The circuitry is configured to apply an offset to the input signal when the input signal is below a second input signal threshold so as to increase a minimum level of the drive signal above the drive signal threshold or to increase a minimum level of the input signal above the first input signal threshold.

7. 发明授权

US11846600B2 Circuitry for analyte measurement 有权
公开(公告)号：US11846600B2
公开(公告)日：2023-12-19
申请号：US17463796
申请日：2021-09-01
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： John P. Lesso , Toru Ido
IPC分类号： G01N27/327 , G01R19/165
CPC分类号： G01N27/3273 , G01R19/165 , G01R19/16566
摘要： Circuitry for measuring a characteristic of an electrochemical cell, the circuitry comprising: a comparator having a first comparator input, a second comparator input and a comparator output; a feedback path between the comparator output and the second comparator input configured to provide a feedback signal to the second comparator input; and a loop filter configured to apply filtering to the feedback path to generate the feedback signal, wherein the loop filter comprises the electrochemical cell.

8. 发明授权

US11705109B2 Detection of live speech 有权
公开(公告)号：US11705109B2
公开(公告)日：2023-07-18
申请号：US17091316
申请日：2020-11-06
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： John Paul Lesso , Toru Ido
IPC分类号： G10L15/06 , G10L19/26 , G10L25/78 , G10L25/93
CPC分类号： G10L15/06 , G10L19/26 , G10L25/78 , G10L2025/937
摘要： A method of detecting live speech comprises: receiving a signal containing speech; obtaining a first component of the received signal in a first frequency band, wherein the first frequency band includes audio frequencies; and obtaining a second component of the received signal in a second frequency band higher than the first frequency band. Then, modulation of the first component of the received signal is detected; modulation of the second component of the received signal is detected; and the modulation of the first component of the received signal and the modulation of the second component of the received signal are compared. It may then be determined that the speech may not be live speech, if the modulation of the first component of the received signal differs from the modulation of the second component of the received signal.

9. 发明授权

US11509272B2 Time encoding modulator circuitry 有权
公开(公告)号：US11509272B2
公开(公告)日：2022-11-22
申请号：US17319620
申请日：2021-05-13
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： John P. Lesso , Toru Ido
IPC分类号： H03F3/217 , H03F1/32 , H03F3/181
摘要： This application describes time-encoding modulator circuitry (200), and in particular a PWM modulator suitable for use for a class-D amplifier. A forward signal path receives a digital input signal (Din) and outputs an output PWM signal (Sout) and includes a first PWM modulator (101). A feedback path provides feedback to an input of the first PWM modulator (101). The feedback path includes an ADC (203) which receive a first PWM signal (Sa) derived from the output PWM signal. The ADC (203) includes a second PWM modulator (401) which generates a second PWM signal (Sb) based on the first PWM signal. A controller (201) controls the second PWM modulator such that a PWM carrier of the second PWM signal is phase and frequency matched to a PWM carrier of the output PWM signal.

10. 发明授权

US10171049B2 Class-D amplifier circuits 有权
公开(公告)号：US10171049B2
公开(公告)日：2019-01-01
申请号：US15726584
申请日：2017-10-06
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： John P. Lesso , Toru Ido
IPC分类号： H03F3/38 , H03F3/217 , H03F1/02 , H03F3/187 , H03G1/00
摘要： Methods and apparatus for Class-D amplifier circuits with improved power efficiency. The circuit has an output stage with at least first and second switches and a modulator that receives an input signal to be amplified, SIN, and a first clock signal fSW. The modulator controls the duty cycles of the first and second switches, within a switching cycle based on the input signal, wherein the switching cycle has a switching frequency based on the first clock signal. A frequency controller controls the frequency of the first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second, lower, input signal amplitude. A lower switching frequency can be tolerated at low signal amplitudes and varying the switching frequency in this way thus maintains stability whilst reducing switching power losses.

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