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1. 发明授权

US08487684B2 Method for buffering clock skew by using a logical effort 有权
标题翻译：通过使用逻辑努力缓冲时钟偏移的方法
公开(公告)号：US08487684B2
公开(公告)日：2013-07-16
申请号：US13155523
申请日：2011-06-08
申请人： Chung-Ying Hsieh , Ming-Hung Chang , Wei Hwang
发明人： Chung-Ying Hsieh , Ming-Hung Chang , Wei Hwang
IPC分类号： G06F1/04 , H03K3/00
CPC分类号： G06F1/10
摘要： A method buffers clock skew by using a logical effort, and is applicable to a clock tree that stays in a strong-inversion region, a moderate-inversion region, or a weak-inversion region. The method includes establishing in the clock tree a temperature sensor and a tunable-width buffer, and establishing width and temperature comparative lists according to a logical effort equation, for the tunable-width buffer to be individually applied to the strong-inversion region, the moderate-inversion region, and the weak-inversion region; selecting one from the width and temperature comparative lists that corresponds to one of the inversion regions in which the clock tree stays, enabling the temperature sensor to sense a temperature, and searching the selected width and temperature comparative list for a width that corresponds to the temperature sensed by the temperature sensor; and enabling the tunable-width buffer to perform a width modulation process according to the searched width.
摘要翻译：一种方法通过使用逻辑努力来缓冲时钟偏移，并且适用于停留在强反转区域，中等反转区域或弱反转区域中的时钟树。该方法包括在时钟树中建立温度传感器和可调宽度缓冲器，并且根据逻辑努力方程建立宽度和温度比较列表，对于可单独应用于强反转区域的可调宽度缓冲器，中等反演区域和弱反演区域; 从与时钟树停留的反转区域中的一个对应的宽度和温度比较列表中选择一个，使得温度传感器能够感测温度，并且在所选择的宽度和温度比较列表中搜索对应于温度的宽度由温度传感器感测; 并且使得可调宽度缓冲器能够根据所搜索的宽度执行宽度调制处理。

2. 发明授权

US08237477B1 Programmable clock generator used in dynamic-voltage-and-frequency-scaling (DVFS) operated in sub- and near- threshold region 有权
标题翻译：用于动态电压和频率缩放（DVFS）的可编程时钟发生器用于子阈值和近阈值区域
公开(公告)号：US08237477B1
公开(公告)日：2012-08-07
申请号：US13067232
申请日：2011-05-18
申请人： Chung-Ying Hsieh , Ming-Hung Chang , Wei Hwang
发明人： Chung-Ying Hsieh , Ming-Hung Chang , Wei Hwang
IPC分类号： H03L7/06
CPC分类号： H03L7/0816 , H03L1/00 , H03L7/0814
摘要： A programmable clock generator, which is used in dynamic-voltage-and-frequency-scaling (DVFS) operated in Sub- and Near-Threshold region. The programmable clock generator includes first pulse generating unit and a pulse multiplier. A first counter is configured to generate a first counting signal, so as to control the phase detector comparing the phase difference between a first pulse signal and a second pulse signal. A first control signal is transmitted by a control unit in accordance with a phase difference signal, and the phase of the second pulse signal is adjusted by a lock-in delay unit, so that a predetermined phase is generated between the first pulse signal and the second pulse signal. The PVT variation may be compensated by the programmable clock generator during the sub threshold region. Therefore, the period of reference clock is in the locking range of lock-in delay line.
摘要翻译：可编程时钟发生器，用于在子阈值和近阈值区域工作的动态电压和频率缩放（DVFS）。可编程时钟发生器包括第一脉冲发生单元和脉冲乘法器。第一计数器被配置为产生第一计数信号，以便控制相位检测器比较第一脉冲信号和第二脉冲信号之间的相位差。第一控制信号由控制单元根据相位差信号发送，第二脉冲信号的相位由锁定延迟单元调整，使得在第一脉冲信号和第二脉冲信号之间产生预定的相位第二脉冲信号。 PVT变化可以由子阈值区域内的可编程时钟发生器补偿。因此，参考时钟周期处于锁定延迟线的锁定范围。

3. 发明申请

US20120169394A1 METHOD FOR BUFFERING CLOCK SKEW BY USING A LOGICAL EFFORT 有权
标题翻译：使用逻辑效应来缓冲时钟的方法
公开(公告)号：US20120169394A1
公开(公告)日：2012-07-05
申请号：US13155523
申请日：2011-06-08
申请人： Chung-Ying Hsieh , Ming-Hung Chang , Wei Hwang
发明人： Chung-Ying Hsieh , Ming-Hung Chang , Wei Hwang
IPC分类号： G06F1/10
CPC分类号： G06F1/10
摘要： A method buffers clock skew by using a logical effort, and is applicable to a clock tree that stays in a strong-inversion region, a moderate-inversion region, or a weak-inversion region. The method includes establishing in the clock tree a temperature sensor and a tunable-width buffer, and establishing width and temperature comparative lists according to a logical effort equation, for the tunable-width buffer to be individually applied to the strong-inversion region, the moderate-inversion region, and the weak-inversion region; selecting one from the width and temperature comparative lists that corresponds to one of the inversion regions in which the clock tree stays, enabling the temperature sensor to sense a temperature, and searching the selected width and temperature comparative list for a width that corresponds to the temperature sensed by the temperature sensor; and enabling the tunable-width buffer to perform a width modulation process according to the searched width.
摘要翻译：一种方法通过使用逻辑努力来缓冲时钟偏移，并且适用于停留在强反转区域，中等反转区域或弱反转区域中的时钟树。该方法包括在时钟树中建立温度传感器和可调宽度缓冲器，并且根据逻辑努力方程建立宽度和温度比较列表，对于可单独应用于强反转区域的可调宽度缓冲器，中等反演区域和弱反演区域; 从与时钟树停留的反转区域中的一个对应的宽度和温度比较列表中选择一个，使得温度传感器能够感测温度，并且在所选择的宽度和温度比较列表中搜索对应于温度的宽度由温度传感器感测; 并且使得可调宽度缓冲器能够根据所搜索的宽度执行宽度调制处理。

4. 发明授权

US08437178B2 Static random access memory cell and method of operating the same 有权
标题翻译：静态随机存取存储单元及其操作方法
公开(公告)号：US08437178B2
公开(公告)日：2013-05-07
申请号：US13096796
申请日：2011-04-28
申请人： Yi-Te Chiu , Ming-Hung Chang , Hao-I Yang , Wei Hwang
发明人： Yi-Te Chiu , Ming-Hung Chang , Hao-I Yang , Wei Hwang
IPC分类号： G11C11/00
CPC分类号： G11C11/412
摘要： A static random access memory cell includes a latch unit. The latch unit includes a bi-inverting circuit and a switching circuit. The bi-inverting circuit has a first terminal and a second terminal. The switching circuit is electrically connected between the first terminal and the second terminal, wherein when the switching circuit is turned on, the switching circuit forms a feedback between the first terminal and the second terminal for latching the latch unit; and when the switching circuit is turned off, the feedback is removed to cause the SRAM cell to write a data bit to the latch unit.
摘要翻译：静态随机存取存储单元包括一个锁存单元。锁存单元包括双向电路和开关电路。双向电路具有第一端子和第二端子。开关电路电连接在第一端子和第二端子之间，其中当开关电路导通时，开关电路在第一端子和第二端子之间形成用于锁存闩锁单元的反馈; 并且当切换电路关闭时，消除反馈以使SRAM单元向锁存单元写入数据位。

5. 发明申请

US20120170616A1 Apparatus and Method for Sensing Temperature 审中-公开
标题翻译：用于感应温度的装置和方法
公开(公告)号：US20120170616A1
公开(公告)日：2012-07-05
申请号：US13117487
申请日：2011-05-27
申请人： Kun-Ju Tsai , Shang-Yuan Lin , Shi-Wen Chen , Ming-Hung Chang , Wei Hwang
发明人： Kun-Ju Tsai , Shang-Yuan Lin , Shi-Wen Chen , Ming-Hung Chang , Wei Hwang
IPC分类号： G01K7/00
CPC分类号： G01K7/32 , G01K7/01
摘要： An apparatus and a method for sensing temperature are provided. The apparatus includes a first oscillation circuit, a pulse width generator, and a comparison circuit. The first oscillation circuit is for generating a first signal having a first frequency which is related to a to-be-sensed temperature. The pulse width generator is for generating a pulse width signal, the pulse width signal having a pulse width related to the to-be-sensed temperature. The comparison circuit is for generating an output signal indicative of the value of the to-be-sensed temperature according to the first signal and the pulse width signal.
摘要翻译：提供了一种用于感测温度的装置和方法。该装置包括第一振荡电路，脉冲宽度发生器和比较电路。第一振荡电路用于产生具有与待检测温度相关的第一频率的第一信号。脉冲宽度发生器用于产生脉冲宽度信号，该脉冲宽度信号具有与待感测温度相关的脉冲宽度。比较电路用于根据第一信号和脉冲宽度信号产生指示待检测温度的值的输出信号。

6. 发明申请

US20120307548A1 DUAL-PORT SUBTHRESHOLD SRAM CELL 有权
标题翻译：双端口SUBTHRESHOLD SRAM单元
公开(公告)号：US20120307548A1
公开(公告)日：2012-12-06
申请号：US13243690
申请日：2011-09-23
申请人： Yi-Te Chiu , Ming-Hung Chang , Hao-I Yang , Wei Hwang
发明人： Yi-Te Chiu , Ming-Hung Chang , Hao-I Yang , Wei Hwang
IPC分类号： G11C11/412 , G11C11/419
CPC分类号： G11C11/412 , G11C19/287
摘要： An innovative dual-port subthreshold static random access memory (SRAM) cell for sub-threshold voltage operation is disclosed. During write mode, the dual-port subthreshold SRAM cell would cut off the positive feedback loop of the inverters and utilize the reverse short-channel effect to enhance write capability. The single-ended read/write port structure further reduces power consumption of the lengthy bit line. Therefore, the dual-port subthreshold SRAM cell is a suitable for long operation in a first-in first-out memory system. Although the lower voltage reduces the stability of the memory cell, the dual-port subthreshold SRAM cell of the present invention can still stably operate.
摘要翻译：公开了用于亚阈值电压操作的创新的双端口亚阈值静态随机存取存储器（SRAM）单元。在写模式下，双端口亚阈值SRAM单元将切断反相器的正反馈环路，并利用反向短沟道效应提高写入能力。单端读/写端口结构进一步降低了冗长位线的功耗。因此，双端口亚阈值SRAM单元适合于先进先出存储器系统中的长操作。虽然较低的电压降低了存储单元的稳定性，但是本发明的双端口亚阈值SRAM单元仍然可以稳定地工作。

7. 发明授权

US08125263B2 Charge pump 有权
标题翻译：电荷泵
公开(公告)号：US08125263B2
公开(公告)日：2012-02-28
申请号：US12827111
申请日：2010-06-30
申请人： Chun-Yi Wu , Wei-Chih Hsieh , Ming-Hung Chang , Wei Hwang
发明人： Chun-Yi Wu , Wei-Chih Hsieh , Ming-Hung Chang , Wei Hwang
IPC分类号： G05F1/10 , G05F3/02
CPC分类号： H02M3/073 , H02M2003/077
摘要： A charge pump is disclosed for amplifying an input voltage received at an input end and outputting the amplified voltage at an output end as an output voltage. The charge pump includes a plurality of source/drain coupling transistors for serving as charging capacitors, and a plurality of cascode-connected transistors being symmetrically connected to between the input end and the output end. The charge pump further includes a plurality of diode-connected transistors to protect the source/drain coupling transistors against breakdown during the course of charge transfer and to speed up the charge transfer.
摘要翻译：公开了一种用于放大在输入端接收的输入电压并将输出端的放大电压作为输出电压输出的电荷泵。电荷泵包括用作充电电容器的多个源极/漏极耦合晶体管，并且多个共源共栅连接晶体管对称地连接到输入端和输出端之间。电荷泵还包括多个二极管连接的晶体管，以在电荷转移过程中保护源极/漏极耦合晶体管免受击穿并且加速电荷转移。

8. 发明申请

US20080175030A1 STORED DON'T-CARE BASED HIERARCHICAL SEARCH-LINE SCHEME 有权
标题翻译：基于不相干的分层搜索线方案
公开(公告)号：US20080175030A1
公开(公告)日：2008-07-24
申请号：US11675386
申请日：2007-02-15
申请人： Shu-Wei CHANG , Wei Hwang , Ming-Hung Chang , Po-Tsang Huang
发明人： Shu-Wei CHANG , Wei Hwang , Ming-Hung Chang , Po-Tsang Huang
IPC分类号： G11C15/00
CPC分类号： G11C15/04
摘要： In the proposed stored don't-care hierarchical search-line scheme, a content-addressable memory (CAM) is divided into several blocks. Each block contains a plurality of local search-lines, a global search-line, a buffer and a memory cell. Data are stored in the blocks in order according to the length of the prefix. Data with the longest prefix is stored at the bottommost, and its don't-care state is used as the control signal of the buffer to control whether to transfer the data on the global search-line to the local search-line or not. The local search-line then transfer the value into the memory cell. There is no complex control circuit and extra storage device needed. Moreover, because the control signal directly comes from the don't-care state, power consumption on search-lines can be effectively reduced with no increase of search delay.
摘要翻译：在所提出的不存在的分层搜索线方案中，内容寻址存储器（CAM）被分成几个块。每个块包含多个本地搜索行，全局搜索行，缓冲区和存储单元。数据按照前缀的长度顺序存储在块中。具有最长前缀的数据被存储在最底部，并且其不关心状态被用作缓冲器的控制信号，以控制是否将全局搜索行上的数据传送到本地搜索行。然后本地搜索行将值传送到存储单元。没有复杂的控制电路和额外的存储设备需要。此外，由于控制信号直接来自不注意状态，因此可以有效地减少搜索线上的功耗，而不增加搜索延迟。

9. 发明授权

US08419274B2 Fully-on-chip temperature, process, and voltage sensor system 有权
标题翻译：全面的温度，过程和电压传感器系统
公开(公告)号：US08419274B2
公开(公告)日：2013-04-16
申请号：US12910199
申请日：2010-10-22
申请人： Shi-Wen Chen , Ming-Hung Chang , Wei-Chih Hsieh , Wei Hwang
发明人： Shi-Wen Chen , Ming-Hung Chang , Wei-Chih Hsieh , Wei Hwang
IPC分类号： G01K7/00
CPC分类号： G01K7/01 , G01K2219/00
摘要： A fully on-chip temperature, process, and voltage sensor includes a voltage sensor, a process sensor and a temperature sensor. The temperature sensor includes a bias current generator, a ring oscillator, a fixed pulse generator, an AND gate, and a first counter. The bias current generator generates an output current related to temperature according to the operating voltage of chip. The ring oscillator generates an oscillation signal according to the output current. The fixed pulse generator generates a fixed pulse signal. The AND gate is connected to the ring oscillator and the fixed pulse generator for performing a logic AND operation on the oscillation signal and the fixed pulse signal, and generating a temperature sensor signal.
摘要翻译：完全片上的温度，过程和电压传感器包括电压传感器，过程传感器和温度传感器。温度传感器包括偏置电流发生器，环形振荡器，固定脉冲发生器，与门和第一计数器。偏置电流发生器根据芯片的工作电压产生与温度相关的输出电流。环形振荡器根据输出电流产生振荡信号。固定脉冲发生器产生固定的脉冲信号。与门连接到环形振荡器和固定脉冲发生器，用于对振荡信号和固定脉冲信号进行逻辑与运算，并产生温度传感器信号。

10. 发明申请

US20120230086A1 STATIC RANDOM ACCESS MEMORY CELL AND METHOD OF OPERATING THE SAME 有权
标题翻译：静态随机访问存储单元及其操作方法
公开(公告)号：US20120230086A1
公开(公告)日：2012-09-13
申请号：US13096796
申请日：2011-04-28
申请人： Yi-Te Chiu , Ming-Hung Chang , Hao-I Yang , Wei Hwang
发明人： Yi-Te Chiu , Ming-Hung Chang , Hao-I Yang , Wei Hwang
IPC分类号： G11C11/00
CPC分类号： G11C11/412
摘要： A static random access memory cell includes a latch unit. The latch unit includes a bi-inverting circuit and a switching circuit. The bi-inverting circuit has a first terminal and a second terminal. The switching circuit is electrically connected between the first terminal and the second terminal, wherein when the switching circuit is turned on, the switching circuit forms a feedback between the first terminal and the second terminal for latching the latch unit; and when the switching circuit is turned off, the feedback is removed to cause the SRAM cell to write a data bit to the latch unit.
摘要翻译：静态随机存取存储单元包括一个锁存单元。锁存单元包括双向电路和开关电路。双向电路具有第一端子和第二端子。开关电路电连接在第一端子和第二端子之间，其中当开关电路导通时，开关电路在第一端子和第二端子之间形成用于锁存闩锁单元的反馈; 并且当切换电路关闭时，消除反馈以使SRAM单元向锁存单元写入数据位。

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