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1. 发明申请

US20090179875A1 Flat display and driving method thereof 审中-公开
标题翻译：平板显示及其驱动方法
公开(公告)号：US20090179875A1
公开(公告)日：2009-07-16
申请号：US12153210
申请日：2008-05-15
申请人： Chung-Lung Li , Kuang-Hsiang Liu , Tsang-Hong Wang
发明人： Chung-Lung Li , Kuang-Hsiang Liu , Tsang-Hong Wang
IPC分类号： G06F3/038
CPC分类号： G09G3/3677 , G09G3/3648 , G09G2300/0426 , G09G2300/0443 , G09G2310/02 , G09G2310/0218 , G09G2310/0281 , G09G2310/0297 , G09G2320/0219
摘要： A flat display includes a substrate, multiple data lines, multiple scan lines, a source driving unit and a gate driving unit. The substrate includes a pixel array. The data lines are electrically connected to the pixel array. The scan lines including p groups of scan lines are electrically connected to the pixel array, wherein p is a positive integer. Some of the scan lines in the same group are not adjacent to each other. The source driving unit is electrically connected to the data lines. The gate driving unit includes p shift register circuits respectively enabling the p groups of scan lines. In a first frame period, p groups of scan lines are enabled according to a first sequence of groups, and in a second frame period, p groups of scan lines are enabled according to a second sequence of groups which is different from the first sequence of groups.
摘要翻译：平面显示器包括基板，多条数据线，多条扫描线，源极驱动单元和栅极驱动单元。衬底包括像素阵列。数据线电连接到像素阵列。包括p组扫描线的扫描线电连接到像素阵列，其中p是正整数。同一组中的某些扫描线不相邻。源极驱动单元电连接到数据线。栅极驱动单元包括分别使能p组扫描线的p移位寄存器电路。在第一帧周期中，根据第一组序列启用p组扫描线，并且在第二帧周期中，根据与第一帧序列的第一序列不同的第二组序列来启用p组扫描线团体

2. 发明授权

US08259895B2 Bidirectional shifter register and method of driving same 有权
标题翻译：双向移位寄存器及其驱动方法
公开(公告)号：US08259895B2
公开(公告)日：2012-09-04
申请号：US13330489
申请日：2011-12-19
申请人： Sheng-Chao Liu , Kuang-Hsiang Liu , Chien-Chang Tseng , Tsang-Hong Wang
发明人： Sheng-Chao Liu , Kuang-Hsiang Liu , Chien-Chang Tseng , Tsang-Hong Wang
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A bidirectional shift register includes first, second, third and fourth control signal bus lines for providing first, second, third and fourth control signals, Bi1, Bi2, Bi3 and Bi4, respectively, and a plurality of shift register stages electrically coupled in serial, each shift register stage having first and second input nodes, where the shift register stages are grouped into a first section and a second section, where the first and second input nodes of each shift register stage in the first section are electrically coupled to the first and second control signal bus lines for receiving the first and second control signals Bi1 and Bi2, respectively, and the first and second input nodes of each shift register stage in the second section are electrically coupled to the third and fourth control signal bus lines for receiving the third and fourth control signals Bi3 and Bi4, respectively.
摘要翻译：双向移位寄存器包括用于分别提供第一，第二，第三和第四控制信号Bi1，Bi2，Bi3和Bi4的第一，第二，第三和第四控制信号总线，以及分别电连接的多个移位寄存器级，每个移位寄存器级具有第一和第二输入节点，其中移位寄存器级被分组为第一部分和第二部分，其中第一部分中每个移位寄存器级的第一和第二输入节点电耦合到第一部分和第二部分，分别用于接收第一和第二控制信号Bi1和Bi2的第二控制信号总线和第二部分中每个移位寄存器级的第一和第二输入节点电耦合到第三和第四控制信号总线，第三和第四控制信号Bi3和Bi4。

3. 发明申请

US20120087461A1 BIDIRECTIONAL SHIFTER REGISTER AND METHOD OF DRIVING SAME 有权
标题翻译：双向移位寄存器及其驱动方法
公开(公告)号：US20120087461A1
公开(公告)日：2012-04-12
申请号：US13330489
申请日：2011-12-19
申请人： Sheng-Chao Liu , Kuang-Hsiang Liu , Chien-Chang Tseng , Tsang-Hong Wang
发明人： Sheng-Chao Liu , Kuang-Hsiang Liu , Chien-Chang Tseng , Tsang-Hong Wang
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A bidirectional shift register includes first, second, third and fourth control signal bus lines for providing first, second, third and fourth control signals, Bi1, Bi2, Bi3 and Bi4, respectively, and a plurality of shift register stages electrically coupled in serial, each shift register stage having first and second input nodes, where the shift register stages are grouped into a first section and a second section, where the first and second input nodes of each shift register stage in the first section are electrically coupled to the first and second control signal bus lines for receiving the first and second control signals Bi1 and Bi2, respectively, and the first and second input nodes of each shift register stage in the second section are electrically coupled to the third and fourth control signal bus lines for receiving the third and fourth control signals Bi3 and Bi4, respectively.
摘要翻译：双向移位寄存器包括用于分别提供第一，第二，第三和第四控制信号Bi1，Bi2，Bi3和Bi4的第一，第二，第三和第四控制信号总线，以及分别电连接的多个移位寄存器级，每个移位寄存器级具有第一和第二输入节点，其中移位寄存器级被分组为第一部分和第二部分，其中第一部分中每个移位寄存器级的第一和第二输入节点电耦合到第一部分和第二部分，分别用于接收第一和第二控制信号Bi1和Bi2的第二控制信号总线和第二部分中每个移位寄存器级的第一和第二输入节点电耦合到第三和第四控制信号总线，第三和第四控制信号Bi3和Bi4。

4. 发明申请

US20110170656A1 BIDRECTIONAL SHIFTER REGISTER AND METHOD OF DRIVING SAME 有权
标题翻译：双向移位寄存器及其驱动方法
公开(公告)号：US20110170656A1
公开(公告)日：2011-07-14
申请号：US12685294
申请日：2010-01-11
申请人： Sheng-Chao Liu , Kuang-Hsiang Liu , Chien-Chang Tseng , Tsang-Hong Wang
发明人： Sheng-Chao Liu , Kuang-Hsiang Liu , Chien-Chang Tseng , Tsang-Hong Wang
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A bidirectional shift register includes first, second, third and four control signal bus lines for providing first, second, third and fourth control signals, Bi1, Bi2, Bi3 and Bi4, respectively, and a plurality of shift register stages electrically coupled in serial, each shift register stage having a first input node and a second input node, where the plurality of shift register stages is grouped into a first section and a second section, wherein the first and second input nodes of each shift register stage in the first section are electrically coupled to the first and second control signal bus lines for receiving the first and second control signals Bi1 and Bi2, respectively, and the first and second input nodes of each shift register stage in the second section are electrically coupled to the third and fourth control signal bus lines for receiving the third and fourth control signals Bi3 and Bi4, respectively.
摘要翻译：双向移位寄存器包括用于分别提供第一，第二，第三和第四控制信号Bi1，Bi2，Bi3和Bi4的第一，第二，第三和第四控制信号总线，以及多个串联电耦合的移位寄存器级，每个移位寄存器级具有第一输入节点和第二输入节点，其中多个移位寄存器级被分组为第一部分和第二部分，其中第一部分中每个移位寄存器级的第一和第二输入节点是电耦合到第一和第二控制信号总线以分别接收第一和第二控制信号Bi1和Bi2，并且第二部分中每个移位寄存器级的第一和第二输入节点电耦合到第三和第四控制器用于分别接收第三和第四控制信号Bi3和Bi4的信号总线。

5. 发明授权

US08102962B2 Bidrectional shifter register and method of driving same 有权
标题翻译：双向移位寄存器及其驱动方法
公开(公告)号：US08102962B2
公开(公告)日：2012-01-24
申请号：US12685294
申请日：2010-01-11
申请人： Sheng-Chao Liu , Kuang-Hsiang Liu , Chien-Chang Tseng , Tsang-Hong Wang
发明人： Sheng-Chao Liu , Kuang-Hsiang Liu , Chien-Chang Tseng , Tsang-Hong Wang
IPC分类号： G11C19/00
CPC分类号： G11C19/28
摘要： A bidirectional shift register includes first, second, third and four control signal bus lines for providing first, second, third and fourth control signals, Bi1, Bi2, Bi3 and Bi4, respectively, and a plurality of shift register stages electrically coupled in serial, each shift register stage having a first input node and a second input node, where the plurality of shift register stages is grouped into a first section and a second section, wherein the first and second input nodes of each shift register stage in the first section are electrically coupled to the first and second control signal bus lines for receiving the first and second control signals Bi1 and Bi2, respectively, and the first and second input nodes of each shift register stage in the second section are electrically coupled to the third and fourth control signal bus lines for receiving the third and fourth control signals Bi3 and Bi4, respectively.
摘要翻译：双向移位寄存器包括分别提供第一，第二，第三和第四控制信号Bi1，Bi2，Bi3和Bi4的第一，第二，第三和第四控制信号总线，以及分别电连接的多个移位寄存器级，每个移位寄存器级具有第一输入节点和第二输入节点，其中多个移位寄存器级被分组为第一部分和第二部分，其中第一部分中每个移位寄存器级的第一和第二输入节点是电耦合到第一和第二控制信号总线以分别接收第一和第二控制信号Bi1和Bi2，并且第二部分中每个移位寄存器级的第一和第二输入节点电耦合到第三和第四控制器用于分别接收第三和第四控制信号Bi3和Bi4的信号总线。

6. 发明申请

US20090278776A1 METHOD FOR DRIVING AN LCD DEVICE 有权
标题翻译：驱动LCD设备的方法
公开(公告)号：US20090278776A1
公开(公告)日：2009-11-12
申请号：US12183076
申请日：2008-07-31
申请人： Cheng-Chiu Pai , Tsang-Hong Wang , Chung-Chun Chen , Kung-Yi Chan , Huan-Hsin Li , Chung-Lung Li
发明人： Cheng-Chiu Pai , Tsang-Hong Wang , Chung-Chun Chen , Kung-Yi Chan , Huan-Hsin Li , Chung-Lung Li
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G3/3648 , G09G2310/0218 , G09G2310/0224 , G09G2320/0214 , G09G2320/0233 , G09G2320/066
摘要： A method for driving an LCD device having a plurality of sets of gate lines is disclosed. The method includes sequentially enabling odd gate lines of a first set of gate lines in ascending order for writing first-polarity data into corresponding pixels based on a first common voltage during a first interval, sequentially enabling even gate lines of the first set of gate lines in ascending order for writing second-polarity data into corresponding pixels based on a second common voltage during a second interval, sequentially enabling even gate lines of a second set of gate lines in descending order for writing second-polarity data into corresponding pixels based on the second common voltage during a third interval, and sequentially enabling odd gate lines of the second set of gate lines in descending order for writing first-polarity data into corresponding pixels based on the first common voltage during a fourth interval.
摘要翻译：公开了一种用于驱动具有多组栅极线的LCD装置的方法。该方法包括：以第一组间隔依次使第一组栅极线的奇数栅极线基于第一公共电压将第一极性数据写入对应的像素中，依次启动第一组栅极线的栅极线按照在第二间隔期间基于第二公共电压将第二极性数据写入相应像素的升序，基于第二极性数据顺序地使第二组栅极线的栅极线以降序的顺序将第二极性数据写入相应的像素第二公共电压，并且在第四间隔期间，依次以第一公共电压为基础，依次使第二组栅极线的奇数栅极线以降序的顺序将第一极性数据写入相应的像素。

7. 发明申请

US20100295764A1 DISPLAY DEVICE 有权
标题翻译：显示设备
公开(公告)号：US20100295764A1
公开(公告)日：2010-11-25
申请号：US12551538
申请日：2009-08-31
申请人： Tsang-Hong Wang , Yun-Chung Lin , Sheng-Chao Liu , Chung-Lung Li
发明人： Tsang-Hong Wang , Yun-Chung Lin , Sheng-Chao Liu , Chung-Lung Li
IPC分类号： G09G3/36
CPC分类号： G02F1/136286 , G02F1/136277
摘要： A display device includes a substrate, gate lines, data lines, data signal links, and contact vias. The substrate includes a display region, and a peripheral region surrounding the display region. The gate lines, data lines, data signal links, and contact vias are disposed within the display region of the substrate. The gate lines cross the data lines. Each of the data signal links is disposed between adjacent gate lines. Each of the contact vias is disposed between each of the data signal links and a corresponding data line, such that each of the data signal links is electrically connected with the corresponding data line.
摘要翻译：显示装置包括基板，栅极线，数据线，数据信号链路和接触孔。基板包括显示区域和围绕显示区域的外围区域。栅极线，数据线，数据信号链路和接触通孔设置在衬底的显示区域内。栅极线穿过数据线。每个数据信号链路设置在相邻的栅极线之间。每个接触孔设置在每个数据信号链路和相应的数据线之间，使得每个数据信号链路与相应的数据线电连接。

8. 发明授权

US08427412B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US08427412B2
公开(公告)日：2013-04-23
申请号：US12551538
申请日：2009-08-31
申请人： Tsang-Hong Wang , Yun-Chung Lin , Sheng-Chao Liu , Chung-Lung Li
发明人： Tsang-Hong Wang , Yun-Chung Lin , Sheng-Chao Liu , Chung-Lung Li
IPC分类号： G09G3/36
CPC分类号： G02F1/136286 , G02F1/136277
摘要： A display device includes a substrate, gate lines, data lines, data signal links, and contact vias. The substrate includes a display region, and a peripheral region surrounding the display region. The gate lines, data lines, data signal links, and contact vias are disposed within the display region of the substrate. The gate lines cross the data lines. Each of the data signal links is disposed between adjacent gate lines. Each of the contact vias is disposed between each of the data signal links and a corresponding data line, such that each of the data signal links is electrically connected with the corresponding data line.
摘要翻译：显示装置包括基板，栅极线，数据线，数据信号链路和接触孔。基板包括显示区域和围绕显示区域的外围区域。栅极线，数据线，数据信号链路和接触通孔设置在衬底的显示区域内。栅极线穿过数据线。每个数据信号链路设置在相邻的栅极线之间。每个接触孔设置在每个数据信号链路和相应的数据线之间，使得每个数据信号链路与相应的数据线电连接。

9. 发明授权

US08279217B2 Liquid crystal display panel and driving method thereof 有权
标题翻译：液晶显示面板及其驱动方法
公开(公告)号：US08279217B2
公开(公告)日：2012-10-02
申请号：US12560431
申请日：2009-09-16
申请人： Sheng-Chao Liu , Tsang-Hong Wang , Chung-Lung Li
发明人： Sheng-Chao Liu , Tsang-Hong Wang , Chung-Lung Li
IPC分类号： G06F3/038
CPC分类号： G09G3/3648 , G09G3/3614 , G09G2300/0443 , G09G2320/0247
摘要： A liquid crystal display panel includes a sub-pixel array, a plurality of scan lines, and a plurality of data lines. The sub-pixel array has a plurality of sub-pixels arranged in array. Any two neighboring scan lines of the scan lines and a row of the sub-pixels disposed between the two neighboring scan liens are electrically connected. The sub-pixels arranged in odd rows are electrically connected to the odd-numbered data lines, and the sub-pixels arranged in even rows are electrically connected to the even-numbered data lines. Thus, the liquid crystal display panel is able to reduce mura phenomenon through the above-mentioned layout. A driving method of the above-mentioned liquid crystal display panel is also provided.
摘要翻译：液晶显示面板包括子像素阵列，多条扫描线和多条数据线。子像素阵列具有排列成阵列的多个子像素。扫描线的两个相邻的扫描线和布置在两个相邻的扫描留置点之间的一个子像素的一行被电连接。排列成奇数行的子像素电连接到奇数数据线，并且排列成偶数行的子像素电连接到偶数数据线。因此，液晶显示面板能够通过上述布局来减少mura现象。还提供了上述液晶显示面板的驱动方法。

10. 发明授权

US08077130B2 Method for driving an LCD device 有权
标题翻译：驱动LCD装置的方法
公开(公告)号：US08077130B2
公开(公告)日：2011-12-13
申请号：US12183076
申请日：2008-07-31
申请人： Cheng-Chiu Pai , Tsang-Hong Wang , Chung-Chun Chen , Kung-Yi Chan , Huan-Hsin Li , Chung-Lung Li
发明人： Cheng-Chiu Pai , Tsang-Hong Wang , Chung-Chun Chen , Kung-Yi Chan , Huan-Hsin Li , Chung-Lung Li
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G3/3648 , G09G2310/0218 , G09G2310/0224 , G09G2320/0214 , G09G2320/0233 , G09G2320/066
摘要： A method for driving an LCD device having a plurality of sets of gate lines is disclosed. The method includes sequentially enabling odd gate lines of a first set of gate lines in ascending order for writing first-polarity data into corresponding pixels based on a first common voltage during a first interval, sequentially enabling even gate lines of the first set of gate lines in ascending order for writing second-polarity data into corresponding pixels based on a second common voltage during a second interval, sequentially enabling even gate lines of a second set of gate lines in descending order for writing second-polarity data into corresponding pixels based on the second common voltage during a third interval, and sequentially enabling odd gate lines of the second set of gate lines in descending order for writing first-polarity data into corresponding pixels based on the first common voltage during a fourth interval.
摘要翻译：公开了一种用于驱动具有多组栅极线的LCD装置的方法。该方法包括：以第一组间隔依次使第一组栅极线的奇数栅极线基于第一公共电压将第一极性数据写入对应的像素中，依次启动第一组栅极线的栅极线按照在第二间隔期间基于第二公共电压将第二极性数据写入相应像素的升序，基于第二极性数据顺序地使第二组栅极线的栅极线以降序的顺序将第二极性数据写入相应的像素第二公共电压，并且在第四间隔期间，依次以第一公共电压为基础，依次使第二组栅极线的奇数栅极线以降序的顺序将第一极性数据写入相应的像素。

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