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1. 发明授权

US07765343B2 Method and system for robust elastic FIFO (EFIFO) in a port bypass controller 失效
标题翻译：端口旁路控制器中鲁棒弹性FIFO（EFIFO）的方法和系统
公开(公告)号：US07765343B2
公开(公告)日：2010-07-27
申请号：US10779232
申请日：2004-02-13
申请人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
发明人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
IPC分类号： G06F3/00 , G06F5/00 , G06F11/00 , G06F7/02
CPC分类号： H04L49/3018 , H04L49/357
摘要： Certain embodiments of the invention may be found in a method and system for handling data in port bypass controllers for storage systems and may comprise receiving a data stream from a receive port bypass controller's port and buffering at least a portion of the received data stream in at least one EFIFO buffer integrated within the port bypass controller. A data rate or frequency of the received data stream may be changed by inserting at least one extended fill word in the buffered portion of the received data stream or by deleting at least one fill word from the received data stream buffered in the EFIFO buffer. The extended fill word may comprise a loop initialization primitive (LIP), a loop port bypass (LPB), a loop port enable (LPE), a not operation state (NOS), an offline state (OLS), a link reset response (LRR) and/or a link reset (LR).
摘要翻译：可以在用于处理用于存储系统的端口旁路控制器中的数据的方法和系统中找到本发明的某些实施例，并且可以包括从接收端口旁路控制器的端口接收数据流，并将接收到的数据流的至少一部分缓冲在集成在端口旁路控制器内的至少一个EFIFO缓冲区。可以通过在接收到的数据流的缓冲部分中插入至少一个扩展填充字，或者从缓冲在EFIFO缓冲器中的接收数据流中删除至少一个填充字来改变接收数据流的数据速率或频率。扩展填充字可以包括循环初始化原语（LIP），循环端口旁路（LPB），循环端口使能（LPE），非操作状态（NOS），离线状态（OLS），链路复位响应 LRR）和/或链路复位（LR）。

2. 发明授权

US07492783B2 Method and system for LIPf7 origination detection and LIPf8 suppression in a port bypass controller 失效
标题翻译：端口旁路控制器中LIPf7起始检测和LIPf8抑制的方法和系统
公开(公告)号：US07492783B2
公开(公告)日：2009-02-17
申请号：US10779233
申请日：2004-02-13
申请人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
发明人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
IPC分类号： H04B7/212
CPC分类号： H04L49/40 , H04L49/357
摘要： Certain embodiments of the invention may be found in a method and system for operating ports in port bypass controllers through LIPf7 origination detection and LIPf8 suppression, which may be utilized, for example, in storage systems. Aspects of the method may comprise receiving a data stream at a receive port Rx(n) of a port bypass controller, where n is an integer indexing a port in the port bypass controller. LIPf8 primitives in the received data stream may be suppressed at the receive port Rx(n) and LIPf7 primitives inserted in place of at least a portion of the suppressed LIPf8 primitives.
摘要翻译：本发明的某些实施例可以在用于通过LIPf7始发检测和LIPf8抑制来操作端口旁路控制器中的端口的方法和系统中找到，其可以例如在存储系统中使用。该方法的方面可以包括在端口旁路控制器的接收端口Rx（n）处接收数据流，其中n是对端口旁路控制器中的端口进行索引的整数。在接收端口Rx（n）和插入的LIPf7原语代替被抑制的LIPf8原语的至少一部分，可以抑制接收数据流中的LIPf8原语。

3. 发明授权

US07451362B2 Method and system for onboard bit error rate (BER) estimation in a port bypass controller 失效
标题翻译：端口旁路控制器中板载误码率（BER）估计的方法和系统
公开(公告)号：US07451362B2
公开(公告)日：2008-11-11
申请号：US10779001
申请日：2004-02-13
申请人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
发明人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
IPC分类号： G06F11/00
CPC分类号： H04L1/245 , H04L1/0061 , H04L1/203 , H04L2001/0094
摘要： Certain aspects of the method may comprise receiving via a first port of the port bypass controller, a data stream comprising at least one known bit pattern. Upon locking onto at least a portion of the known bit pattern in the received data stream, a bit error rate may be generated based on a bit-by-bit comparison of at least a portion of the data stream received after locking occurs. At least a portion of the data stream may be compared with a corresponding portion of expected data. The bit error rate may be calculated based on results from comparing at least a portion of the data stream with a corresponding portion of the expected data. The known bit pattern may be internally generated within the port bypass controller or it may be externally generated by a host system.
摘要翻译：该方法的某些方面可以包括经由端口旁路控制器的第一端口接收包括至少一个已知位模式的数据流。在锁定到所接收的数据流中的已知位模式的至少一部分之后，可以基于锁定发生后接收到的数据流的至少一部分的比特比较来产生误码率。数据流的至少一部分可以与预期数据的相应部分进行比较。可以基于将数据流的至少一部分与预期数据的对应部分进行比较的结果来计算误码率。已知位模式可以在端口旁路控制器内部生成，或者可以由主机系统从外部生成。

4. 发明申请

US20050131987A1 Method and system for robust elastic FIFO (EFIFO) in a port bypass controller 失效
标题翻译：端口旁路控制器中鲁棒弹性FIFO（EFIFO）的方法和系统
公开(公告)号：US20050131987A1
公开(公告)日：2005-06-16
申请号：US10779232
申请日：2004-02-13
申请人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
发明人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
IPC分类号： G06F15/16 , H04L12/56
CPC分类号： H04L49/3018 , H04L49/357
摘要： Certain embodiments of the invention may be found in a method and system for handling data in port bypass controllers for storage systems and may comprise receiving a data stream from a receive port bypass controller's port and buffering at least a portion of the received data stream in at least one EFIFO buffer integrated within the port bypass controller. A data rate or frequency of the received data stream may be changed by inserting at least one extended fill word in the buffered portion of the received data stream or by deleting at least one fill word from the received data stream buffered in the EFIFO buffer. The extended fill word may comprise a loop initialization primitive (LIP), a loop port bypass (LPB), a loop port enable (LPE), a not operation state (NOS), an offline state (OLS), a link reset response (LRR) and/or a link reset (LR).
摘要翻译：可以在用于处理用于存储系统的端口旁路控制器中的数据的方法和系统中找到本发明的某些实施例，并且可以包括从接收端口旁路控制器的端口接收数据流，并将接收到的数据流的至少一部分缓冲在集成在端口旁路控制器内的至少一个EFIFO缓冲区。可以通过在接收到的数据流的缓冲部分中插入至少一个扩展填充字，或者从缓冲在EFIFO缓冲器中的接收数据流中删除至少一个填充字来改变接收数据流的数据速率或频率。扩展填充字可以包括循环初始化原语（LIP），循环端口旁路（LPB），循环端口使能（LPE），非操作状态（NOS），离线状态（OLS），链路复位响应 LRR）和/或链路复位（LR）。

5. 发明申请

US20050132258A1 Method and system for onboard bit error rate (BER) estimation in a port bypass controller 失效
标题翻译：端口旁路控制器中板载误码率（BER）估计的方法和系统
公开(公告)号：US20050132258A1
公开(公告)日：2005-06-16
申请号：US10779001
申请日：2004-02-13
申请人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
发明人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
IPC分类号： G06F11/00 , H04L1/00 , H04L1/20 , H04L1/24
CPC分类号： H04L1/245 , H04L1/0061 , H04L1/203 , H04L2001/0094
摘要： Certain aspects of the method may comprise receiving via a first port of the port bypass controller, a data stream comprising at least one known bit pattern. Upon locking onto at least a portion of the known bit pattern in the received data stream, a bit error rate may be generated based on a bit-by-bit comparison of at least a portion of the data stream received after locking occurs. At least a portion of the data stream may be compared with a corresponding portion of expected data. The bit error rate may be calculated based on results from comparing at least a portion of the data stream with a corresponding portion of the expected data. The known bit pattern may be internally generated within the port bypass controller or it may be externally generated by a host system.
摘要翻译：该方法的某些方面可以包括经由端口旁路控制器的第一端口接收包括至少一个已知位模式的数据流。在锁定到所接收的数据流中的已知位模式的至少一部分之后，可以基于锁定发生后接收到的数据流的至少一部分的比特比较来产生误码率。数据流的至少一部分可以与预期数据的相应部分进行比较。可以基于将数据流的至少一部分与预期数据的对应部分进行比较的结果来计算误码率。已知位模式可以在端口旁路控制器内部生成，或者可以由主机系统从外部生成。

6. 发明申请

US20050131988A1 Method and system for seamless dual switching in a port bypass controller 有权
标题翻译：端口旁路控制器无缝双切换的方法和系统
公开(公告)号：US20050131988A1
公开(公告)日：2005-06-16
申请号：US10779234
申请日：2004-02-13
申请人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
发明人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
IPC分类号： H04L12/437 , H04L12/56 , G06F15/16
CPC分类号： H04L12/437 , H04L49/357 , H04L49/552
摘要： Certain aspects of the invention for seamless port bypass controller operations for storage systems, for example, and may comprise a first port of a port bypass controller that receives an input signal and at least one of a plurality of selectors that selects at least a second port coupled in a chain to the first port. At least one of the selectors may switch at least a portion of the received input signal from the first port to at least the second port without initializing or reconfiguring the second port. A repeater may repeat at least a portion of the received input signal to the second port without initializing or reconfiguring the second port. A retimer may generate a retimed signal corresponding to at least a portion of the received input signal to the second port without initializing or reconfiguring the second port.
摘要翻译：例如，用于存储系统的无缝端口旁路控制器操作的本发明的某些方面可以包括接收输入信号的端口旁路控制器的第一端口和选择至少第二端口的多个选择器中的至少一个连接到第一个港口。至少一个选择器可以将接收到的输入信号的至少一部分从第一端口切换到至少第二端口，而不初始化或重新配置第二端口。中继器可以将接收的输入信号的至少一部分重复到第二端口，而不初始化或重新配置第二端口。重新定时器可以在不初始化或重新配置第二端口的情况下产生对应于接收到的输入信号的至少一部分到第二端口的重新定时信号。

7. 发明授权

US08243590B2 Method and system for seamless dual switching in a port bypass controller 有权
标题翻译：端口旁路控制器无缝双切换的方法和系统
公开(公告)号：US08243590B2
公开(公告)日：2012-08-14
申请号：US10779234
申请日：2004-02-13
申请人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
发明人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
IPC分类号： H04J1/16
CPC分类号： H04L12/437 , H04L49/357 , H04L49/552
摘要： Certain aspects of the invention for seamless port bypass controller operations for storage systems, for example, and may comprise a first port of a port bypass controller that receives an input signal and at least one of a plurality of selectors that selects at least a second port coupled in a chain to the first port. At least one of the selectors may switch at least a portion of the received input signal from the first port to at least the second port without initializing or reconfiguring the second port. A repeater may repeat at least a portion of the received input signal to the second port without initializing or reconfiguring the second port. A retimer may generate a retimed signal corresponding to at least a portion of the received input signal to the second port without initializing or reconfiguring the second port.
摘要翻译：例如，用于存储系统的无缝端口旁路控制器操作的本发明的某些方面可以包括接收输入信号的端口旁路控制器的第一端口和选择至少第二端口的多个选择器中的至少一个连接到第一个港口。至少一个选择器可以将接收到的输入信号的至少一部分从第一端口切换到至少第二端口，而不初始化或重新配置第二端口。中继器可以将接收的输入信号的至少一部分重复到第二端口，而不初始化或重新配置第二端口。重新定时器可以在不初始化或重新配置第二端口的情况下产生对应于接收到的输入信号的至少一部分到第二端口的重新定时信号。

8. 发明申请

US20050129057A1 Method and system for LIPf7 origination detection and LIPf8 suppression in a port bypass controller 失效
标题翻译：端口旁路控制器中LIPf7起始检测和LIPf8抑制的方法和系统
公开(公告)号：US20050129057A1
公开(公告)日：2005-06-16
申请号：US10779233
申请日：2004-02-13
申请人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
发明人： Chung-Jue Chen , Ali Ghiasi , Jay Proano , Rajesh Satapathy , Steve Thomas
IPC分类号： H04J3/02 , H04L12/56
CPC分类号： H04L49/40 , H04L49/357
摘要： Certain embodiments of the invention may be found in a method and system for operating ports in port bypass controllers through LIPf7 origination detection and LIPf8 suppression, which may be utilized, for example, in storage systems. Aspects of the method may comprise receiving a data stream at a receive port Rx(n) of a port bypass controller, where n is an integer indexing a port in the port bypass controller. LIPf8 primitives in the received data stream may be suppressed at the receive port Rx(n) and LIPf7 primitives inserted in place of at least a portion of the suppressed LIPf8 primitives.
摘要翻译：本发明的某些实施例可以在用于通过LIPf7始发检测和LIPf8抑制来操作端口旁路控制器中的端口的方法和系统中找到，其可以例如在存储系统中使用。该方法的方面可以包括在端口旁路控制器的接收端口Rx（n）处接收数据流，其中n是对端口旁路控制器中的端口进行索引的整数。在接收端口Rx（n）和插入的LIPf7原语代替被抑制的LIPf8原语的至少一部分，可以抑制接收数据流中的LIPf8原语。

9. 发明授权

US07533131B2 System and method for pestware detection and removal 有权
标题翻译：用于检测和清除污染物的系统和方法
公开(公告)号：US07533131B2
公开(公告)日：2009-05-12
申请号：US10956574
申请日：2004-10-01
申请人： Steve Thomas , Bradley D. Stowers , Kevin Barton , Jeffery Herman
发明人： Steve Thomas , Bradley D. Stowers , Kevin Barton , Jeffery Herman
IPC分类号： G06F12/00 , G06F17/30 , G06F11/00
CPC分类号： G06F21/56 , G06F21/55
摘要： Systems and methods for managing pestware are described. One system includes a pestware shield configured to detect pestware activity on a protected computer; a heuristics engine configured to identify repeat pestware activity; a drive scan module configured to scan files stored on the storage device and to identify pestware in the scanned files; a program memory scan module configured to scan programs running in the program memory of the protected computer and to identify pestware in the scanned programs; a registry scan module configured to identify any attempts to change data in the registry file; and a quarantine module configured to quarantine the pestware identified by either the drive scan module or the program memory module.
摘要翻译：描述了用于管理害虫的系统和方法。一个系统包括被配置为检测被保护计算机上的有害物质活动的防虫罩; 配置为识别重复的有害生物活动的启发式引擎; 驱动器扫描模块，被配置为扫描存储在所述存储设备上的文件，并识别所述扫描文件中的所述有害物; 程序存储器扫描模块，被配置为扫描在受保护的计算机的程序存储器中运行的程序并识别所扫描的程序中的有害物品; 注册表扫描模块被配置为识别改变注册表文件中的数据的任何尝试; 以及被配置为隔离由驱动器扫描模块或程序存储器模块识别的有害物质的隔离模块。

10. 发明申请

US20070037658A1 Multiple-speed automatic transmission having a two-speed input and a Simpson gearset 有权
公开(公告)号：US20070037658A1
公开(公告)日：2007-02-15
申请号：US11203704
申请日：2005-08-15
申请人： Steve Thomas , Donald Hoffman , Gregory Goleski
发明人： Steve Thomas , Donald Hoffman , Gregory Goleski
IPC分类号： F16H3/44
CPC分类号： F16H3/663 , F16H2200/0052 , F16H2200/2012 , F16H2200/2043 , F16H2200/2097
摘要： A multi-speed automatic transmission includes an input and output, first, second and three planetary gear units, each gear unit including a sun gear, a ring gear, planet pinions meshing with the sun gear and the ring gear, and a carrier rotatably supporting the planet pinions. A first brake alternately holds against rotation and releases the sun gear of the second gear unit and the sun gear of the third gear unit. A second brake alternately holds and releases the carrier of the second gear unit. A first clutch alternately connects and disconnects the carrier of the first gear unit and the ring gear of the third gear unit. A second clutch alternately disconnects and connects the carrier of the first gear unit to the sun gears of the second gear unit and third gear unit. A third clutch alternately releases and connects the input and ring gear of the first gear unit to the carrier of the second gear unit.

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