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    • 1. 发明授权
    • Flash memory device and data protection method thereof
    • 闪存设备及其数据保护方法
    • US08838884B2
    • 2014-09-16
    • US13453452
    • 2012-04-23
    • Chun-Yi LoHsu-Ping Ou
    • Chun-Yi LoHsu-Ping Ou
    • G06F12/00G06F12/02G06F12/14
    • G06F12/14G06F12/0246G06F2212/1052G06F2212/202
    • A data protection method for a flash memory device. In one embodiment, the flash memory device comprises a flash memory for storing protected data. After the flash memory device is coupled to a host, a plurality of current read addresses of a plurality of read commands sent from the host to the flash memory device are recorded. The current read addresses are then compared with a plurality of predetermined read addresses. When the current read addresses are not identical to the predetermined read addresses, the flash memory device is made to enter a data protection mode. When the flash memory device is in the data protection mode, if the flash memory device receives a plurality of data access commands, the data access commands are processed according to a protection mode setting parameter to prevent the protected data from being accessed by the host.
    • 一种闪存设备的数据保护方法。 在一个实施例中,闪存设备包括用于存储受保护数据的闪存。 在闪速存储器件耦合到主机之后,记录从主机发送到闪存器件的多个读取命令的多个当前读取地址。 然后将当前的读取地址与多个预定的读取地址进行比较。 当当前的读取地址与预定的读取地址不同时,使闪存设备进入数据保护模式。 当闪存设备处于数据保护模式时,如果闪速存储设备接收到多个数据访问命令,则根据保护模式设置参数处理数据访问命令,以防止主机访问受保护的数据。
    • 2. 发明申请
    • Flash Memory Device and Data Writing Method for a Flash Memory
    • 闪存设备和闪存的数据写入方法
    • US20120246394A1
    • 2012-09-27
    • US13424758
    • 2012-03-20
    • Hsu-Ping Ou
    • Hsu-Ping Ou
    • G06F12/00
    • G06F12/0246G06F11/3034G06F11/3037G06F11/3082
    • A data writing method for a flash memory. First, a plurality of blocks of a flash memory is classified into a plurality of block groups according to the erase counts of the blocks. A logical address range of a host is then divided into a plurality of logical address sections respectively corresponding to the block groups. Write data is then received from the host. A target logical address section to which the logical address of the write data belongs is then determined. A target block group corresponding to the target logical address section is then determined. A target block is then selected from the blocks of the target block group. The write data is then written to the target block.
    • 闪速存储器的数据写入方法。 首先,根据块的擦除次数将闪存的多个块分成多个块组。 然后,主机的逻辑地址范围被分成对应于块组的多个逻辑地址部分。 然后从主机接收写数据。 然后确定写数据的逻辑地址所属的目标逻辑地址部分。 然后确定对应于目标逻辑地址部分的目标块组。 然后从目标块组的块中选择一个目标块。 然后将写入数据写入目标块。
    • 3. 发明申请
    • METHOD FOR ENHANCING PERFORMANCE OF A FLASH MEMORY, AND ASSOCIATED PORTABLE MEMORY DEVICE AND CONTROLLER THEREOF
    • 用于增强闪速存储器的性能的方法以及相关的便携式存储器件及其控制器
    • US20100235563A1
    • 2010-09-16
    • US12534828
    • 2009-08-03
    • Hsu-Ping Ou
    • Hsu-Ping Ou
    • G06F12/00G06F12/02
    • G06F12/0246G06F2212/7203
    • A method for enhancing performance of a Flash memory includes: providing a random access memory (RAM); utilizing the RAM to temporarily store at least one virtual Flash block; and selectively moving data of the virtual Flash block to the Flash memory in order to write at least one new page in the Flash memory. An associated portable memory device and a controller thereof are also provided, where the controller includes: a read only memory (ROM) arranged to store a program code; and a microprocessor arranged to execute the program code to control the access to the Flash memory. In addition, the controller that executes the program code by utilizing the microprocessor selectively moves the data of the virtual Flash block to the Flash memory in order to write at least one new page in the Flash memory.
    • 一种用于增强闪存的性能的方法,包括:提供随机存取存储器(RAM); 利用RAM临时存储至少一个虚拟闪存块; 以及将虚拟闪存块的数据选择性地移动到闪存,以便在闪速存储器中写入至少一个新页面。 还提供了一种相关联的便携式存储装置及其控制器,其中控制器包括:被布置为存储程序代码的只读存储器(ROM); 以及布置成执行程序代码以控制对闪存的访问的微处理器。 此外,通过利用微处理器执行程序代码的控制器选择性地将虚拟闪存块的数据移动到闪速存储器,以便在闪速存储器中写入至少一个新页面。
    • 5. 发明授权
    • Flash memory device and data access method thereof
    • 闪存设备及其数据访问方法
    • US08661190B2
    • 2014-02-25
    • US13301320
    • 2011-11-21
    • Hsu-Ping Ou
    • Hsu-Ping Ou
    • G06F12/02
    • G06F12/0246G06F3/0613G06F3/0631G06F3/0679G06F2212/7201
    • In one embodiment, the flash memory device is coupled to a host, and comprises a flash memory and a controller. The flash memory is used for data storage. The controller receives write data and a write logical address from the host, calculates a running sum value according to the write data, determines whether target data with a running sum equal to the running sum value is stored in the flash memory, reads the target data from the flash memory when the target data is stored in the flash memory, determines whether the target data is identical to the write data, and records a mapping relationship between an original logical address of the target data and a write logical address of the write data in a remapping table without writing the write data to the flash memory when the target data is identical to the write data.
    • 在一个实施例中,闪存设备耦合到主机,并且包括闪存和控制器。 闪存用于数据存储。 控制器从主机接收写入数据和写入逻辑地址,根据写入数据计算运行总和值,确定具有与运行总和值相等的运行总和的目标数据是否存储在闪速存储器中,读取目标数据 当目标数据存储在闪速存储器中时,从闪速存储器确定目标数据是否与写入数据相同,并且记录目标数据的原始逻辑地址与写入数据的写入逻辑地址之间的映射关系 在重新映射表中,当目标数据与写数据相同时,不将写入数据写入闪速存储器。
    • 6. 发明授权
    • Non-volatile memory device and data processing method thereof
    • 非易失性存储器件及其数据处理方法
    • US08392794B2
    • 2013-03-05
    • US12785940
    • 2010-05-24
    • Hsu-Ping Ou
    • Hsu-Ping Ou
    • H03M13/00
    • G06F12/0246G06F11/1004G06F11/1443G06F2212/1032
    • A data processing method for a non-volatile memory device is provided. The non-volatile memory device includes a controller and a NAND flash memory. First, a target command and a corresponding target address are serially transmitted from the controller to the NAND flash memory. Then, the NAND flash memory calculates a first value according to the target address. Moreover, a cyclic redundancy check code corresponding to the target address is transmitted from the controller transmits to the NAND flash memory. Next, the NAND flash memory determines whether a transmission error has occurred by performing a cyclic redundancy check according to the first value and the cyclic redundancy check code. When the transmission error has occurred, a status register is set to inform the controller to re-transmit the target command and the corresponding target address.
    • 提供了一种用于非易失性存储器件的数据处理方法。 非易失性存储器件包括控制器和NAND闪存。 首先,将目标命令和对应的目标地址从控制器串行发送到NAND闪存。 然后,NAND闪速存储器根据目标地址计算第一值。 此外,与目标地址对应的循环冗余校验码从控制器发送到NAND闪速存储器。 接下来,NAND闪存通过根据第一值和循环冗余校验码执行循环冗余校验来确定是否发生了传输错误。 当发生传输错误时,设置状态寄存器以通知控制器重新发送目标命令和相应的目标地址。
    • 7. 发明申请
    • Flash Memory Device and Data Access Method Thereof
    • 闪存设备及其数据访问方法
    • US20120166710A1
    • 2012-06-28
    • US13301320
    • 2011-11-21
    • Hsu-Ping Ou
    • Hsu-Ping Ou
    • G06F12/02
    • G06F12/0246G06F3/0613G06F3/0631G06F3/0679G06F2212/7201
    • In one embodiment, the flash memory device is coupled to a host, and comprises a flash memory and a controller. The flash memory is used for data storage. The controller receives write data and a write logical address from the host, calculates a running sum value according to the write data, determines whether target data with a running sum equal to the running sum value is stored in the flash memory, reads the target data from the flash memory when the target data is stored in the flash memory, determines whether the target data is identical to the write data, and records a mapping relationship between an original logical address of the target data and a write logical address of the write data in a remapping table without writing the write data to the flash memory when the target data is identical to the write data.
    • 在一个实施例中,闪存设备耦合到主机,并且包括闪存和控制器。 闪存用于数据存储。 控制器从主机接收写入数据和写入逻辑地址,根据写入数据计算运行总和值,确定具有与运行总和值相等的运行总和的目标数据是否存储在闪速存储器中,读取目标数据 当目标数据存储在闪速存储器中时,从闪速存储器确定目标数据是否与写入数据相同,并且记录目标数据的原始逻辑地址与写入数据的写入逻辑地址之间的映射关系 在重新映射表中,当目标数据与写数据相同时,不将写入数据写入闪速存储器。
    • 8. 发明授权
    • Flash memory device and data writing method for a flash memory
    • 闪存设备和闪存的数据写入方法
    • US08892812B2
    • 2014-11-18
    • US13424758
    • 2012-03-20
    • Hsu-Ping Ou
    • Hsu-Ping Ou
    • G06F12/00G06F12/02G06F11/30
    • G06F12/0246G06F11/3034G06F11/3037G06F11/3082
    • A data writing method for a flash memory. First, a plurality of blocks of a flash memory is classified into a plurality of block groups according to the erase counts of the blocks. A logical address range of a host is then divided into a plurality of logical address sections respectively corresponding to the block groups. Write data is then received from the host. A target logical address section to which the logical address of the write data belongs is then determined. A target block group corresponding to the target logical address section is then determined. A target block is then selected from the blocks of the target block group. The write data is then written to the target block.
    • 闪速存储器的数据写入方法。 首先,根据块的擦除次数将闪存的多个块分成多个块组。 然后,主机的逻辑地址范围被分成对应于块组的多个逻辑地址部分。 然后从主机接收写数据。 然后确定写数据的逻辑地址所属的目标逻辑地址部分。 然后确定对应于目标逻辑地址部分的目标块组。 然后从目标块组的块中选择一个目标块。 然后将写入数据写入目标块。
    • 9. 发明申请
    • METHOD FOR PERFORMING HOST-DIRECTED OPERATIONS, AND ASSOCIATED MEMORY DEVICE AND CONTROLLER THEREOF
    • 用于执行主机操作的方法,以及相关的存储器件及其控制器
    • US20120278540A1
    • 2012-11-01
    • US13425444
    • 2012-03-21
    • Ming-Yen LinHsu-Ping Ou
    • Ming-Yen LinHsu-Ping Ou
    • G06F12/00
    • G06F12/00G06F12/0246G06F2212/7202
    • A method for performing host-directed operations is provided, where the method is applied to a controller of a Flash memory that includes a plurality of blocks. The method includes: in a test mode of the controller, when receiving a host command from a host device, extracting at least one portion of associated information of the host command, where the at least one portion of the associated information is an encoded result that is generated by performing encoding on a host-directed operation command; and analyzing the at least one portion of the associated information according to at least one predetermined rule, in order to perform a host-directed operation corresponding to the host-directed operation command. An associated memory device and a controller thereof are also provided.
    • 提供了一种用于执行主机定向操作的方法,其中该方法被应用于包括多个块的闪速存储器的控制器。 该方法包括:在控制器的测试模式中,当从主机设备接收主机命令时,提取主机命令的关联信息的至少一部分,其中相关信息的至少一部分是编码结果, 通过对主机定向操作命令执行编码而产生; 以及根据至少一个预定规则分析所述相关信息的所述至少一部分,以便执行与所述主机定向操作命令相对应的主机定向操作。 还提供了相关联的存储器件及其控制器。
    • 10. 发明申请
    • Flash Storage Device and Data Writing Method Thereof
    • 闪存存储设备及其数据写入方法
    • US20120166718A1
    • 2012-06-28
    • US13337970
    • 2011-12-27
    • Hsu-Ping Ou
    • Hsu-Ping Ou
    • G06F12/02
    • G06F12/0246G11C16/06
    • A flash storage device comprises a flash memory and a controller. The flash memory comprises a plurality of blocks comprising a plurality of ordinary pages and a plurality of reserved pages. The controller receives a current write command and write data from a host, determines a mother block and an FAT block corresponding to the write command, divides data of the mother block and data of the FAT block into a plurality of original data segments and a plurality of updating data segments, integrates the original data segments with the updating data segments to obtain integrated data segments, writes the integrated data segments to an integrated block respectively in a plurality of processing periods of a plurality of subsequent write commands, and writes the subsequent write data to the reserved pages of a plurality of subsequent blocks.
    • 闪存存储设备包括闪存和控制器。 闪存包括多个包含多个普通页面和多个保留页面的块。 控制器接收当前写命令并从主机写入数据,确定与写命令相对应的母块和FAT块,将母块的数据和FAT块的数据分成多个原始数据段和多个原始数据段 更新数据段,将原始数据段与更新数据段集成以获得集成数据段,分别在多个后续写命令的多个处理周期中将集成数据段写入集成块,并将后续写 数据到多个后续块的保留页面。