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    • 6. 发明申请
    • IMAGE ENCODING/DECODING DEVICE AND METHOD THEREOF
    • 图像编码/解码装置及其方法
    • US20080095454A1
    • 2008-04-24
    • US11874214
    • 2007-10-18
    • Wen-Che WuHsien-Chun Chang
    • Wen-Che WuHsien-Chun Chang
    • G06K9/00
    • H04N19/127H04N19/186H04N19/423
    • The invention provides an image encoding/decoding device and method. An encoding/decoding architecture of the invention includes: encoders for encoding image data into data blocks; a reordering multiplexer for receiving the data blocks and determining an order by which the data blocks are written into a memory according to an order of an achieved percentage of an encoding progress for each encoder; a memory writing unit, a memory dispatcher, a memory controller, and a memory reading unit, for writing the data blocks into the memory and reading the data blocks from the memory; a request demultiplexer for receiving the read data blocks from the memory reading unit and outputting the received data blocks according to data request signals; and decoders for generating the data request signals, receiving the output data blocks from the request demultiplexer, decoding the received data blocks, and then outputting the decoded data blocks.
    • 本发明提供一种图像编码/解码装置和方法。 本发明的编码/解码架构包括:用于将图像数据编码成数据块的编码器; 重新排序多路复用器,用于接收数据块,并根据每个编码器的编码进程的实现百分比的顺序确定将数据块写入存储器的顺序; 存储器写入单元,存储器调度器,存储器控制器和存储器读取单元,用于将数据块写入存储器并从存储器读取数据块; 请求解复用器,用于从存储器读取单元接收读取的数据块,并根据数据请求信号输出接收到的数据块; 以及用于产生数据请求信号的解码器,从请求解复用器接收输出数据块,对接收到的数据块进行解码,然后输出解码的数据块。
    • 8. 发明授权
    • Device and method for controlling frame input and output
    • 用于控制帧输入和输出的装置和方法
    • US08471859B2
    • 2013-06-25
    • US12692389
    • 2010-01-22
    • Chia-Lung HungTzuo-Bo LinHsien-Chun ChangYu-Pin Chou
    • Chia-Lung HungTzuo-Bo LinHsien-Chun ChangYu-Pin Chou
    • G09G5/39G09G5/36G06F12/02H04N7/01
    • H04N7/0105H04N7/0132
    • A device and method for controlling frame input and output are applied to the reception of image data from a source device and output of the image data to a destination device, the device includes a buffer, a buffer control circuit, and a frame write controller. The input pixel clock is not equal to the output pixel clock. The frame write controller generates a write permission signal according to the Input DE and the Output DE. The buffer control circuit generates a write control signal according to the Input DE and the write permission signal, and generates a read control signal according to the Output DE. The buffer receives the image data from the source device according to the write control signal and the input pixel clock, and outputs the image data to the destination device according to the read control signal and the output pixel clock.
    • 用于控制帧输入和输出的装置和方法被应用于从源设备接收图像数据并将图像数据输出到目的地设备,该设备包括缓冲器,缓冲器控制电路和帧写入控制器。 输入像素时钟不等于输出像素时钟。 帧写入控制器根据输入DE和输出DE生成写许可信号。 缓冲器控制电路根据输入DE和写允许信号产生写控制信号,并根据输出DE生成读控制信号。 缓冲器根据写控制信号和输入像素时钟从源装置接收图像数据,并根据读控制信号和输出像素时钟将图像数据输出到目的地装置。