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1. 发明授权

US08692296B2 Semiconductor devices and manufacturing methods thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US08692296B2
公开(公告)日：2014-04-08
申请号：US13370132
申请日：2012-02-09
申请人： Chun-Chang Chen , Shun-Shing Yang , Shih-Chi Fu , Wang-Pen Mo , Hung-Chang Hsieh
发明人： Chun-Chang Chen , Shun-Shing Yang , Shih-Chi Fu , Wang-Pen Mo , Hung-Chang Hsieh
IPC分类号： H01L27/118 , H01L21/20
CPC分类号： H01L21/823437 , H01L21/0274 , H01L21/32139 , H01L27/1052
摘要： Semiconductor devices and manufacturing methods thereof are disclosed. In one embodiment, a semiconductor device includes a workpiece with a first region having a plurality of first features and a second region having a plurality of second features proximate the first region. The first region and the second region share a patterning overlap region disposed between the first region and the second region. The patterning overlap region includes a residue feature with an aspect ratio of about 4 or less.
摘要翻译：公开了半导体器件及其制造方法。在一个实施例中，半导体器件包括具有多个第一特征的第一区域的工件和具有靠近第一区域的多个第二特征的第二区域。第一区域和第二区域共享布置在第一区域和第二区域之间的图案化重叠区域。图案重叠区域包括长宽比为约4或更小的残留特征。

2. 发明申请

US20130207163A1 Semiconductor Devices and Manufacturing Methods Thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130207163A1
公开(公告)日：2013-08-15
申请号：US13370132
申请日：2012-02-09
申请人： Chun-Chang Chen , Shun-Shing Yang , Shih-Chi Fu , Wang-Pen Mo , Hung-Chang Hsieh
发明人： Chun-Chang Chen , Shun-Shing Yang , Shih-Chi Fu , Wang-Pen Mo , Hung-Chang Hsieh
IPC分类号： H01L27/04 , H01L21/20 , H01L29/02
CPC分类号： H01L21/823437 , H01L21/0274 , H01L21/32139 , H01L27/1052
摘要： Semiconductor devices and manufacturing methods thereof are disclosed. In one embodiment, a semiconductor device includes a workpiece with a first region having a plurality of first features and a second region having a plurality of second features proximate the first region. The first region and the second region share a patterning overlap region disposed between the first region and the second region. The patterning overlap region includes a residue feature with an aspect ratio of about 4 or less.
摘要翻译：公开了半导体器件及其制造方法。在一个实施例中，半导体器件包括具有多个第一特征的第一区域的工件和具有靠近第一区域的多个第二特征的第二区域。第一区域和第二区域共享布置在第一区域和第二区域之间的图案化重叠区域。图案重叠区域包括长宽比为约4或更小的残留特征。

3. 发明授权

US08883403B2 Method of semiconductor integrated circuit fabrication 有权
标题翻译：半导体集成电路制造方法
公开(公告)号：US08883403B2
公开(公告)日：2014-11-11
申请号：US13616802
申请日：2012-09-14
申请人： Chun-Chang Chen , Shun-Shing Yang , Chuan-Ling Wu , Wang-Pen Mo , Hung-Chang Hsieh
发明人： Chun-Chang Chen , Shun-Shing Yang , Chuan-Ling Wu , Wang-Pen Mo , Hung-Chang Hsieh
IPC分类号： G03F7/26
CPC分类号： H01L21/0332
摘要： A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes providing a substrate having two different topography areas adjacent to each other. A step-forming material (SFM) is deposited over the substrate. A patterned SFM is formed in the low topography area of the two areas. The formation of the patterned SFM provides a fairly planar surface across over the substrate.
摘要翻译：公开了制造半导体集成电路（IC）的方法。该方法包括提供具有彼此相邻的两个不同形貌区域的基底。步骤形成材料（SFM）沉积在衬底上。在两个区域的低地形区域中形成图案化的SFM。图案化SFM的形成提供跨越衬底的相当平坦的表面。

4. 发明申请

US20140080067A1 METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT FABRICATION 有权
标题翻译：半导体集成电路制造方法
公开(公告)号：US20140080067A1
公开(公告)日：2014-03-20
申请号：US13616802
申请日：2012-09-14
申请人： Chun-Chang Chen , Shun-Shing Yang , Chuan-Ling Wu , Wang-Pen Mo , Hung-Chang Hsieh
发明人： Chun-Chang Chen , Shun-Shing Yang , Chuan-Ling Wu , Wang-Pen Mo , Hung-Chang Hsieh
IPC分类号： G03F7/20
CPC分类号： H01L21/0332
摘要： A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes providing a substrate having two different topography areas adjacent to each other. A step-forming material (SFM) is deposited over the substrate. A patterned SFM is formed in the low topography area of the two areas. The formation of the patterned SFM provides a fairly planar surface across over the substrate.
摘要翻译：公开了制造半导体集成电路（IC）的方法。该方法包括提供具有彼此相邻的两个不同形貌区域的基底。步骤形成材料（SFM）沉积在衬底上。在两个区域的低地形区域中形成图案化的SFM。图案化SFM的形成提供跨越衬底的相当平坦的表面。

5. 发明申请

US20130181320A1 Manufacturing Techniques for Workpieces with Varying Topographies 有权
标题翻译：具有不同形貌的工件制造技术
公开(公告)号：US20130181320A1
公开(公告)日：2013-07-18
申请号：US13350010
申请日：2012-01-13
申请人： Chun-Chang Chen , Shih-Chi Fu , Wang-Pen Mo , Hung-Chang Hsieh
发明人： Chun-Chang Chen , Shih-Chi Fu , Wang-Pen Mo , Hung-Chang Hsieh
IPC分类号： H01L29/00 , B44C1/22 , H01L21/311
CPC分类号： H01L21/0276 , H01L21/32139 , H01L21/823431 , H01L21/823456
摘要： Some embodiments relate to a method for processing a workpiece. In the method, an anti-reflective coating layer is provided over the workpiece. A first patterned photoresist layer, which has a first photoresist tone, is provided over the anti-reflective coating layer. A second patterned photoresist layer, which has a second photoresist tone opposite the first photoresist tone, is provided over the first patterned photoresist layer. An opening extends through the first and second patterned photoresist layers to allow a treatment to be applied to the workpiece through the opening. Other embodiments are also disclosed.
摘要翻译：一些实施例涉及用于处理工件的方法。在该方法中，在工件上方设有抗反射涂层。具有第一光致抗蚀剂色调的第一图案化光致抗蚀剂层设置在抗反射涂层上。在第一图案化光致抗蚀剂层上提供具有与第一光致抗蚀剂色调相反的第二光致抗蚀剂色调的第二图案化光致抗蚀剂层。开口延伸穿过第一和第二图案化的光致抗蚀剂层，以允许通过开口对工件施加处理。还公开了其他实施例。

6. 发明申请

US20130137266A1 MANUFACTURING TECHNIQUES TO LIMIT DAMAGE ON WORKPIECE WITH VARYING TOPOGRAPHIES 有权
标题翻译：制造技术限制工件损坏与变化的地形
公开(公告)号：US20130137266A1
公开(公告)日：2013-05-30
申请号：US13306299
申请日：2011-11-29
申请人： Chun-Chang Chen , Shih-Chi Fu , Wang-Pen Mo , Hung Chang Hsieh
发明人： Chun-Chang Chen , Shih-Chi Fu , Wang-Pen Mo , Hung Chang Hsieh
IPC分类号： H01L21/311
CPC分类号： H01L21/32139 , H01L21/0271 , H01L27/11541 , H01L29/66795
摘要： Some embodiments relate to a method for processing a workpiece. In the method, a first photoresist layer is provided over the workpiece, wherein the first photoresist layer has a first photoresist tone. The first photoresist layer is patterned to provide a first opening exposing a first portion of the workpiece. A second photoresist layer is then provided over the patterned first photoresist layer, wherein the second photoresist layer has a second photoresist tone opposite the first photoresist tone. The second photoresist layer is then patterned to provide a second opening that at least partially overlaps the first opening to define a coincidentally exposed workpiece region. A treatment is then performed on the coincidentally exposed workpiece region. Other embodiments are also disclosed.
摘要翻译：一些实施例涉及用于处理工件的方法。在该方法中，在工件上设置第一光致抗蚀剂层，其中第一光致抗蚀剂层具有第一光致抗蚀剂色调。图案化第一光致抗蚀剂层以提供暴露工件的第一部分的第一开口。然后在图案化的第一光刻胶层上提供第二光致抗蚀剂层，其中第二光致抗蚀剂层具有与第一光致抗蚀剂色调相反的第二光致抗蚀剂色调。然后对第二光致抗蚀剂层进行图案化以提供与第一开口至少部分重叠的第二开口，以限定重合的工件区域。然后对同时暴露的工件区域进行处理。还公开了其他实施例。

7. 发明授权

US08771534B2 Manufacturing techniques for workpieces with varying topographies 有权
标题翻译：具有不同形貌的工件的制造技术
公开(公告)号：US08771534B2
公开(公告)日：2014-07-08
申请号：US13350010
申请日：2012-01-13
申请人： Chun-Chang Chen , Shih-Chi Fu , Wang-Pen Mo , Hung-Chang Hsieh
发明人： Chun-Chang Chen , Shih-Chi Fu , Wang-Pen Mo , Hung-Chang Hsieh
IPC分类号： B44C1/22
CPC分类号： H01L21/0276 , H01L21/32139 , H01L21/823431 , H01L21/823456
摘要： Some embodiments relate to a method for processing a workpiece. In the method, an anti-reflective coating layer is provided over the workpiece. A first patterned photoresist layer, which has a first photoresist tone, is provided over the anti-reflective coating layer. A second patterned photoresist layer, which has a second photoresist tone opposite the first photoresist tone, is provided over the first patterned photoresist layer. An opening extends through the first and second patterned photoresist layers to allow a treatment to be applied to the workpiece through the opening. Other embodiments are also disclosed.
摘要翻译：一些实施例涉及用于处理工件的方法。在该方法中，在工件上方设有抗反射涂层。具有第一光致抗蚀剂色调的第一图案化光致抗蚀剂层设置在抗反射涂层上。在第一图案化光致抗蚀剂层上提供具有与第一光致抗蚀剂色调相反的第二光致抗蚀剂色调的第二图案化光致抗蚀剂层。开口延伸穿过第一和第二图案化的光致抗蚀剂层，以允许通过开口对工件施加处理。还公开了其他实施例。

8. 发明授权

US08623229B2 Manufacturing techniques to limit damage on workpiece with varying topographies 有权
标题翻译：制造技术来限制对具有不同形貌的工件的损伤
公开(公告)号：US08623229B2
公开(公告)日：2014-01-07
申请号：US13306299
申请日：2011-11-29
申请人： Chun-Chang Chen , Shih-Chi Fu , Wang-Pen Mo , Hung Chang Hsieh
发明人： Chun-Chang Chen , Shih-Chi Fu , Wang-Pen Mo , Hung Chang Hsieh
IPC分类号： B44C1/22
CPC分类号： H01L21/32139 , H01L21/0271 , H01L27/11541 , H01L29/66795
摘要： Some embodiments relate to a method for processing a workpiece. In the method, a first photoresist layer is provided over the workpiece, wherein the first photoresist layer has a first photoresist tone. The first photoresist layer is patterned to provide a first opening exposing a first portion of the workpiece. A second photoresist layer is then provided over the patterned first photoresist layer, wherein the second photoresist layer has a second photoresist tone opposite the first photoresist tone. The second photoresist layer is then patterned to provide a second opening that at least partially overlaps the first opening to define a coincidentally exposed workpiece region. A treatment is then performed on the coincidentally exposed workpiece region. Other embodiments are also disclosed.
摘要翻译：一些实施例涉及用于处理工件的方法。在该方法中，在工件上设置第一光致抗蚀剂层，其中第一光致抗蚀剂层具有第一光致抗蚀剂色调。图案化第一光致抗蚀剂层以提供暴露工件的第一部分的第一开口。然后在图案化的第一光致抗蚀剂层上提供第二光致抗蚀剂层，其中第二光致抗蚀剂层具有与第一光致抗蚀剂色调相反的第二光致抗蚀剂色调。然后对第二光致抗蚀剂层进行图案化以提供与第一开口至少部分重叠的第二开口，以限定重合的工件区域。然后对同时暴露的工件区域进行处理。还公开了其他实施例。

9. 发明申请

US20130302985A1 METHOD OF REMOVING RESIDUE DURING SEMICONDUCTOR DEVICE FABRICATION 审中-公开
标题翻译：在半导体器件制造过程中移除残留物的方法
公开(公告)号：US20130302985A1
公开(公告)日：2013-11-14
申请号：US13468894
申请日：2012-05-10
申请人： Chun-Chang Wu , Chun-Chang Chen , Chuan-Ling Wu , Wang-Pen Mo , Hung-Chang Hsieh
发明人： Chun-Chang Wu , Chun-Chang Chen , Chuan-Ling Wu , Wang-Pen Mo , Hung-Chang Hsieh
IPC分类号： H01L21/31
CPC分类号： H01L21/0206 , G03F7/091 , G03F7/40
摘要： A method is described including forming a first photoresist feature and a second photoresist feature on a semiconductor substrate. A chemical material coating is formed on the semiconductor substrate. The chemical material coating interposes the first and second photoresist features. The semiconductor substrate is then rinsed; the rinsing removes the chemical material coating from the semiconductor substrate. The chemical material may mix with a residue disposed on the substrate between the first and second photoresist features. Removing the chemical material coating from the substrate may also remove the residue.
摘要翻译：描述了一种方法，包括在半导体衬底上形成第一光致抗蚀剂特征和第二光致抗蚀剂特征。在半导体衬底上形成化学材料涂层。化学材料涂层介于第一和第二光致抗蚀剂特征之间。然后冲洗半导体衬底; 冲洗从半导体衬底去除化学材料涂层。化学材料可以与设置在第一和第二光致抗蚀剂特征之间的衬底上的残留物混合。从基材上除去化学材料涂层也可以除去残留物。

10. 发明授权

US08099861B2 Current-leveling electroplating/electropolishing electrode 有权
标题翻译：电流调平电镀/电解抛光电极
公开(公告)号：US08099861B2
公开(公告)日：2012-01-24
申请号：US12854214
申请日：2010-08-11
申请人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen
发明人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen
IPC分类号： B23P19/02 , B23P19/04 , B23P19/10 , B23P19/12 , C25D17/12 , C25D17/14 , C25D3/38
CPC分类号： H01L21/2885 , C25D17/001 , C25D17/12 , Y10T29/49208 , Y10T29/53204
摘要： A current-leveling electrode for improving electroplating and electrochemical polishing uniformity in the electrochemical plating or electropolishing of metals on a substrate is disclosed. The current-leveling electrode includes a base electrode and at least one sub-electrode carried by the base electrode. The at least one sub-electrode has a width which is less than a width of the base electrode to impart a generally tapered, stepped or convex configuration to the current-leveling electrode.
摘要翻译：公开了一种用于改善电化学电镀中的电镀和电化学抛光均匀性的电流调节电极或对基底上的金属的电解抛光。电流调平电极包括基极和由基极承载的至少一个子电极。所述至少一个子电极的宽度小于所述基极的宽度，以赋予所述电流调平电极大致锥形，阶梯形或凸形的构造。

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