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1. 发明申请

US20060036801A1 Scalable matrix register file 审中-公开
标题翻译：可扩展矩阵寄存器文件
公开(公告)号：US20060036801A1
公开(公告)日：2006-02-16
申请号：US10916747
申请日：2004-08-11
申请人： Christpher Jones , Gary Brown , Darrell Boggs
发明人： Christpher Jones , Gary Brown , Darrell Boggs
IPC分类号： G06F12/00
CPC分类号： G06F12/0207
摘要： A register file in which the physical row/column mapping is decoupled from the logical row/column mapping. The physical register file includes R*C N-bit storage elements arranged in R rows and C columns. Each physical row includes an N-bit bus, a log2(C)-bit storage element selection line, and a log2(C)-bit output column selection line. In either a logical row or logical column access, no more than one storage element is selected per physical row and coupled to that row's bus, and each column's vertical bit line is uniquely coupled to one row's bus. The values on the storage element selection lines and on the output column selection lines determines which storage elements are coupled to which vertical bit lines. The width C of the register file, the number of rows R of the register file, and the size N of the fundamental data storage element can be independently changed without affecting the others. The size X of the X*N-bit logical data elements can be changed without changing R, C, N, or the width of the buses. The same addressing logic is used, regardless of data size and regardless of whether the access is logically row-wise or column-wise. Horizontal wire count is minimized by an appropriate logical-to-physical mapping of the storage cells.
摘要翻译：物理行/列映射与逻辑行/列映射分离的寄存器文件。物理寄存器文件包括以R行和C列排列的R * C N位存储元件。每个物理行包括N位总线，对数（2）（C）位存储元件选择行和对数2（C）位输出列选择行。在逻辑行或逻辑列访问中，每个物理行选择不超过一个存储元素并耦合到该行的总线，并且每列的垂直位线唯一地耦合到一行总线。存储元件选择线和输出列选择线上的值确定哪些存储元件被耦合到哪个垂直位线。寄存器文件的宽度C，寄存器文件的行数R和基本数据存储元件的大小N可以独立地改变而不影响其他。可以在不改变R，C，N或总线宽度的情况下改变X * N位逻辑数据元素的大小X. 使用相同的寻址逻辑，无论数据大小如何，无论访问是逻辑上是逐行还是逐列。通过存储单元的适当的逻辑到物理映射最小化水平线数。

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