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1. 发明授权

US08831603B2 Communications circuit and method with reduced power consumption 有权
标题翻译：具有降低功耗的通信电路和方法
公开(公告)号：US08831603B2
公开(公告)日：2014-09-09
申请号：US11480296
申请日：2006-06-30
申请人： Christopher John Nicol , Oliver Ridler , Charles Nicholas Alexander Thomas
发明人： Christopher John Nicol , Oliver Ridler , Charles Nicholas Alexander Thomas
IPC分类号： H04B7/00 , H04B7/204 , H04W4/00 , H04W52/02 , H04W52/14
CPC分类号： H04W52/0229 , H04W52/02 , H04W52/146 , Y02D70/1244
摘要： A method of operating a communications circuit with at least one control channel and at least one data channel includes the steps of monitoring the at least one control channel, powering a receiver portion of the circuit when the at least one control channel indicates that data is to be received, and refraining from powering the receiver portion when the at least one control channel indicates that data is not to be received. The circuit can operate, for example, under the 3GPP HSDPA standard. Where desired, the clock and power supply to the receiver portion and a bit rate processing portion can be independently gated.
摘要翻译：一种使用至少一个控制信道和至少一个数据信道操作通信电路的方法包括以下步骤：当所述至少一个控制信道指示所述数据到达所述至少一个控制信道时监视所述至少一个控制信道，为所述电路的接收机部分供电; 并且当所述至少一个控制信道指示不接收到所述数据时，不接收对所述接收器部分供电。该电路可以例如在3GPP HSDPA标准下操作。如果需要，可以独立地选通到接收机部分和比特率处理部分的时钟和电源。

2. 发明申请

US20080004008A1 Communications circuit and method with reduced power consumption 有权
标题翻译：具有降低功耗的通信电路和方法
公开(公告)号：US20080004008A1
公开(公告)日：2008-01-03
申请号：US11480296
申请日：2006-06-30
申请人： Christopher John Nicol , Oliver Ridler , Charles Nicholas Alexander Thomas
发明人： Christopher John Nicol , Oliver Ridler , Charles Nicholas Alexander Thomas
IPC分类号： H04Q7/20
CPC分类号： H04W52/0229 , H04W52/02 , H04W52/146 , Y02D70/1244
摘要： A method of operating a communications circuit with at least one control channel and at least one data channel includes the steps of monitoring the at least one control channel, powering a receiver portion of the circuit when the at least one control channel indicates that data is to be received, and refraining from powering the receiver portion when the at least one control channel indicates that data is not to be received. The circuit can operate, for example, under the 3GPP HSDPA standard. Where desired, the clock and power supply to the receiver portion and a bit rate processing portion can be independently gated.
摘要翻译：一种使用至少一个控制信道和至少一个数据信道操作通信电路的方法包括以下步骤：当所述至少一个控制信道指示所述数据到达所述至少一个控制信道时监视所述至少一个控制信道，为所述电路的接收机部分供电; 并且当所述至少一个控制信道指示不接收到所述数据时，不接收对所述接收器部分供电。该电路可以例如在3GPP HSDPA标准下操作。如果需要，可以独立地选通到接收机部分和比特率处理部分的时钟和电源。

3. 发明授权

US11528567B2 Sound capture focus adjustment for hearing prosthesis 有权
公开(公告)号：US11528567B2
公开(公告)日：2022-12-13
申请号：US16148278
申请日：2018-10-01
申请人： Oliver Ridler , Martin James Cosenza
发明人： Oliver Ridler , Martin James Cosenza
IPC分类号： H04R25/00 , A61N1/36
摘要： A hearing prosthesis, the hearing prosthesis including a plurality of sound capture devices and a determinator configured to generate a parameter indicative of an orientation of the plurality of sound capture devices relative to a reference, wherein the hearing prosthesis is configured to adjust a direction of focus of the hearing prosthesis based on at least the parameter.

4. 发明申请

US20140371815A1 Sound Processor Accessory 有权
标题翻译：声音处理器配件
公开(公告)号：US20140371815A1
公开(公告)日：2014-12-18
申请号：US13919226
申请日：2013-06-17
申请人： Oliver Ridler
发明人： Oliver Ridler
IPC分类号： A61N1/36
CPC分类号： A61N1/36032 , A61N1/0541 , A61N1/36036 , H04R25/43 , H04R25/554 , H04R2225/021 , H04R2225/67
摘要： Embodiments presented herein are generally directed to a sound processor accessory configured to be mechanically and electrically connected to a sound processor of an auditory prosthesis. The sound processor accessory comprises first and second sound input elements that are each configured to independently provide electrical signals representing sound signals to the sound processor via a shared connection.
摘要翻译：本文呈现的实施例通常涉及被配置为机械地和电连接到听觉假体的声音处理器的声音处理器附件。声音处理器附件包括第一和第二声音输入元件，每个声音输入元件被配置为经由共享连接独立地向声音处理器提供表示声音信号的电信号。

5. 发明申请

US20060239457A1 Selection of 1-out-of-n scrambled code blocks 审中-公开
标题翻译：选择1-out-of-n加扰码块
公开(公告)号：US20060239457A1
公开(公告)日：2006-10-26
申请号：US11114023
申请日：2005-04-26
申请人： Oliver Ridler , Benjamin Widdup , Graeme Woodward
发明人： Oliver Ridler , Benjamin Widdup , Graeme Woodward
IPC分类号： H04N7/167
CPC分类号： H04L1/0059 , H03M13/3776 , H04L1/0045 , H04L1/0068 , H04L1/0072
摘要： Apparatus and method to determine selection of a scrambled data channel before receipt of an entire data block. An initial portion of a block of data received in one of a plurality of scrambled data channels is decoded, then re-encoded. A value is computed related to the number of mis-matched data symbols based on a comparison of decoded/re-encoded data and the corresponding received data. A best one of the plurality of data channels is selected based on the computed value being beyond a given threshold value.
摘要翻译：在接收整个数据块之前确定加扰数据信道的选择的装置和方法。在多个加扰数据信道之一中接收的数据块的初始部分被解码，然后被重新编码。基于解码/再编码数据的比较和相应的接收数据，计算与错误匹配的数据符号的数量有关的值。基于所计算的值超过给定阈值来选择多个数据通道中的最佳数据通道。

6. 发明授权

US08989413B2 Sound capture focus adjustment for hearing prosthesis 有权
标题翻译：听觉假体的声音捕获焦点调整
公开(公告)号：US08989413B2
公开(公告)日：2015-03-24
申请号：US13232685
申请日：2011-09-14
申请人： Oliver Ridler , Martin James Cosenza
发明人： Oliver Ridler , Martin James Cosenza
IPC分类号： H04R25/00 , A61N1/36
CPC分类号： H04R25/405 , A61N1/36032 , A61N1/36036 , H04R25/407 , H04R2225/023 , H04R2225/61 , H04R2225/67 , H04R2430/20
摘要： A hearing prosthesis, the hearing prosthesis including a plurality of sound capture devices and a determinator configured to generate a parameter indicative of an orientation of the plurality of sound capture devices relative to a reference, wherein the hearing prosthesis is configured to adjust a direction of focus of the hearing prosthesis based on at least the parameter.
摘要翻译：一种听力假体，所述听觉假体包括多个声音捕获装置和确定器，所述确定器被配置为生成指示所述多个声音捕获装置相对于参考的取向的参数，其中所述听觉假体被配置成调整焦点的方向的听觉假体至少基于参数。

7. 发明授权

US07974997B2 Hardware matrix computation for wireless receivers 有权
标题翻译：无线接收机的硬件矩阵计算
公开(公告)号：US07974997B2
公开(公告)日：2011-07-05
申请号：US11731174
申请日：2007-03-30
申请人： Eliahou Arviv , Robert L. Lang , Yi-Chen Li , Oliver Ridler , Xiao-an Wang
发明人： Eliahou Arviv , Robert L. Lang , Yi-Chen Li , Oliver Ridler , Xiao-an Wang
IPC分类号： G06F17/16
CPC分类号： G06F17/16 , H04B1/707 , H04B2201/70707 , H04B2201/709727
摘要： In one embodiment, a receiver including one or more signal-processing blocks and a hardware-based matrix co-processor. The one or more signal-processing blocks are adapted to generate a processed signal from a received signal. The hardware-based matrix co-processor includes two or more different matrix-computation engines, each adapted to perform a different matrix computation, and one or more shared hardware-computation units, each adapted to perform a mathematical operation. At least one signal-processing block is adapted to offload matrix-based signal processing to the hardware-based matrix co-processor. Each of the two or more different matrix-computation engines is adapted to offload the same type of mathematical processing to at least one of the one or more shared hardware-computation units.
摘要翻译：在一个实施例中，接收机包括一个或多个信号处理块和基于硬件的矩阵协处理器。所述一个或多个信号处理块适于从接收到的信号产生经处理的信号。基于硬件的矩阵协处理器包括两个或更多个不同的矩阵计算引擎，每个矩阵计算引擎适于执行不同的矩阵计算，以及一个或多个共享硬件计算单元，每个共享硬件计算单元适于执行数学运算。至少一个信号处理块适于将基于矩阵的信号处理卸载到基于硬件的矩阵协处理器。两个或更多个不同的矩阵计算引擎中的每一个适于将相同类型的数学处理卸载到一个或多个共享硬件计算单元中的至少一个。

8. 发明申请

US20090296798A1 HSDPA CO-PROCESSOR FOR MOBILE TERMINALS 审中-公开
标题翻译：用于移动终端的HSDPA CO处理器
公开(公告)号：US20090296798A1
公开(公告)日：2009-12-03
申请号：US12295683
申请日：2007-04-05
申请人： Rami Banna , Mark A. Bickerstaff , Matthew E. Cooke , Adriel P. kind , Yi-Chen Li , Oliver Ridler , Uwe Sontowski , Charles N. A. Thomas , Long Ung , Koen Van den Beld , Benjamin J. Widdup , Graeme K. Woodward , Dominic Wing-Kin Yip , Gongyu Zhou
发明人： Rami Banna , Mark A. Bickerstaff , Matthew E. Cooke , Adriel P. kind , Yi-Chen Li , Oliver Ridler , Uwe Sontowski , Charles N. A. Thomas , Long Ung , Koen Van den Beld , Benjamin J. Widdup , Graeme K. Woodward , Dominic Wing-Kin Yip , Gongyu Zhou
IPC分类号： H03H7/40 , H04W4/00
CPC分类号： H04B1/70754 , H04B1/7097 , H04B2201/70701 , H04L25/03057 , H04L25/03292 , H04L2025/03617 , H04L2025/03687
摘要： In one embodiment, an HSDPA co-processor for 3GPP Release 6 Category 8 (7.2 Mb/s) HSDPA that provides all chip-rate, symbol-rate, physical-channel, and transport-channel processing for HSDPA in 90 nm CMOS. The co-processor design is scalable to all HSDPA data rates up to 14 Mb/s. The coprocessor implements an Advanced Receiver based on an NLMS equalizer, supports RX diversity and TX diversity, and provides up to 6.4 dB better performance than a typical single-antenna rake receiver. Thus, 3GPP R6 HSDPA functionality can be added to a legacy R99 modem using an HSDPA co-processor consistent with embodiments of the present invention, at a reasonable incremental cost and power.
摘要翻译：在一个实施例中，用于3GPP版本6类别（7.2Mb / s）HSDPA的HSDPA协处理器为90nm CMOS中的HSDPA提供所有芯片速率，符号速率，物理信道和传输信道处理。协处理器设计可扩展到高达14 Mb / s的所有HSDPA数据速率。协处理器基于NLMS均衡器实现高级接收机，支持RX分集和TX分集，并且比典型的单天线耙式接收机提供高达6.4 dB的性能。因此，3GPP R6 HSDPA功能可以以合理的增量成本和功率被添加到与本发明实施例一致的HSDPA协处理器的传统R99调制解调器。

9. 发明申请

US20080243982A1 Hardware matrix computation for wireless receivers 有权
标题翻译：无线接收机的硬件矩阵计算
公开(公告)号：US20080243982A1
公开(公告)日：2008-10-02
申请号：US11731174
申请日：2007-03-30
申请人： Eliahou Arviv , Robert L. Lang , Yi-Chen Li , Oliver Ridler , Xiao-an Wang
发明人： Eliahou Arviv , Robert L. Lang , Yi-Chen Li , Oliver Ridler , Xiao-an Wang
IPC分类号： G06F17/10 , G06F7/32
CPC分类号： G06F17/16 , H04B1/707 , H04B2201/70707 , H04B2201/709727
摘要： In one embodiment, a receiver including one or more signal-processing blocks and a hardware-based matrix co-processor. The one or more signal-processing blocks are adapted to generate a processed signal from a received signal. The hardware-based matrix co-processor includes two or more different matrix-computation engines, each adapted to perform a different matrix computation, and one or more shared hardware-computation units, each adapted to perform a mathematical operation. At least one signal-processing block is adapted to offload matrix-based signal processing to the hardware-based matrix co-processor. Each of the two or more different matrix-computation engines is adapted to offload the same type of mathematical processing to at least one of the one or more shared hardware-computation units.
摘要翻译：在一个实施例中，接收机包括一个或多个信号处理块和基于硬件的矩阵协处理器。所述一个或多个信号处理块适于从接收到的信号产生经处理的信号。基于硬件的矩阵协处理器包括两个或更多个不同的矩阵计算引擎，每个矩阵计算引擎适于执行不同的矩阵计算，以及一个或多个共享硬件计算单元，每个共享硬件计算单元适于执行数学运算。至少一个信号处理块适于将基于矩阵的信号处理卸载到基于硬件的矩阵协处理器。两个或更多个不同的矩阵计算引擎中的每一个适于将相同类型的数学处理卸载到一个或多个共享硬件计算单元中的至少一个。

10. 发明申请

US20180361151A1 INTERFERENCE SUPPRESSION IN TISSUE-STIMULATING PROSTHESES 审中-公开
公开(公告)号：US20180361151A1
公开(公告)日：2018-12-20
申请号：US15623798
申请日：2017-06-15
申请人： Oliver Ridler , Adam Hersbach
发明人： Oliver Ridler , Adam Hersbach
IPC分类号： A61N1/36 , H04R25/00 , A61N1/08 , A61N1/02
摘要： Presented herein are techniques for suppressing electrical interference caused by a feedback path(s) between an output channel and an input channel of an implantable medical device. In particular, the output channel carries stimulation signals that can pass through the feedback path(s) and appear in the input channel, thereby causing interference with any input signals carried by the input channel. The implantable medical device is configured to determine characteristics of the feedback and subsequently use the feedback characteristics to generate feedback compensation signals for application to the input channel.

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