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1. 发明申请

US20110256700A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20110256700A1
公开(公告)日：2011-10-20
申请号：US13087522
申请日：2011-04-15
申请人： Chong-Kwang Chang , Sung-Hon Chi , Young-Mook Oh , Ju-Beom Yi
发明人： Chong-Kwang Chang , Sung-Hon Chi , Young-Mook Oh , Ju-Beom Yi
IPC分类号： H01L21/28
CPC分类号： H01L21/823842 , H01L21/82345 , H01L29/495 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/78
摘要： A method of fabricating a semiconductor device capable of simplifying a fabrication process is provided. The method includes providing a substrate on which first and second regions are defined, forming an interlayer insulating film including first and second trenches on the substrate, the first and second trenches being formed in the first and second regions, respectively, forming a work function adjusting metal film on an upper surface of the interlayer insulating film, side and bottom surfaces of the first trench, and side and bottom surfaces of the second trench, forming a mask film on the interlayer insulating film to fill in the first and second trenches, the mask film including a developable material, forming a mask pattern by developing the mask film, the mask pattern exposing the work function adjusting metal film formed in the first region, removing the work function adjusting metal film formed in the first region by using the mask pattern, removing the mask pattern, and forming a first metal gate in the first trench and a second metal gate in the second trench.
摘要翻译：提供了一种制造能够简化制造工艺的半导体器件的方法。该方法包括提供在其上限定了第一和第二区域的基板，在基板上形成包括第一和第二沟槽的层间绝缘膜，第一和第二沟槽分别形成在第一和第二区域中，形成功函数调整层间绝缘膜的上表面的金属膜，第一沟槽的侧表面和底表面以及第二沟槽的侧表面和底表面，在层间绝缘膜上形成掩模膜以填充第一和第二沟槽，包含可显影材料的掩模膜，通过显影掩模膜形成掩模图案，掩模图案暴露在第一区域中形成的功函数调整金属膜，通过使用掩模图案去除形成在第一区域中的功函数调节金属膜去除掩模图案，以及在第一沟槽中形成第一金属栅极和在第二沟槽中形成第二金属栅极。

2. 发明授权

US08357576B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08357576B2
公开(公告)日：2013-01-22
申请号：US13007096
申请日：2011-01-14
申请人： Chong-Kwang Chang , Sung-Hon Chi , Hong-Jae Shin , Yong-Jin Chung , Young-Mook Oh , Ju-Beom Yi
发明人： Chong-Kwang Chang , Sung-Hon Chi , Hong-Jae Shin , Yong-Jin Chung , Young-Mook Oh , Ju-Beom Yi
IPC分类号： H01L21/8238
CPC分类号： H01L21/823864 , H01L21/28079 , H01L21/28088 , H01L21/28123 , H01L21/823807 , H01L21/823814 , H01L21/823842 , H01L29/165 , H01L29/66545 , H01L29/6659 , H01L29/66636 , H01L29/7834 , H01L29/7848
摘要： A method of manufacturing a semiconductor device, the method including providing a semiconductor substrate; forming a gate pattern on the semiconductor substrate such that the gate pattern includes a gate dielectric layer and a sacrificial gate electrode; forming an etch stop layer and a dielectric layer on the semiconductor substrate and the gate pattern; removing portions of the dielectric layer to expose the etch stop layer; performing an etch-back process on the etch stop layer to expose the sacrificial gate electrode; removing the sacrificial gate electrode to form a trench; forming a metal layer on the semiconductor substrate including the trench; removing portions of the metal layer to expose the dielectric layer; and performing an etch-back process on the metal layer to a predetermined target.
摘要翻译：一种制造半导体器件的方法，所述方法包括提供半导体衬底; 在所述半导体衬底上形成栅极图案，使得所述栅极图案包括栅极电介质层和牺牲栅电极; 在半导体衬底和栅极图案上形成蚀刻停止层和电介质层; 去除介电层的部分以暴露蚀刻停止层; 在所述蚀刻停止层上执行蚀刻工艺以暴露所述牺牲栅电极; 去除所述牺牲栅电极以形成沟槽; 在包括沟槽的半导体衬底上形成金属层; 去除所述金属层的部分以暴露所述介电层; 以及对所述金属层执行到预定目标的回蚀处理。

3. 发明申请

US20110195550A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20110195550A1
公开(公告)日：2011-08-11
申请号：US13007096
申请日：2011-01-14
申请人： Chong-Kwang CHANG , Sung-Hon Chi , Hong-Jae Shin , Yong-Jin Chung , Young-Mook Oh , Ju-Beom Yi
发明人： Chong-Kwang CHANG , Sung-Hon Chi , Hong-Jae Shin , Yong-Jin Chung , Young-Mook Oh , Ju-Beom Yi
IPC分类号： H01L21/8238 , H01L21/336
CPC分类号： H01L21/823864 , H01L21/28079 , H01L21/28088 , H01L21/28123 , H01L21/823807 , H01L21/823814 , H01L21/823842 , H01L29/165 , H01L29/66545 , H01L29/6659 , H01L29/66636 , H01L29/7834 , H01L29/7848
摘要： A method of manufacturing a semiconductor device, the method including providing a semiconductor substrate; forming a gate pattern on the semiconductor substrate such that the gate pattern includes a gate dielectric layer and a sacrificial gate electrode; forming an etch stop layer and a dielectric layer on the semiconductor substrate and the gate pattern; removing portions of the dielectric layer to expose the etch stop layer; performing an etch-back process on the etch stop layer to expose the sacrificial gate electrode; removing the sacrificial gate electrode to form a trench; forming a metal layer on the semiconductor substrate including the trench; removing portions of the metal layer to expose the dielectric layer; and performing an etch-back process on the metal layer to a predetermined target.
摘要翻译：一种制造半导体器件的方法，所述方法包括提供半导体衬底; 在所述半导体衬底上形成栅极图案，使得所述栅极图案包括栅极电介质层和牺牲栅电极; 在半导体衬底和栅极图案上形成蚀刻停止层和电介质层; 去除介电层的部分以暴露蚀刻停止层; 在所述蚀刻停止层上执行蚀刻工艺以暴露所述牺牲栅电极; 去除所述牺牲栅电极以形成沟槽; 在包括沟槽的半导体衬底上形成金属层; 去除所述金属层的部分以暴露所述介电层; 以及对所述金属层执行到预定目标的回蚀处理。

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