专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07354623B2 Surface modification of a porous organic material through the use of a supercritical fluid 有权
标题翻译：通过使用超临界流体对多孔有机材料进行表面改性
公开(公告)号：US07354623B2
公开(公告)日：2008-04-08
申请号：US10852381
申请日：2004-05-24
申请人： Ching-Ya Wang , Ping Chuang , Sunny Wu , Yu-Liang Lin , Hung-Jung Tu , Mei-Sheng Zhou , Henry Lo
发明人： Ching-Ya Wang , Ping Chuang , Sunny Wu , Yu-Liang Lin , Hung-Jung Tu , Mei-Sheng Zhou , Henry Lo
IPC分类号： B05D3/00 , B05D5/00
CPC分类号： H01L21/02203 , H01L21/02118 , H01L21/31058 , H01L21/312 , H01L21/31695 , Y10T428/249953 , Y10T428/249987
摘要： An organic layer, such as a porous low-K dielectric in an IC, contains pores open at its surface. To close the pores, the organic layer is contacted by a supercritical fluid that is a solvent for the layer. After a small amount of the surface and the wall of the open pores is solvated, a phase transition of the solvated organic material is effected at the surface to cover it with a dense, smooth, non-porous film that seals the open pores.
摘要翻译：有机层，例如IC中的多孔低K电介质，其表面含有孔。为了封闭孔，有机层与作为该层的溶剂的超临界流体接触。在少量表面和开放孔的壁被溶剂化后，在表面进行溶剂化有机材料的相变以用密封，开孔的密实，光滑，无孔的膜覆盖。

2. 发明申请

US20050260402A1 Surface modification of a porous organic material through the use of a supercritical fluid 有权
标题翻译：通过使用超临界流体对多孔有机材料进行表面改性
公开(公告)号：US20050260402A1
公开(公告)日：2005-11-24
申请号：US10852381
申请日：2004-05-24
申请人： Ching-Ya Wang , Ping Chuang , Sunny Wu , Yu-Liang Lin , Hung-Jung Tu , Mei-Sheng Zhou , Henry Lo
发明人： Ching-Ya Wang , Ping Chuang , Sunny Wu , Yu-Liang Lin , Hung-Jung Tu , Mei-Sheng Zhou , Henry Lo
IPC分类号： B05D3/04 , B05D5/12 , B32B3/26 , C08K3/00 , H01L21/3105 , H01L21/312 , H01L21/316
CPC分类号： H01L21/02203 , H01L21/02118 , H01L21/31058 , H01L21/312 , H01L21/31695 , Y10T428/249953 , Y10T428/249987
摘要： An organic layer, such as a porous low-K dielectric in an IC, contains pores open at its surface. To close the pores, the organic layer is contacted by a supercritical fluid that is a solvent for the layer. After a small amount of the surface and the wall of the open pores is solvated, a phase transition of the solvated organic material is effected at the surface to cover it with a dense, smooth, non-porous film that seals the open pores.
摘要翻译：有机层，例如IC中的多孔低K电介质，其表面含有孔。为了封闭孔，有机层与作为该层的溶剂的超临界流体接触。在少量表面和开放孔的壁被溶剂化后，在表面进行溶剂化有机材料的相变以用密封，开孔的密实，光滑，无孔的膜覆盖。

3. 发明申请

US20050158664A1 Method of integrating post-etching cleaning process with deposition for semiconductor device 审中-公开
标题翻译：将蚀刻后清洗工艺与半导体器件沉积相结合的方法
公开(公告)号：US20050158664A1
公开(公告)日：2005-07-21
申请号：US10760927
申请日：2004-01-20
申请人： Joshua Tseng , Ping Chuang , Hung-Jung Tu , Ching-Ya Wang , Yu-Liang Lin , Henry Lo , Mei-Sheng Zhou
发明人： Joshua Tseng , Ping Chuang , Hung-Jung Tu , Ching-Ya Wang , Yu-Liang Lin , Henry Lo , Mei-Sheng Zhou
IPC分类号： G03F7/00 , G03F7/42 , H01L21/00 , H01L21/311 , H01L21/768 , H01L23/52
CPC分类号： H01L21/76802 , G03F7/422 , G03F7/423 , G03F7/425 , G03F7/426 , H01L21/31116 , H01L21/31133 , H01L21/31144 , H01L21/76877
摘要： A method of integrating a post-etching cleaning process with deposition for a semiconductor device. A substrate having a damascene structure formed by etching a dielectric layer formed thereon using an overlying photoresist mask as an etching mask is provided. A cleaning process is performed by a supercritical fluid to remove the photoresist mask and post-etching by-products. An interconnect layer is formed in-situ in the damascene structure using the supercritical fluid as a reaction medium, wherein the cleaning process and the subsequent interconnect layer formation are performed in one process chamber or in different process chambers of a processing tool.
摘要翻译：将后蚀刻清洗工艺与用于半导体器件的沉积集成的方法。提供具有通过使用覆盖光致抗蚀剂掩模蚀刻形成在其上的介电层作为蚀刻掩模形成的镶嵌结构的基板。通过超临界流体进行清洁处理以除去光致抗蚀剂掩模和后蚀刻副产物。使用超临界流体作为反应介质，在镶嵌结构中原位形成互连层，其中清洁工艺和随后的互连层形成在一个处理室中或在处理工具的不同处理室中进行。

4. 发明授权

US06875285B2 System and method for dampening high pressure impact on porous materials 失效
标题翻译：用于抑制高压冲击多孔材料的系统和方法
公开(公告)号：US06875285B2
公开(公告)日：2005-04-05
申请号：US10422339
申请日：2003-04-24
申请人： Ching-Ya Wang , Ping Chuang , Yu-Liang Lin , Mei-Sheng Zhou , Henry Lo
发明人： Ching-Ya Wang , Ping Chuang , Yu-Liang Lin , Mei-Sheng Zhou , Henry Lo
IPC分类号： B08B7/00 , H01L21/306 , H01L21/311 , C23G1/00
CPC分类号： H01L21/31116 , B08B7/0021 , H01L21/02052
摘要： System and method for reducing damage to a semiconductor substrate when using cleaning fluids at elevated pressures to clean the semiconductor substrates. A preferred embodiment comprises applying the cleaning fluid at a first pressure for a first time period, wherein the first pressure is relatively low, and then increasing the pressure of the cleaning fluid to a pressure level that can effectively clean the semiconductor substrate and maintaining the pressure level for a second time period. The application of the cleaning fluid at the relatively low initial pressure acts as a temporary filler and creates a buffer of the cleaning fluid on the semiconductor substrate and helps to dampen the impact of the subsequent high pressure application of the cleaning fluid on the semiconductor substrate.
摘要翻译：当在高压下使用清洁流体以清洁半导体衬底时，减少对半导体衬底的损伤的系统和方法。优选实施例包括在第一时间段内施加第一压力的清洁流体，其中第一压力相对较低，然后将清洁流体的压力提高到可以有效地清洁半导体衬底并保持压力的压力水平水平第二次。以相对较低的初始压力施加清洁流体作为临时填料并在半导体衬底上产生清洗液的缓冲液，并且有助于抑制随后的高压施加清洁流体对半导体衬底的冲击。

5. 发明授权

US07083495B2 Advanced process control approach for Cu interconnect wiring sheet resistance control 失效
标题翻译： Cu互连布线电阻控制的先进工艺控制方法
公开(公告)号：US07083495B2
公开(公告)日：2006-08-01
申请号：US10723236
申请日：2003-11-26
申请人： Chun Hsien Lin , Ai-Sen Liu , Sunny Wu , Yu-Liang Lin , Henry Lo , Mei-Sheng Zhou
发明人： Chun Hsien Lin , Ai-Sen Liu , Sunny Wu , Yu-Liang Lin , Henry Lo , Mei-Sheng Zhou
IPC分类号： B24B49/00 , B24B1/00
CPC分类号： B24B51/00 , B24B37/042 , G05B13/024 , H01L21/31053 , H01L21/3212
摘要： A wafer based APC method for controlling an oxide (Cu, or TaN) polish step is described and combines a feed forward model that compensates for incoming wafer variations with a feed backward model which compensates for CMP variations. The method is geared toward minimizing Rs 3σ variations. A Rs target value is inputted with metrology data from previous processes that affects the width and thickness of the copper layer. A copper thickness target and polish time for the first wafer is determined. Post CMP measurement data of the first wafer is used to modify the polish rate with a disturbance factor and an updated polish time is computed for subsequent wafers. The CMP recipe for each wafer is adjusted with metrology data and post CMP measurements. The APC method is successful in controlling copper Rs variations for the 90 nm technology node and is independent of copper pattern density.
摘要翻译：描述了用于控制氧化物（Cu或TaN）抛光步骤的基于晶圆的APC方法，并且组合了用于补偿进入晶片变化的前馈模型与补偿CMP变化的馈送反向模型。该方法面向最小化Rs 3sigma变化。输入Rs目标值，其中来自先前工艺的测量数据影响铜层的宽度和厚度。确定第一晶片的铜厚度目标和抛光时间。第一晶片的CMP后测量数据被用于利用干扰因子修改抛光速率，并且为随后的晶片计算更新的抛光时间。每个晶片的CMP配方用测量数据和后CMP测量进行调整。 APC方法成功地控制了90nm技术节点的铜Rs变化，并且与铜图案密度无关。

6. 发明申请

US20050112997A1 Advanced process control approach for Cu interconnect wiring sheet resistance control 失效
标题翻译： Cu互连布线电阻控制的先进工艺控制方法
公开(公告)号：US20050112997A1
公开(公告)日：2005-05-26
申请号：US10723236
申请日：2003-11-26
申请人： Chun Lin , Ai-Sen Liu , Sunny Wu , Yu-Liang Lin , Henry Lo , Mei-Sheng Zhou
发明人： Chun Lin , Ai-Sen Liu , Sunny Wu , Yu-Liang Lin , Henry Lo , Mei-Sheng Zhou
IPC分类号： B24B37/04 , B24B51/00 , G05B13/02 , H01L21/3105 , H01L21/321 , B24B49/00 , B24B1/00
CPC分类号： B24B51/00 , B24B37/042 , G05B13/024 , H01L21/31053 , H01L21/3212
摘要： A wafer based APC method for controlling an oxide (Cu, or TaN) polish step is described and combines a feed forward model that compensates for incoming wafer variations with a feed backward model which compensates for CMP variations. The method is geared toward minimizing Rs 3σ variations. A Rs target value is inputted with metrology data from previous processes that affects the width and thickness of the copper layer. A copper thickness target and polish time for the first wafer is determined. Post CMP measurement data of the first wafer is used to modify the polish rate with a disturbance factor and an updated polish time is computed for subsequent wafers. The CMP recipe for each wafer is adjusted with metrology data and post CMP measurements. The APC method is successful in controlling copper Rs variations for the 90 nm technology node and is independent of copper pattern density.
摘要翻译：描述了用于控制氧化物（Cu或TaN）抛光步骤的基于晶圆的APC方法，并且组合了用于补偿进入晶片变化的前馈模型与补偿CMP变化的馈送反向模型。该方法面向最小化Rs 3sigma变化。输入Rs目标值，其中来自先前工艺的测量数据影响铜层的宽度和厚度。确定第一晶片的铜厚度目标和抛光时间。第一晶片的CMP后测量数据被用于利用干扰因子修改抛光速率，并且为随后的晶片计算更新的抛光时间。每个晶片的CMP配方用测量数据和后CMP测量进行调整。 APC方法成功地控制了90nm技术节点的铜Rs变化，并且与铜图案密度无关。

7. 发明申请

US20050282396A1 Micro-etching method to replicate alignment marks for semiconductor wafer photolithography 有权
标题翻译：用于复制半导体晶片光刻的对准标记的微蚀刻方法
公开(公告)号：US20050282396A1
公开(公告)日：2005-12-22
申请号：US10872238
申请日：2004-06-18
申请人： Yu-Liang Lin , Henry Lo , Chung-Long Chang , Gorge Huang , Tony Lu , Gnesh Yeh , Candy Liang , Chun-Hsien Lin , Mei Sheng Zhou , Sunny Wu , Ai-Sen Liu , Cheng-Lin Huang , Li-Jui Chen , Shih Wang
发明人： Yu-Liang Lin , Henry Lo , Chung-Long Chang , Gorge Huang , Tony Lu , Gnesh Yeh , Candy Liang , Chun-Hsien Lin , Mei Sheng Zhou , Sunny Wu , Ai-Sen Liu , Cheng-Lin Huang , Li-Jui Chen , Shih Wang
IPC分类号： H01L21/00 , H01L21/302 , H01L21/311 , H01L21/336 , H01L21/461 , H01L23/544
CPC分类号： H01L23/544 , H01L21/31111 , H01L21/67282 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453 , H01L2223/5446 , H01L2924/0002 , H01L2924/00
摘要： A method and apparatus for locally etching a substrate area the method including providing a substrate comprising a process surface; depositing a material layer over the process surface; and, applying a wet etchant to cover a targeted etching portion of the process surface while excluding an adjacent surrounding area to selectively etch the material layer overlying the targeted etching portion.
摘要翻译：一种用于局部蚀刻衬底区域的方法和装置，该方法包括提供包含工艺表面的衬底; 在工艺表面上沉积材料层; 以及施加湿蚀刻剂以覆盖所述工艺表面的目标蚀刻部分，同时排除相邻的周围区域以选择性地蚀刻覆盖所述目标蚀刻部分的所述材料层。

8. 发明授权

US07338909B2 Micro-etching method to replicate alignment marks for semiconductor wafer photolithography 有权
标题翻译：用于复制半导体晶片光刻的对准标记的微蚀刻方法
公开(公告)号：US07338909B2
公开(公告)日：2008-03-04
申请号：US10872238
申请日：2004-06-18
申请人： Yu-Liang Lin , Henry Lo , Chung-Long Chang , Gorge Huang , Tony Lu , Gnesh Yeh , Candy Liang , Chun-Hsien Lin , Mei Sheng Zhou , Sunny Su , Ai-Sen Liu , Cheng-Lin Huang , Li-Jui Chen , Shih Che Wang
发明人： Yu-Liang Lin , Henry Lo , Chung-Long Chang , Gorge Huang , Tony Lu , Gnesh Yeh , Candy Liang , Chun-Hsien Lin , Mei Sheng Zhou , Sunny Su , Ai-Sen Liu , Cheng-Lin Huang , Li-Jui Chen , Shih Che Wang
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L23/544 , H01L21/31111 , H01L21/67282 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453 , H01L2223/5446 , H01L2924/0002 , H01L2924/00
摘要： A method and apparatus for locally etching a substrate area the method including providing a substrate comprising a process surface; depositing a material layer over the process surface; and, applying a wet etchant to cover a targeted etching portion of the process surface while excluding an adjacent surrounding area to selectively etch the material layer overlying the targeted etching portion.
摘要翻译：一种用于局部蚀刻衬底区域的方法和装置，该方法包括提供包含工艺表面的衬底; 在工艺表面上沉积材料层; 以及施加湿蚀刻剂以覆盖所述工艺表面的目标蚀刻部分，同时排除相邻的周围区域以选择性地蚀刻覆盖所述目标蚀刻部分的所述材料层。

9. 发明申请

US20050186753A1 FIB exposure of alignment marks in MIM technology 审中-公开
标题翻译： MIM技术中FIB曝光对准标记
公开(公告)号：US20050186753A1
公开(公告)日：2005-08-25
申请号：US10786187
申请日：2004-02-25
申请人： Ping-Hsu Chen , Ping Chuang , Mei-Sheng Zhou , Francis Ko , Huxley Lee , Joshua Tseng , Henry Lo
发明人： Ping-Hsu Chen , Ping Chuang , Mei-Sheng Zhou , Francis Ko , Huxley Lee , Joshua Tseng , Henry Lo
IPC分类号： G03F9/00 , H01J37/304 , H01L21/302 , H01L21/461 , H01L21/76 , H01L23/544
CPC分类号： H01L23/544 , G03F9/708 , G03F9/7084 , H01J37/3045 , H01L2223/54453 , H01L2924/0002 , H01L2924/00
摘要： A new and improved method for exposing alignment marks on a substrate by locally cutting through a metal or non-metal layer or layers sequentially deposited on the substrate above the alignment marks, using focused ion beam (FIB) technology. In a preferred embodiment, a method for exposing alignment marks on a substrate can be carried out by first providing a substrate that has multiple alignment marks provided thereon and at least one overlying opaque layer, typically but not necessarily metal, deposited on the substrate above the alignment marks. A focused ion beam is then directed against the overlying opaque layer or layers to cut through the layer or layers and expose the alignment marks on the substrate. A noble gas, preferably argon, is typically used as the ion source for the focused ion beam.
摘要翻译：一种新的和改进的方法，通过使用聚焦离子束（FIB）技术，通过局部切割穿过对准标记上方的基板上的金属或非金属层或层而在基板上曝光对准标记。在优选实施例中，用于在衬底上曝光对准标记的方法可以通过首先提供其上设置有多个对准标记的衬底和沉积在衬底上方的至少一个上覆的不透明层（通常但不一定是金属）对齐标记然后将聚焦离子束定向到上覆的不透明层或层以切穿该层或者暴露衬底上的对准标记。惰性气体，优选氩气通常用作聚焦离子束的离子源。

10. 发明授权

US06872127B2 Polishing pad conditioning disks for chemical mechanical polisher 有权
标题翻译：用于化学机械抛光机的抛光垫调节盘
公开(公告)号：US06872127B2
公开(公告)日：2005-03-29
申请号：US10194894
申请日：2002-07-11
申请人： Yu-Liang Lin , Henry Lo , Ping Chuang
发明人： Yu-Liang Lin , Henry Lo , Ping Chuang
IPC分类号： B24B53/017 , B24B53/12 , B24B1/00
CPC分类号： B24B53/017 , B24B53/12
摘要： The invention relates to disks for conditioning pads used in the chemical mechanical polishing of semiconductor wafers, and a method of fabricating the pads. In one embodiment, the conditioning pad includes multiple, pyramid-shaped, truncated protrusions which are cut or shaped in the surface of a typically stainless steel substrate. Each of the truncated protrusions includes a plateau in the top thereof. A seed layer, typically titanium nitride (TiN), is provided on the surface of the protrusions, and a contact layer such as diamond-like carbon (DLC) or other suitable film is provided over the seed layer. In another embodiment, each of the protrusions is pyramid-shaped and includes a pointed apex at the top thereof.
摘要翻译：本发明涉及用于半导体晶片的化学机械抛光中的调节垫的盘及其制造方法。在一个实施例中，调节垫包括在典型的不锈钢衬底的表面中切割或成形的多个金字塔形的截头突起。每个截头突起在其顶部包括平台。在突起的表面上提供种子层，通常为氮化钛（TiN），并且在种子层上提供诸如类金刚石碳（DLC）等接触层或其它合适的膜。在另一个实施例中，每个突起是金字塔形的，并且在其顶部包括尖顶。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式