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2. 发明申请

US20120193629A1 ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：阵列基板及其制造方法
公开(公告)号：US20120193629A1
公开(公告)日：2012-08-02
申请号：US13439092
申请日：2012-04-04
申请人： Hsiang-Lin LIN , Ching-Huan LIN , Chih-Hung SHIH , Wei-Ming HUANG
发明人： Hsiang-Lin LIN , Ching-Huan LIN , Chih-Hung SHIH , Wei-Ming HUANG
IPC分类号： H01L27/15 , H01L27/06
CPC分类号： H01L27/124
摘要： An array substrate and method for manufacturing the same is provided, wherein a data line is composed of first and second segments connected by a contact pad. First and second insulation layers are disposed between the first segment of the data line and a shielding electrode. In addition, the first insulation layer is disposed between the second segment of the data line and a gate line in their overlapping area. Accordingly, the coupling effect between the conductive layers can be reduced. For example, the RC delay problem due to parasitic capacitance between the shielding electrode and the data line is solved. As a result of the design of the two insulator layers between the first segment of the data line and the shielding electrode, the shorting between the conductive layers can also be simultaneously solved and the product yield can be increased.
摘要翻译：提供阵列基板及其制造方法，其中数据线由通过接触焊盘连接的第一和第二部分组成。第一和第二绝缘层设置在数据线的第一段和屏蔽电极之间。此外，第一绝缘层设置在数据线的第二段和其重叠区域中的栅极线之间。因此，可以降低导电层之间的耦合效应。例如，解决了由于屏蔽电极和数据线之间的寄生电容引起的RC延迟问题。作为数据线的第一段与屏蔽电极之间的两个绝缘体层的设计的结果，导电层之间的短路也可以同时解决，并且可以提高产品的产率。

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