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1. 发明申请

US20140021628A1 METHOD FOR FORMING INTERLAYER CONNECTORS IN A THREE-DIMENSIONAL STACKED IC DEVICE 有权
标题翻译：在三维堆叠IC器件中形成中间层连接器的方法
公开(公告)号：US20140021628A1
公开(公告)日：2014-01-23
申请号：US13607555
申请日：2012-09-07
申请人： Yen-Hao Shih , Shih-Hung Chen , Teng-Hao Yeh , Chih-Wei Hu , Feng-Nien Tsai , Lo-Yueh Lin
发明人： Yen-Hao Shih , Shih-Hung Chen , Teng-Hao Yeh , Chih-Wei Hu , Feng-Nien Tsai , Lo-Yueh Lin
IPC分类号： H01L21/768 , H01L23/48
CPC分类号： H01L23/5226 , H01L21/31116 , H01L21/31144 , H01L21/32137 , H01L21/76805 , H01L21/76816 , H01L21/76831 , H01L23/53271 , H01L23/5329 , H01L27/11526 , H01L27/11548 , H01L27/11556 , H01L27/11573 , H01L27/11575 , H01L27/11582 , H01L2924/0002 , H01L2924/00
摘要： A method is used with an IC device including a stack of dielectric/conductive layers to form interlayer connectors extending from a surface of the device to the conductive layers. Contact openings are created through a dielectric layer to a first conductive layer. N etch masks, with 2N−1 being less than W, 2N being greater than or equal to W, have spaced apart open etch regions and mask regions elsewhere. The stack of layers are etched only through W−1 contact openings to create extended contact openings extending to W−1 conductive layers; 2n−1 conductive layers are etched for up to half of the contact openings for each etch mask n=1, 2 . . . N. The contact openings are etched with different combinations of the etch masks' open etch regions. Interlayer connectors are formed in the contact openings.
摘要翻译：一种使用IC器件的方法包括一叠介电/导电层，以形成从器件表面延伸到导电层的层间连接器。通过电介质层产生接触开口到第一导电层。 N型蚀刻掩模，其中2N-1小于W，2N大于或等于W，其间具有间隔开的开放蚀刻区域和掩模区域。层叠层仅通过W-1接触开口蚀刻以产生延伸到W-1导电层的延伸的接触开口; 对于每个蚀刻掩模n = 1,2，2n-1个导电层被蚀刻用于多达一半的接触开口。。。用蚀刻掩模的开放蚀刻区域的不同组合蚀刻接触开口。中间层连接器形成在接触开口中。

2. 发明授权

US08633099B1 Method for forming interlayer connectors in a three-dimensional stacked IC device 有权
标题翻译：在三维叠层IC器件中形成层间连接器的方法
公开(公告)号：US08633099B1
公开(公告)日：2014-01-21
申请号：US13607555
申请日：2012-09-07
申请人： Yen-Hao Shih , Shih-Hung Chen , Teng-Hao Yeh , Chih-Wei Hu , Feng-Nien Tsai , Lo-Yueh Lin
发明人： Yen-Hao Shih , Shih-Hung Chen , Teng-Hao Yeh , Chih-Wei Hu , Feng-Nien Tsai , Lo-Yueh Lin
IPC分类号： H01L21/44 , H01L21/4763 , H01L23/48 , H01L29/40
CPC分类号： H01L23/5226 , H01L21/31116 , H01L21/31144 , H01L21/32137 , H01L21/76805 , H01L21/76816 , H01L21/76831 , H01L23/53271 , H01L23/5329 , H01L27/11526 , H01L27/11548 , H01L27/11556 , H01L27/11573 , H01L27/11575 , H01L27/11582 , H01L2924/0002 , H01L2924/00
摘要： A method is used with an IC device including a stack of dielectric/conductive layers to form interlayer connectors extending from a surface of the device to the conductive layers. Contact openings are created through a dielectric layer to a first conductive layer. N etch masks, with 2N−1 being less than W, 2N being greater than or equal to W, have spaced apart open etch regions and mask regions elsewhere. The stack of layers are etched only through W−1 contact openings to create extended contact openings extending to W−1 conductive layers; 2n−1 conductive layers are etched for up to half of the contact openings for each etch mask n=1, 2 . . . N. The contact openings are etched with different combinations of the etch masks' open etch regions. Interlayer connectors are formed in the contact openings.
摘要翻译：一种使用IC器件的方法包括一叠介电/导电层，以形成从器件表面延伸到导电层的层间连接。通过电介质层产生接触开口到第一导电层。 N型蚀刻掩模，其中2N-1小于W，2N大于或等于W，其间具有间隔开的开放蚀刻区域和掩模区域。层叠层仅通过W-1接触开口蚀刻以产生延伸到W-1导电层的延伸的接触开口; 对于每个蚀刻掩模n = 1,2，2n-1个导电层被蚀刻用于多达一半的接触开口。。。用蚀刻掩模的开放蚀刻区域的不同组合蚀刻接触开口。中间层连接器形成在接触开口中。

3. 发明授权

US09082657B2 Semiconductor structure and method for manufacturing the same 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US09082657B2
公开(公告)日：2015-07-14
申请号：US13676672
申请日：2012-11-14
申请人： Chih-Wei Hu , Teng-Hao Yeh , Yen-Hao Shih
发明人： Chih-Wei Hu , Teng-Hao Yeh , Yen-Hao Shih
IPC分类号： H01L21/3205 , H01L27/115
CPC分类号： H01L27/11578 , H01L21/28575 , H01L27/11565 , H01L29/0891 , H01L29/2003 , H01L29/42316 , H01L29/42376 , H01L29/452 , H01L29/66462 , H01L29/7787
摘要： A semiconductor structure and a method for manufacturing the same are provided. The method comprises following steps. Semiconductor units are arranged on a substrate. A material layer is formed on the semiconductor units. A first patterned mask layer is formed on the semiconductor units. The first patterned mask layer has a mask opening corresponding to a portion of the semiconductor units and exposing the material layer. A portion of the material layer exposed by the mask opening is removed to remain a portion of the material layer on a sidewall of each of the semiconductor units exposed by the mask opening to form spacer structures.
摘要翻译：提供半导体结构及其制造方法。该方法包括以下步骤。半导体单元布置在基板上。在半导体单元上形成材料层。在半导体单元上形成第一图案化掩模层。第一图案化掩模层具有对应于半导体单元的一部分并且暴露材料层的掩模开口。去除由掩模开口暴露的材料层的一部分，以保留由掩模开口暴露的每个半导体单元的侧壁上的材料层的一部分，以形成间隔结构。

4. 发明授权

US08695673B2 Laminator with a corner cutter 有权
标题翻译：层压机与角切割机
公开(公告)号：US08695673B2
公开(公告)日：2014-04-15
申请号：US13286851
申请日：2011-11-01
申请人： Chih-Wei Hu
发明人： Chih-Wei Hu
IPC分类号： B30B5/02 , B30B5/04 , B29C65/00 , B29C65/02
CPC分类号： B26F1/12 , B26D2001/0066 , B32B37/0046 , B32B2037/0061 , Y10T156/108 , Y10T156/12 , Y10T156/1317 , Y10T156/1326 , Y10T156/1378
摘要： The present invention provides a laminator with a corner cutter including a main body, a laminating device and a cutting device. The main body includes a receiving space. The main body is horizontally formed with an entering slot, an exiting slot, a penetrating groove and a corner-cutting recess. The main body having two lateral sides formed between the entering slot and the exiting slot, the corner-cutting recess being disposed at one of the lateral sides. The laminating device disposed in the receiving space includes two rolling rods, a driving portion and two heaters. The two rolling rods are heated by the two heating members. The driving portion drives the two rolling rods to rotate. The cutting device includes a pushing portion and a cutting portion. The cutting device is disposed at one side of the receiving space where corresponding to the corner-cutting recess.
摘要翻译：本发明提供一种具有角切割器的层压机，其包括主体，层压装置和切割装置。主体包括接收空间。主体水平地形成有进入槽，离开槽，穿透槽和角切割凹槽。主体具有形成在进入槽和离开槽之间的两个侧面，角切割凹槽设置在横向侧中的一个侧面。设置在容纳空间中的层压装置包括两个滚动杆，一个驱动部分和两个加热器。两个滚动杆由两个加热构件加热。驱动部分驱动两个滚动杆旋转。切割装置包括推动部分和切割部分。切割装置设置在与切角凹部对应的容纳空间的一侧。

5. 发明申请

US20130185549A1 ELECTRONIC DEVICE AND BIOS UPDATING DEVICE THEREOF 审中-公开
标题翻译：电子设备及其BIOS更新设备
公开(公告)号：US20130185549A1
公开(公告)日：2013-07-18
申请号：US13736975
申请日：2013-01-09
申请人： Chih-Wei Hu
发明人： Chih-Wei Hu
IPC分类号： G06F9/44
CPC分类号： G06F9/4401 , G06F8/654
摘要： An electronic device and a basic input/output system (BIOS) updating device thereof are provided. The electronic device includes a central processing unit (CPU), a chipset, a first interface circuit and a second interface circuit. The chipset is coupled to the CPU. The first interface circuit is coupled to a first memory and a second memory. The first memory includes a first BIOS file and the second memory includes a second BIOS file. The second interface circuit is coupled to the first interface circuit and an external storage device. When the external storage device includes a third BIOS file, a target memory is selected from the first memory and second memory according to a first rule and the target memory is updated using the third BIOS file. Thus, BIOS firmware of the electronic device can be safely updated.
摘要翻译：提供电子装置及其基本输入/输出系统（BIOS）更新装置。电子设备包括中央处理单元（CPU），芯片组，第一接口电路和第二接口电路。该芯片组耦合到CPU。第一接口电路耦合到第一存储器和第二存储器。第一存储器包括第一BIOS文件，第二存储器包括第二BIOS文件。第二接口电路耦合到第一接口电路和外部存储设备。当外部存储装置包括第三BIOS文件时，根据第一规则从第一存储器和第二存储器中选择目标存储器，并且使用第三BIOS文件更新目标存储器。因此，可以安全地更新电子设备的BIOS固件。

6. 发明授权

US07604149B2 Effort-saving stapler 失效
标题翻译：努力节约订书机
公开(公告)号：US07604149B2
公开(公告)日：2009-10-20
申请号：US12023091
申请日：2008-01-31
申请人： Eric Tsai , Pi-Yi Chang , Chih-Wei Hu
发明人： Eric Tsai , Pi-Yi Chang , Chih-Wei Hu
IPC分类号： B25C1/04
CPC分类号： B25C5/0242 , B25C5/11
摘要： An effort-saving stapler includes a shell device and a triggering device installed to the shell device. The triggering device includes a trigger, an operation element and two bearings. An end of the trigger defines a lever for user to hold, and another end of the trigger includes teeth engaging with the shell device. A pivot pin is adapted for inserting through the trigger, the operation element and the bearings so that the pivot pin can drive the operation element to move in the trigger. A limit pin is adapted for inserting through the trigger and the operation element and abuts with the shell device. The pivot pin is regarded as a fulcrum, while the trigger is pressed, the teeth of trigger engage with the shell device so that the pivot pin quickly moves with the trigger.
摘要翻译：省力订书机包括壳体装置和安装在壳体装置上的触发装置。触发装置包括触发器，操作元件和两个轴承。触发器的端部限定用于使用者握持的杠杆，并且触发器的另一端包括与壳体装置接合的齿。枢轴销适于通过触发器，操作元件和轴承插入，使得枢轴销可以驱动操作元件在触发器中移动。限位销适用于通过触发器和操作元件插入并与壳体装置抵接。枢轴销被视为支点，而触发器被按压时，触发器的齿与壳体装置接合，使得枢轴销与触发器快速移动。

7. 发明授权

US07028120B2 Apparatus and method for reducing LDRQ input pin count of a low pin count host using serially coupled peripheral devices 有权
标题翻译：使用串行外围设备降低低引脚数主机的LDRQ输入引脚数的装置和方法
公开(公告)号：US07028120B2
公开(公告)日：2006-04-11
申请号：US10314201
申请日：2002-12-09
申请人： Chih-Wei Hu , Chia-Chun Lien , Wallace Huang
发明人： Chih-Wei Hu , Chia-Chun Lien , Wallace Huang
IPC分类号： G06F1/00
CPC分类号： G06F13/122 , G06F13/14
摘要： An apparatus and method for reducing LDRQ input pin count of a low pin count (LPC) host are provided. The LPC host is series of connecting with a plurality of peripheral devices, the peripheral device having a LDRQ control device within. The LDRQ control device comprises a LDRQ to DRQ decoder, a DRQ arbiter, and a DRQ to LDRQ encoder. In the LDRQ control device, a LDRQ signal is decoded into a DRQ signal via the LDRQ to DRQ decoder and then the DRQ signal is priority arbitrated via the DRQ arbiter. Next, the arbitrated DRQ signal is transferred into a LDRQ signal via DRQ to LDRQ encoder. Following, the LDRQ signal is outputted into the next stage peripheral device or to output into a LDRQ input pin of the LPC host, so as the LPC host only need one LDRQ input pin for purposing to effectively reduce the LDRQ input pin count and lower the manufacturing cost of the LPC host.
摘要翻译：提供了一种用于降低低引脚数（LPC）主机的LDRQ输入引脚数的装置和方法。 LPC主机是与多个外围设备连接的系列，该外围设备具有内部的LDRQ控制设备。 LDRQ控制设备包括LDRQ至DRQ解码器，DRQ仲裁器和DRQ至LDRQ编码器。在LDRQ控制装置中，LDRQ信号通过LDRQ到DRQ解码器解码成DRQ信号，然后通过DRQ仲裁器对DRQ信号进行优先级仲裁。接下来，仲裁的DRQ信号通过DRQ到LDRQ编码器被传送到LDRQ信号。以下，将LDRQ信号输出到下一级外围设备或输出到LPC主机的LDRQ输入引脚，因此LPC主机只需要一个LDRQ输入引脚，用于有效降低LDRQ输入引脚数，降低 LPC主机的制造成本。

8. 发明授权

US08946775B2 Nitride semiconductor structure 有权
标题翻译：氮化物半导体结构
公开(公告)号：US08946775B2
公开(公告)日：2015-02-03
申请号：US13591232
申请日：2012-08-22
申请人： Chen-Zi Liao , Chih-Wei Hu , Yen-Hsiang Fang , Rong Xuan
发明人： Chen-Zi Liao , Chih-Wei Hu , Yen-Hsiang Fang , Rong Xuan
IPC分类号： H01L21/02
CPC分类号： H01L33/32 , H01L21/02381 , H01L21/02433 , H01L21/02458 , H01L21/02502 , H01L21/02507 , H01L21/0251 , H01L21/0254 , H01L29/155 , H01L33/02 , H01L33/16
摘要： A nitride semiconductor structure is provided. The nitride semiconductor structure at least includes a silicon substrate, a AlN layer, a AlGaN layer and a GaN layer formed on the AlGaN layer. The silicon substrate has a surface tilted at 0
摘要翻译：提供氮化物半导体结构。氮化物半导体结构至少包括在AlGaN层上形成的硅衬底，AlN层，AlGaN层和GaN层。硅衬底具有相对于垂直于（111）晶面的轴在0 <倾斜并且倾斜0.5°的表面，并且在表面上形成AlN层。 AlN层形成在AlN层上。此外，AlGaN层中的Al含量在从硅衬底侧朝向GaN层侧的层厚度方向上逐渐减小。

9. 发明申请

US20120161099A1 NITIRDE SEMICONDUCTOR LIGHT EMITTING DIODE 有权
标题翻译： NITIRDE半导体发光二极管
公开(公告)号：US20120161099A1
公开(公告)日：2012-06-28
申请号：US12979274
申请日：2010-12-27
申请人： Ren-Hao Jiang , Chih-Wei Hu
发明人： Ren-Hao Jiang , Chih-Wei Hu
IPC分类号： H01L33/04
CPC分类号： H01L33/06 , H01L33/12 , H01L33/32
摘要： A nitride semiconductor LED device including an N-type doped layer, an active layer and a P-type doped layer is provided. The active layer is disposed on the N-type doped layer and includes at least one quantum well structure. The quantum well structure includes two quantum barrier layers and a quantum well sandwiched between the quantum barrier layers. The quantum barrier layer is a super-lattice structure including a quaternary nitride semiconductor. The P-type doped layer is disposed on the active layer.
摘要翻译：提供了包括N型掺杂层，有源层和P型掺杂层的氮化物半导体LED器件。有源层设置在N型掺杂层上并且包括至少一个量子阱结构。量子阱结构包括两个量子势垒层和夹在量子势垒层之间的量子阱。量子势垒层是包括四元氮化物半导体的超晶格结构。 P型掺杂层设置在有源层上。

10. 发明申请

US20100294335A1 PHOTOVOLTAIC ELECTROCHROMIC DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：光伏电致发光器件及其制造方法
公开(公告)号：US20100294335A1
公开(公告)日：2010-11-25
申请号：US12781818
申请日：2010-05-18
申请人： Lee-May Huang , Fang-Yao Yeh , Kuo-Chuan Ho , Chih-Wei Hu , Chih-Yu Hsu , Chun-Ming Yeh
发明人： Lee-May Huang , Fang-Yao Yeh , Kuo-Chuan Ho , Chih-Wei Hu , Chih-Yu Hsu , Chun-Ming Yeh
IPC分类号： H01L31/0216 , H01L31/18 , H01L31/04 , H01L31/042
CPC分类号： H01L31/0392 , G02F1/157 , G02F1/163 , G02F2001/13324 , H01L31/03762 , H01L31/03923 , H01L31/03925 , H01L31/03928 , H01L31/0687 , H01L31/0725 , H01L31/1804 , H01L31/1828 , H01L31/184 , H01L31/202 , Y02E10/52 , Y02E10/541 , Y02E10/543 , Y02E10/544 , Y02E10/547 , Y02E10/548
摘要： A photovoltaic electrochromic device and a method of manufacturing the same are provided. According to the method, at least one thin-film solar cell is formed on a transparent substrate, wherein the thin-film solar cell at least includes an anode, a photoelectric conversion layer, and a cathode, and a portion of a surface of the anode is exposed from the thin film solar cell. An electrochromic thin film is then deposited on at least one surface of the cathode and the exposed surface of the anode. Thereafter, an electrolyte layer is formed on a surface of the thin-film solar cell to cover the electrochromic thin film. The anode and the cathode of the thin-film solar cell also serve as the anode and the cathode of the photovoltaic electrochromic device.
摘要翻译：提供了一种光电式电致变色装置及其制造方法。根据该方法，在透明基板上形成至少一个薄膜太阳能电池，其中，所述薄膜太阳能电池至少包括阳极，光电转换层和阴极，以及所述薄膜太阳能电池的表面的一部分阳极从薄膜太阳能电池露出。然后将电致变色薄膜沉积在阴极的至少一个表面和阳极的暴露表面上。此后，在薄膜太阳能电池的表面上形成电解质层以覆盖电致变色薄膜。薄膜太阳能电池的阳极和阴极还用作光伏电致变色器件的阳极和阴极。

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