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1. 发明授权

US08305319B2 Liquid crystal display device having look up table for adjusting common voltages and driving method thereof 有权
标题翻译：具有用于调节共同电压的查找表的液晶显示装置及其驱动方法
公开(公告)号：US08305319B2
公开(公告)日：2012-11-06
申请号：US12383873
申请日：2009-03-30
申请人： Chih-Sheng Chang , Chao-Yi Hung , Sz-Hsiao Chen , Sheng-Tien Cho , Chueh-Ju Chen , Tsau-Hua Hsieh , Chiu-Lien Yang
发明人： Chih-Sheng Chang , Chao-Yi Hung , Sz-Hsiao Chen , Sheng-Tien Cho , Chueh-Ju Chen , Tsau-Hua Hsieh , Chiu-Lien Yang
IPC分类号： G09G3/36
CPC分类号： G09G3/3655 , G09G2320/0247 , G09G2320/048
摘要： A liquid crystal display (LCD) device includes an LCD panel, and a common voltage generating circuit configured for providing common voltages to the LCD panel. The common voltage generating circuit includes a microprocessor, a timer, a voltage adjustment circuit, and a look up table. The microprocessor is electrically connected to the timer, the look up table, and the voltage adjustment circuit. The timer is configured for recording a continuous operated time of the LCD panel. The look up table is configured for storing optimal common voltages corresponding to each continuous operated time. The microprocessor is configured for reading the optimal common voltage at set intervals corresponding to the continuous operated time, and controlling the voltage adjustment circuit to provide the corresponding optimal common voltage to the LCD panel.
摘要翻译：液晶显示器（LCD）装置包括LCD面板和配置用于向LCD面板提供公共电压的公共电压产生电路。公共电压产生电路包括微处理器，定时器，电压调节电路和查找表。微处理器电连接到定时器，查找表和电压调节电路。定时器配置为记录LCD面板的连续操作时间。查找表被配置用于存储对应于每个连续操作时间的最佳公共电压。微处理器被配置为以对应于连续操作时间的设定间隔读取最佳公共电压，并且控制电压调节电路以向LCD面板提供相应的最佳公共电压。

2. 发明申请

US20090243987A1 Liquid crystal display device having look up table for adjusting common voltages and driving method thereof 有权
标题翻译：具有用于调节共电压的查找表的液晶显示装置及其驱动方法
公开(公告)号：US20090243987A1
公开(公告)日：2009-10-01
申请号：US12383873
申请日：2009-03-30
申请人： Chih-Sheng Chang , Chao-Yi Hung , Sz-Hsiao Chen , Sheng-Tien Cho , Chueh-Ju Chen , Tsau-Hua Hsieh , Chiu-Lien Yang
发明人： Chih-Sheng Chang , Chao-Yi Hung , Sz-Hsiao Chen , Sheng-Tien Cho , Chueh-Ju Chen , Tsau-Hua Hsieh , Chiu-Lien Yang
IPC分类号： G09G3/36
CPC分类号： G09G3/3655 , G09G2320/0247 , G09G2320/048
摘要： A liquid crystal display (LCD) device includes an LCD panel, and a common voltage generating circuit configured for providing common voltages to the LCD panel. The common voltage generating circuit includes a microprocessor, a timer, a voltage adjustment circuit, and a look up table. The microprocessor is electrically connected to the timer, the look up table, and the voltage adjustment circuit. The timer is configured for recording a continuous operated time of the LCD panel. The look up table is configured for storing optimal common voltages corresponding to each continuous operated time. The microprocessor is configured for reading the optimal common voltage at set intervals corresponding to the continuous operated time, and controlling the voltage adjustment circuit to provide the corresponding optimal common voltage to the LCD panel.
摘要翻译：液晶显示器（LCD）装置包括LCD面板和配置用于向LCD面板提供公共电压的公共电压产生电路。公共电压产生电路包括微处理器，定时器，电压调节电路和查找表。微处理器电连接到定时器，查找表和电压调节电路。定时器配置为记录LCD面板的连续操作时间。查找表被配置用于存储对应于每个连续操作时间的最佳公共电压。微处理器被配置为以对应于连续操作时间的设定间隔读取最佳公共电压，并且控制电压调节电路以向LCD面板提供相应的最佳公共电压。

3. 发明授权

US07532210B2 Driving method for active matrix liquid crystal display panel 有权
标题翻译：有源矩阵液晶显示面板的驱动方法
公开(公告)号：US07532210B2
公开(公告)日：2009-05-12
申请号：US11311847
申请日：2005-12-19
申请人： Lomg Kuan Chen , Eddy G. Chen , Chih-Sheng Chang , Sz Hsiao Chen , Tsau Hua Hsieh , Jia-Pang Pang
发明人： Lomg Kuan Chen , Eddy G. Chen , Chih-Sheng Chang , Sz Hsiao Chen , Tsau Hua Hsieh , Jia-Pang Pang
IPC分类号： G06F3/038 , G09G3/36
CPC分类号： G09G3/3648 , G09G2310/0251 , G09G2310/061 , G09G2320/0252 , G09G2320/0261
摘要： A driving method for an active matrix liquid crystal display panel includes the following steps. First, a frame period is divided into a display period (t1) and a black insertion period (tr). A gray-scale voltage is generated according to a desired corresponding light transmittance of each pixel of the liquid crystal display panel; and during the display period, the gray-scale voltage is supplied to a corresponding pixel electrode of the liquid crystal display panel. Then during the black insertion period, a restoring voltage Vh is supplied to the pixel electrode, so that the pixel is returned to an initial black state. Accordingly, the quality of motion pictures of the liquid crystal display panel is good.
摘要翻译：有源矩阵液晶显示面板的驱动方法包括以下步骤。首先，帧周期被分为显示周期（t1）和黑插入周期（tr）。根据液晶显示面板的每个像素的期望的对应的透光率产生灰度电压; 并且在显示期间，将灰度电压提供给液晶显示面板的对应像素电极。然后在黑插入期间，将恢复电压Vh提供给像素电极，使得像素返回到初始黑色状态。因此，液晶显示面板的运动画面的质量良好。

4. 发明授权

US07990354B2 Liquid crystal display having gradation voltage adjusting circuit and driving method thereof 有权
标题翻译：具有灰度电压调节电路的液晶显示器及其驱动方法
公开(公告)号：US07990354B2
公开(公告)日：2011-08-02
申请号：US12069922
申请日：2008-02-12
申请人： Chih-Sheng Chang , Chueh-Ju Chen
发明人： Chih-Sheng Chang , Chueh-Ju Chen
IPC分类号： G09G3/38
CPC分类号： G09G3/3688 , G09G2320/0252 , G09G2320/0261 , G09G2340/16 , G09G2360/18
摘要： An exemplary LCD (200) includes gate lines (23), data lines (24); a gradation voltage adjusting circuit (26) for receiving the gradation voltages respectively corresponding to the j, j+1, k, and k+1 frames interchanging the j+1 frame gradation voltage and the k frame gradation voltage when a first voltage difference between j frame gradation voltage and j+1 frame gradation voltage is less than a second voltage difference between j frame gradation voltage and k frame gradation voltage; a memory circuit (28) for storing the gradation voltages corresponding to the frames 1, 2, . . . j, j+2, . . . k−1, k+1 . . . h and storing the interchanged gradation voltages corresponding to the frames j+1 and k; and a gate driver (21) for receiving the gradation voltages stored in the memory circuit. A smallest rectangular area formed by any two adjacent gate lines together with any two adjacent data lines defines a pixel unit thereat.
摘要翻译：示例性LCD（200）包括栅极线（23），数据线（24）; 灰度电压调整电路（26），用于在第j + 1帧灰度级电压和k帧灰度级电压之间分别对应于j + 1，k和+ j帧灰度电压和j + 1帧灰度电压小于j帧灰度电压和k帧灰度电压之间的第二电压差; 存储电路（28），用于存储与帧1,2对应的灰度电压。。。 j，j + 2，。。。 k-1，k + 1。。。 h并存储对应于帧j + 1和k的互换灰度电压; 以及用于接收存储在存储电路中的灰度电压的栅极驱动器（21）。由任何两个相邻的栅极线与任何两个相邻的数据线一起形成的最小矩形区域在其上限定像素单元。

5. 发明申请

US20070085817A1 Method for driving active matrix liquid crystal display 审中-公开
标题翻译：驱动有源矩阵液晶显示器的方法
公开(公告)号：US20070085817A1
公开(公告)日：2007-04-19
申请号：US11580508
申请日：2006-10-13
申请人： Eddy(Ging-Li) Chen , Long-Kuan Chen , Sz Chen , Chih-Sheng Chang , Wen-Chieh Liao , Chueh-Ju Chen , Tsau Hsieh
发明人： Eddy(Ging-Li) Chen , Long-Kuan Chen , Sz Chen , Chih-Sheng Chang , Wen-Chieh Liao , Chueh-Ju Chen , Tsau Hsieh
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/2025 , G09G3/3406 , G09G2320/0646
摘要： A method for driving a liquid crystal display (200) includes: providing a liquid crystal display having a plurality of pixel units and a backlight; dividing a frame time into a plurality of sub-frames; defining each pixel unit to have two states, namely on or off, in each of the sub-frames; defining the backlight to have a gradation luminance and two states, namely on or off, in each of the sub-frames; and synchronously controlling the state of each pixel unit, a time period of the on state of each pixel unit, the gradation luminance of the backlight, and a time period of the on state of the backlight in each of the sub-frames to make a resulting total luminous flux in each pixel unit corresponding to a gray scale of an image to be displayed in the frame time to be the same as that of other pixel units.
摘要翻译：一种用于驱动液晶显示器（200）的方法包括：提供具有多个像素单元和背光的液晶显示器; 将帧时间划分成多个子帧; 将每个像素单元定义为在每个子帧中具有两个状态，即开或关; 将背光源定义为具有每个子帧中的灰度亮度和两个状态，即开/关; 同时控制每个像素单元的状态，每个像素单元的接通状态的时间段，背光的灰度亮度和每个子帧中的背光的接通状态的时间段，以使使得在帧时间中要显示的图像的灰度对应的每个像素单元中的总光通量与其它像素单元的相同。

6. 发明申请

US20080191983A1 Liquid crystal display having gradation voltage adjusting circuit and driving method thereof 有权
标题翻译：具有灰度电压调节电路的液晶显示器及其驱动方法
公开(公告)号：US20080191983A1
公开(公告)日：2008-08-14
申请号：US12069922
申请日：2008-02-12
申请人： Chih-Sheng Chang , Chueh-Ju Chen
发明人： Chih-Sheng Chang , Chueh-Ju Chen
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G2320/0252 , G09G2320/0261 , G09G2340/16 , G09G2360/18
摘要： An exemplary LCD (200) includes gate lines (23), data lines (24); a gradation voltage adjusting circuit (26) for receiving the gradation voltages respectively corresponding to the j, j+1, k, and k+1 frames interchanging the j+1 frame gradation voltage and the k frame gradation voltage when a first voltage difference between j frame gradation voltage and j+1 frame gradation voltage is less than a second voltage difference between j frame gradation voltage and k frame gradation voltage; a memory circuit (28) for storing the gradation voltages corresponding to the frames 1, 2, . . . j, j+2, . . . k−1, k+1 . . . h and storing the interchanged gradation voltages corresponding to the frames j+1 and k; and a gate driver (21) for receiving the gradation voltages stored in the memory circuit. A smallest rectangular area formed by any two adjacent gate lines together with any two adjacent data lines defines a pixel unit thereat.
摘要翻译：示例性LCD（200）包括栅极线（23），数据线（24）; 灰度电压调整电路（26），用于在第j + 1帧灰度级电压和k帧灰度级电压之间分别对应于j + 1，k和+ j帧灰度电压和j + 1帧灰度电压小于j帧灰度电压和k帧灰度电压之间的第二电压差; 存储电路（28），用于存储与帧1,2对应的灰度电压。。。 j，j + 2，。。。 k-1，k + 1。。。 h并存储对应于帧j + 1和k的互换灰度电压; 以及用于接收存储在存储电路中的灰度电压的栅极驱动器（21）。由任何两个相邻的栅极线与任何两个相邻的数据线一起形成的最小矩形区域在其上限定像素单元。

7. 发明申请

US20100020271A1 Liquid crystal display panel 审中-公开
标题翻译：液晶显示面板
公开(公告)号：US20100020271A1
公开(公告)日：2010-01-28
申请号：US12459256
申请日：2009-06-29
申请人： Huang-Shen Lin , Kuan-Hsiung Wang , Chih-Sheng Chang , Chuen-Ju Chen , Chiu-Lien Yang
发明人： Huang-Shen Lin , Kuan-Hsiung Wang , Chih-Sheng Chang , Chuen-Ju Chen , Chiu-Lien Yang
IPC分类号： G02F1/1347 , G02F1/1333
CPC分类号： G02F1/1337 , G02F1/13363
摘要： A liquid crystal display (LCD) panel includes a first substrate, a second substrate opposite to the first substrate, and a liquid crystal layer sandwiched between the first and second substrates. The first substrate includes a first wide view film and the second substrate includes a second wide view film. Angles of the first wide film, second wide film, and twist angles of liquid crystal molecules of the liquid crystal layer are defined.
摘要翻译：液晶显示器（LCD）面板包括第一基板，与第一基板相对的第二基板和夹在第一和第二基板之间的液晶层。第一基板包括第一宽视角膜，第二基板包括第二宽视角膜。定义液晶层的液晶分子的第一宽膜，第二宽膜和扭转角的角度。

8. 发明授权

US09245805B2 Germanium FinFETs with metal gates and stressors 有权
标题翻译：具有金属门和压力源的锗FinFET
公开(公告)号：US09245805B2
公开(公告)日：2016-01-26
申请号：US12831903
申请日：2010-07-07
申请人： Chih Chieh Yeh , Chih-Sheng Chang , Clement Hsingjen Wann
发明人： Chih Chieh Yeh , Chih-Sheng Chang , Clement Hsingjen Wann
IPC分类号： H01L21/70 , H01L27/088 , H01L29/78 , H01L29/20 , H01L21/02 , H01L29/06 , H01L21/8238 , H01L29/66
CPC分类号： H01L21/8256 , H01L21/02532 , H01L21/02535 , H01L21/76224 , H01L21/823807 , H01L21/823814 , H01L21/823821 , H01L21/823878 , H01L29/0847 , H01L29/6681 , H01L29/7848
摘要： An integrated circuit structure includes an n-type fin field effect transistor (FinFET) and a p-type FinFET. The n-type FinFET includes a first germanium fin over a substrate; a first gate dielectric on a top surface and sidewalls of the first germanium fin; and a first gate electrode on the first gate dielectric. The p-type FinFET includes a second germanium fin over the substrate; a second gate dielectric on a top surface and sidewalls of the second germanium fin; and a second gate electrode on the second gate dielectric. The first gate electrode and the second gate electrode are formed of a same material having a work function close to an intrinsic energy level of germanium.
摘要翻译：集成电路结构包括n型鳍式场效应晶体管（FinFET）和p型FinFET。 n型FinFET包括在衬底上的第一锗鳍; 顶表面上的第一栅电介质和第一锗鳍的侧壁; 以及在第一栅极电介质上的第一栅电极。 p型FinFET在衬底上包括第二个锗鳍; 在顶表面上的第二栅电介质和第二锗鳍的侧壁; 和在第二栅极电介质上的第二栅电极。第一栅电极和第二栅极由具有接近锗的固有能级的功函数的相同材料形成。

9. 发明授权

US09035426B2 Fin-like BJT 有权
标题翻译：翅状BJT
公开(公告)号：US09035426B2
公开(公告)日：2015-05-19
申请号：US13339160
申请日：2011-12-28
申请人： Chih-Sheng Chang , Yi-Tang Lin , Ming-Feng Shieh
发明人： Chih-Sheng Chang , Yi-Tang Lin , Ming-Feng Shieh
IPC分类号： H01L29/70 , H01L29/06 , H01L29/08 , H01L29/417 , H01L29/735
CPC分类号： H01L29/6625 , H01L21/02532 , H01L21/311 , H01L29/0649 , H01L29/0692 , H01L29/0804 , H01L29/0808 , H01L29/0821 , H01L29/1004 , H01L29/41708 , H01L29/735
摘要： A bipolar junction transistor (BJT) formed using a fin field-effect transistor (FinFET) complimentary metal-oxide-semiconductor (CMOS) process flow is provided. The BJT includes an emitter fin, a base fin, and a collector fin formed on a substrate. The base fin encloses the emitter fin and collector fin encloses the emitter fin. In some embodiments, the emitter fin, base fin, and collector fin have a square shape when viewed from above and are concentric with each other.
摘要翻译：提供了使用鳍状场效应晶体管（FinFET）互补金属氧化物半导体（CMOS）工艺流程形成的双极结型晶体管（BJT）。 BJT包括在基板上形成的发射极翅片，基极翅片和集电极翅片。发射极散热片和收集器散热片包围发射极翅片。在一些实施例中，当从上方观察并且彼此同心时，发射器翅片，底部翅片和收集器翅片具有正方形形状。

10. 发明授权

US08896055B2 Accumulation type FinFET, circuits and fabrication method thereof 有权
标题翻译：积分型FinFET，电路及其制造方法
公开(公告)号：US08896055B2
公开(公告)日：2014-11-25
申请号：US13585436
申请日：2012-08-14
申请人： Chih Chieh Yeh , Chih-Sheng Chang , Clement Hsingjen Wann
发明人： Chih Chieh Yeh , Chih-Sheng Chang , Clement Hsingjen Wann
IPC分类号： H01L21/336 , H01L27/088 , H01L29/78 , H01L29/66 , H01L21/8234
CPC分类号： H01L29/7851 , H01L21/823431 , H01L29/165 , H01L29/267 , H01L29/66795 , H01L29/7848 , H01L2029/7857
摘要： This description relates to a fin field-effect-transistor (FinFET) including a substrate and a fin structure on the substrate. The fin structure includes a channel between a source and a drain, wherein the source, the drain, and the channel have a first type dopant, and the channel comprises at least one of a Ge, SiGe, or III-V semiconductor. The FinFET further includes a gate dielectric layer over the channel and a gate over the gate dielectric layer. The FinFET further includes a nitride spacer on the substrate adjacent the gate and an oxide layer between the nitride spacer and the gate and between the nitride spacer and the substrate.
摘要翻译：本说明书涉及在基板上包括基板和翅片结构的鳍状场效应晶体管（FinFET）。鳍结构包括源极和漏极之间的沟道，其中源极，漏极和沟道具有第一类型掺杂物，并且沟道包括Ge，SiGe或III-V半导体中的至少一个。 FinFET还包括通道上的栅极介电层和栅极电介质层上的栅极。 FinFET还包括邻近栅极的衬底上的氮化物间隔物和氮化物间隔物和栅极之间以及氮化物间隔物和衬底之间的氧化物层。

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