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    • 1. 发明申请
    • VOLTAGE REGULATING APPARATUS WITH SWITCHING AND LINEAR OPERATIONAL MODES
    • 具有开关和线性运行模式的电压调节装置
    • US20120223686A1
    • 2012-09-06
    • US13293681
    • 2011-11-10
    • Chih-Pao LinJui-Tse LinTsung-Yen Tsai
    • Chih-Pao LinJui-Tse LinTsung-Yen Tsai
    • G05F1/46
    • G05F1/563H02M3/1588H02M2001/0045Y02B70/1466
    • The invention discloses a voltage regulating apparatus which includes: an output stage providing the apparatus with an output voltage and producing a partial voltage of the output voltage; an error amplifier coupled to the output stage and comparing the partial voltage with a reference to produce a first voltage; a PWM unit coupled to the error amplifier and comparing the first voltage with a voltage signal to produce second and third voltages; a selection unit coupled to the error amplifier and the PWM unit and outputting a fourth voltage equalling either the first or the second voltage; a first transistor coupled to the selection unit and receiving the fourth voltage and a DC voltage; and a second transistor coupled to the PWM unit, the first transistor, and a ground and receiving the third voltage; wherein a connection point of the first and second transistors is connected to the output stage.
    • 本发明公开了一种电压调节装置,包括:输出级,为该装置提供输出电压并产生输出电压的部分电压; 误差放大器,耦合到所述输出级,并将所述部分电压与参考值进行比较以产生第一电压; PWM单元,耦合到所述误差放大器,并将所述第一电压与电压信号进行比较以产生第二和第三电压; 选择单元,耦合到所述误差放大器和所述PWM单元,并输出等于所述第一或第二电压的第四电压; 耦合到选择单元并接收第四电压和DC电压的第一晶体管; 以及耦合到所述PWM单元,所述第一晶体管和接地并接收所述第三电压的第二晶体管; 其中所述第一和第二晶体管的连接点连接到所述输出级。
    • 2. 发明授权
    • Voltage regulating apparatus with switching and linear operational modes
    • 具有开关和线性工作模式的电压调节装置
    • US08717000B2
    • 2014-05-06
    • US13293681
    • 2011-11-10
    • Chih-Pao LinJui-Tse LinTsung-Yen Tsai
    • Chih-Pao LinJui-Tse LinTsung-Yen Tsai
    • G05F1/00
    • G05F1/563H02M3/1588H02M2001/0045Y02B70/1466
    • The invention discloses a voltage regulating apparatus which includes: an output stage providing the apparatus with an output voltage and producing a partial voltage of the output voltage; an error amplifier coupled to the output stage and comparing the partial voltage with a reference to produce a first voltage; a PWM unit coupled to the error amplifier and comparing the first voltage with a voltage signal to produce second and third voltages; a selection unit coupled to the error amplifier and the PWM unit and outputting a fourth voltage equalling either the first or the second voltage; a first transistor coupled to the selection unit and receiving the fourth voltage and a DC voltage; and a second transistor coupled to the PWM unit, the first transistor, and a ground and receiving the third voltage; wherein a connection point of the first and second transistors is connected to the output stage.
    • 本发明公开了一种电压调节装置,包括:输出级,为该装置提供输出电压并产生输出电压的部分电压; 误差放大器,耦合到所述输出级,并将所述部分电压与参考值进行比较以产生第一电压; PWM单元,耦合到所述误差放大器,并将所述第一电压与电压信号进行比较以产生第二和第三电压; 选择单元,耦合到所述误差放大器和所述PWM单元,并输出等于所述第一或第二电压的第四电压; 耦合到选择单元并接收第四电压和DC电压的第一晶体管; 以及耦合到所述PWM单元,所述第一晶体管和接地并接收所述第三电压的第二晶体管; 其中所述第一和第二晶体管的连接点连接到所述输出级。
    • 3. 发明授权
    • Traffic control circuits and method for multicast packet transmission
    • 流量控制电路和组播数据包传输方法
    • US06226685B1
    • 2001-05-01
    • US09203581
    • 1998-12-02
    • Po-Yuan ChenWei-Sung WangJui-Tse LinRuay-Yuan Lin
    • Po-Yuan ChenWei-Sung WangJui-Tse LinRuay-Yuan Lin
    • G06F15173
    • H04L49/203H04Q11/0478
    • A control circuit and method for managing multicast packets is implemented in a network switch to improve the efficiency of bandwidth utilization. The control circuit comprises an internal control buffer which is subdivided into multiple storage sections. Each storage section consists of buffer-control records including valid bit, counter value, control pointer, and tag number. When the tag number of a coming multicast packet indicates that the internal control buffer is full, the control data of the coming multicast packet will be copied to an external control memory. On the other hand, the control data of the coming multicast packet will be directly stored in the control buffer if otherwise. After each multicast packet transmission, the control data in the control buffer can be accessed and updated. Consequently, the traffic between the network switch and the external memories can be reduced to the minimum, thereby to improve the efficiency of the bandwidth utilization.
    • 在网络交换机中实现用于管理组播分组的控制电路和方法,以提高带宽利用率。 控制电路包括内部控制缓冲器,其被细分为多个存储部分。 每个存储部分包括缓冲器控制记录,包括有效位,计数器值,控制指针和标签号。 当来自组播数据包的标签号指示内部控制缓冲器已满时,即将组播数据包的控制数据将被复制到外部控制存储器。 另一方面,即将到来的组播数据包的控制数据将直接存储在控制缓冲器中。 在每个组播数据包传输之后,可以访问和更新控制缓冲区中的控制数据。 因此,可以将网络交换机与外部存储器之间的流量降低到最小,从而提高带宽利用率。