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1. 发明授权

US07196019B2 Method of removing spacers and fabricating MOS transistor 有权
标题翻译：去除间隔物并制造MOS晶体管的方法
公开(公告)号：US07196019B2
公开(公告)日：2007-03-27
申请号：US10905185
申请日：2004-12-21
申请人： Chih-Ning Wu , Charlie C J Lee , Kuan-Yang Liao
发明人： Chih-Ning Wu , Charlie C J Lee , Kuan-Yang Liao
IPC分类号： H01L21/302
CPC分类号： H01L29/7843 , H01L21/31111 , H01L29/6653 , H01L29/6659 , H01L29/7833
摘要： A method of removing spacers after forming a MOS transistor on a wafer. The MOS transistor comprises a gate disposed on the substrate, spacers disposed on the sidewalls of the gate and a source and a drain region in the substrate beside the spacers. The spacers are removed by performing a wet etching process in the dark such that during the spacer removal process, the source and the drain region in a MOS transistor can be prevented from damages.
摘要翻译：在晶片上形成MOS晶体管之后去除间隔物的方法。 MOS晶体管包括设置在衬底上的栅极，设置在栅极的侧壁上的间隔物以及衬垫旁边的源极和漏极区域。通过在黑暗中执行湿式蚀刻工艺来去除间隔物，使得在间隔物去除工艺期间，可以防止MOS晶体管中的源极和漏极区域损坏。

2. 发明授权

US07220647B2 Method of cleaning wafer and method of manufacturing gate structure 有权
标题翻译：清洗晶圆的方法及制造栅极结构的方法
公开(公告)号：US07220647B2
公开(公告)日：2007-05-22
申请号：US11050261
申请日：2005-02-02
申请人： Chih-Ning Wu , Charlie C J Lee , Kuan-Yang Liao
发明人： Chih-Ning Wu , Charlie C J Lee , Kuan-Yang Liao
IPC分类号： H01L21/336 , H01L21/302 , H01L21/461
CPC分类号： H01L21/02071 , H01L21/0206 , H01L21/28088 , H01L21/28194 , H01L29/4966 , H01L29/517 , H01L29/518
摘要： A method of cleaning a wafer, adapted for a patterned gate structure. The gate structures comprise a gate dielectric layer, a nitrogen-containing barrier layer and a silicon-containing gate layer sequentially stacked over the substrate. The method includes cleaning the substrate with phosphoric acid solution and hydrofluoric acid solution so that silicon nitride residues formed in a reaction between the nitrogen-containing barrier layer and the silicon-containing gate layer can be removed and the amount of pollutants and particles can be reduced. Ultimately, the yield of the process as well as the quality and reliability of the device are improved.
摘要翻译：一种适用于图案化栅极结构的清洁晶片的方法。栅极结构包括依次层叠在衬底上的栅极介电层，含氮势垒层和含硅栅极层。该方法包括用磷酸溶液和氢氟酸溶液清洗基板，使得可以除去在含氮阻挡层和含硅栅层之间的反应中形成的氮化硅残留物，并且可以减少污染物和颗粒的量。最终，改善了工艺的产量以及设备的质量和可靠性。

3. 发明授权

US07135400B2 Damascene process capable of avoiding via resist poisoning 有权
标题翻译：大马士革过程能够避免通过抗蚀剂中毒
公开(公告)号：US07135400B2
公开(公告)日：2006-11-14
申请号：US10709278
申请日：2004-04-26
申请人： Wen-Liang Lien , Charlie C J Lee , Chih-Ning Wu , Jain-Hon Chen
发明人： Wen-Liang Lien , Charlie C J Lee , Chih-Ning Wu , Jain-Hon Chen
IPC分类号： H01L21/4763
CPC分类号： H01L21/76811 , H01L21/76813
摘要： A method for avoiding resist poisoning during a damascene process is disclosed. A semiconductor substrate is provided with a low-k dielectric layer (k≦2.9) thereon, a SiC layer over the low-k dielectric layer, and a blocking layer over the SiC layer. The blocking layer is used to prevent unpolymerized precursors diffused out from the low-k dielectric layer from contacting an overlying resist. A bottom anti-reflection coating (BARC) layer is formed on the blocking layer. A resist layer is formed on the BARC layer, the resist layer having an opening to expose a portion of the BARC layer. A damascene structure is formed in the low-k dielectric layer by etching the BARC layer, the blocking layer, the SiC layer, and the low-k dielectric layer through the opening.
摘要翻译：公开了一种在大马士革过程中避免抗蚀剂中毒的方法。在半导体衬底上设置有低k电介质层（k <= 2.9），在低k电介质层上的SiC层和在SiC层上的阻挡层。阻挡层用于防止从低k电介质层扩散的未聚合的前体与上覆抗蚀剂接触。在阻挡层上形成底部防反射涂层（BARC）层。在BARC层上形成抗蚀剂层，抗蚀剂层具有露出BARC层的一部分的开口。通过开口蚀刻BARC层，阻挡层，SiC层和低k电介质层，在低k电介质层中形成镶嵌结构。

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