专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08698247B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08698247B2
公开(公告)日：2014-04-15
申请号：US13156352
申请日：2011-06-09
申请人： Chih-Chung Wang , Wei-Lun Hsu , Te-Yuan Wu , Wen-Fang Lee , Ke-Feng Lin , Shan-Shi Huang , Ming-Tsung Lee
发明人： Chih-Chung Wang , Wei-Lun Hsu , Te-Yuan Wu , Wen-Fang Lee , Ke-Feng Lin , Shan-Shi Huang , Ming-Tsung Lee
IPC分类号： H01L23/62
CPC分类号： H01L27/0277 , H01L21/761 , H01L21/823481 , H01L21/823493 , H01L27/0623 , H01L27/0922
摘要： The present invention provides a semiconductor device including a substrate, a deep well, a high-voltage well, and a doped region. The substrate and the high-voltage well have a first conductive type, and the deep well and the doped region have a second conductive type different from the first conductive type. The substrate has a high-voltage region and a low-voltage region, and the deep well is disposed in the substrate in the high-voltage region. The high-voltage well is disposed in the substrate between the high-voltage region and the low-voltage region, and the doped region is disposed in the high-voltage well. The doped region and the high-voltage well are electrically connected to a ground.
摘要翻译：本发明提供一种包括衬底，深阱，高压阱和掺杂区的半导体器件。衬底和高压阱具有第一导电类型，并且深阱和掺杂区具有不同于第一导电类型的第二导电类型。衬底具有高电压区域和低电压区域，并且深阱设置在高压区域中的衬底中。高电压阱设置在高电压区域和低电压区域之间的衬底中，掺杂区域设置在高压阱中。掺杂区和高电压阱电连接到地。

2. 发明授权

US08436418B2 High-voltage semiconductor device with electrostatic discharge protection 有权
标题翻译：具有静电放电保护功能的高压半导体器件
公开(公告)号：US08436418B2
公开(公告)日：2013-05-07
申请号：US13163734
申请日：2011-06-20
申请人： Chih-Chung Wang , Wei-Lun Hsu , Te-Yuan Wu , Ke-Feng Lin , Shan-Shi Huang , Ming-Tsung Lee , Wen-Fang Lee
发明人： Chih-Chung Wang , Wei-Lun Hsu , Te-Yuan Wu , Ke-Feng Lin , Shan-Shi Huang , Ming-Tsung Lee , Wen-Fang Lee
IPC分类号： H01L29/94
CPC分类号： H01L27/0251 , H01L27/0266 , H01L29/0634 , H01L29/1087 , H01L29/404 , H01L29/42368 , H01L29/7817 , H01L29/7835 , H01L29/7838 , H01L29/861
摘要： The present invention provides a high-voltage semiconductor device including a deep well, a first doped region disposed in the deep well, a high-voltage well, a second doped region disposed in the high-voltage well, a first gate structure disposed on the high-voltage well between the second doped region and the first doped region, a doped channel region disposed in the high-voltage region and in contact with the second doped region and the deep well, and a third doped region disposed in the high-voltage well. The high-voltage well has a first conductive type, and the deep well, the first doped region, the second doped region, the doped channel region, and the third doped region have a second conductive type different from the first conductive type.
摘要翻译：本发明提供了一种高压半导体器件，包括深阱，设置在深阱中的第一掺杂区，高电压阱，设置在高压阱中的第二掺杂区，设置在高阱上的第一栅极结构在所述第二掺杂区域和所述第一掺杂区域之间的高电压阱，设置在所述高压区域中并与所述第二掺杂区域和所述深阱接触的掺杂沟道区域，以及设置在所述高压区域中的第三掺杂区域好。高电压阱具有第一导电类型，并且深阱，第一掺杂区域，第二掺杂区域，掺杂沟道区域和第三掺杂区域具有不同于第一导电类型的第二导电类型。

3. 发明申请

US20120319189A1 HIGH-VOLTAGE SEMICONDUCTOR DEVICE 有权
标题翻译：高压半导体器件
公开(公告)号：US20120319189A1
公开(公告)日：2012-12-20
申请号：US13163734
申请日：2011-06-20
申请人： Chih-Chung Wang , Wei-Lun Hsu , Te-Yuan Wu , Ke-Feng Lin , Shan-Shi Huang , Ming-Tsung Lee , Wen-Fang Lee
发明人： Chih-Chung Wang , Wei-Lun Hsu , Te-Yuan Wu , Ke-Feng Lin , Shan-Shi Huang , Ming-Tsung Lee , Wen-Fang Lee
IPC分类号： H01L29/739
CPC分类号： H01L27/0251 , H01L27/0266 , H01L29/0634 , H01L29/1087 , H01L29/404 , H01L29/42368 , H01L29/7817 , H01L29/7835 , H01L29/7838 , H01L29/861
摘要： The present invention provides a high-voltage semiconductor device including a deep well, a first doped region disposed in the deep well, a high-voltage well, a second doped region disposed in the high-voltage well, a first gate structure disposed on the high-voltage well between the second doped region and the first doped region, a doped channel region disposed in the high-voltage region and in contact with the second doped region and the deep well, and a third doped region disposed in the high-voltage well. The high-voltage well has a first conductive type, and the deep well, the first doped region, the second doped region, the doped channel region, and the third doped region have a second conductive type different from the first conductive type.
摘要翻译：本发明提供了一种高压半导体器件，包括深阱，设置在深阱中的第一掺杂区，高电压阱，设置在高压阱中的第二掺杂区，设置在高阱上的第一栅极结构在所述第二掺杂区域和所述第一掺杂区域之间的高电压阱，设置在所述高压区域中并与所述第二掺杂区域和所述深阱接触的掺杂沟道区域，以及设置在所述高压区域中的第三掺杂区域好。高电压阱具有第一导电类型，并且深阱，第一掺杂区域，第二掺杂区域，掺杂沟道区域和第三掺杂区域具有不同于第一导电类型的第二导电类型。

4. 发明申请

US20120313175A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120313175A1
公开(公告)日：2012-12-13
申请号：US13156352
申请日：2011-06-09
申请人： Chih-Chung Wang , Wei-Lun Hsu , Te-Yuan Wu , Wen-Fang Lee , Ke-Feng Lin , Shan-Shi Huang , Ming-Tsung Lee
发明人： Chih-Chung Wang , Wei-Lun Hsu , Te-Yuan Wu , Wen-Fang Lee , Ke-Feng Lin , Shan-Shi Huang , Ming-Tsung Lee
IPC分类号： H01L27/06
CPC分类号： H01L27/0277 , H01L21/761 , H01L21/823481 , H01L21/823493 , H01L27/0623 , H01L27/0922
摘要： The present invention provides a semiconductor device including a substrate, a deep well, a high-voltage well, and a doped region. The substrate and the high-voltage well have a first conductive type, and the deep well and the doped region have a second conductive type different from the first conductive type. The substrate has a high-voltage region and a low-voltage region, and the deep well is disposed in the substrate in the high-voltage region. The high-voltage well is disposed in the substrate between the high-voltage region and the low-voltage region, and the doped region is disposed in the high-voltage well. The doped region and the high-voltage well are electrically connected to a ground.
摘要翻译：本发明提供一种包括衬底，深阱，高压阱和掺杂区的半导体器件。衬底和高压阱具有第一导电类型，并且深阱和掺杂区具有不同于第一导电类型的第二导电类型。衬底具有高电压区域和低电压区域，并且深阱设置在高压区域中的衬底中。高电压阱设置在高电压区域和低电压区域之间的衬底中，掺杂区域设置在高压阱中。掺杂区和高电压阱电连接到地。

5. 发明授权

US08921937B2 High voltage metal-oxide-semiconductor transistor device and method of fabricating the same 有权
标题翻译：高压金属氧化物半导体晶体管器件及其制造方法
公开(公告)号：US08921937B2
公开(公告)日：2014-12-30
申请号：US13216276
申请日：2011-08-24
申请人： Chih-Chung Wang , Wei-Lun Hsu , Shan-Shi Huang , Ke-Feng Lin , Te-Yuan Wu
发明人： Chih-Chung Wang , Wei-Lun Hsu , Shan-Shi Huang , Ke-Feng Lin , Te-Yuan Wu
IPC分类号： H01L29/78 , H01L21/336 , H01L29/08 , H01L21/266 , H01L29/66 , H01L29/06 , H01L29/40 , H01L29/423
CPC分类号： H01L29/66681 , H01L21/0334 , H01L21/266 , H01L29/0619 , H01L29/0634 , H01L29/0696 , H01L29/0878 , H01L29/402 , H01L29/404 , H01L29/42368 , H01L29/4238 , H01L29/66659 , H01L29/7816
摘要： The present invention provides a high voltage metal-oxide-semiconductor transistor device including a substrate, a deep well, and a doped region. The substrate and the doped region have a first conductive type, and the substrate has at least one electric field concentration region. The deep well has a second conductive type different from the first conductive type. The deep well is disposed in the substrate, and the doped region is disposed in the deep well. The doping concentrations of the doped region and the deep well in the electric field have a first ratio, and the doping concentrations of the doped region and the deep well outside the electric field have a second ratio. The first ratio is greater than the second ratio.
摘要翻译：本发明提供一种包括衬底，深阱和掺杂区的高电压金属氧化物半导体晶体管器件。衬底和掺杂区域具有第一导电类型，并且衬底具有至少一个电场集中区域。深井具有不同于第一导电类型的第二导电类型。深阱设置在衬底中，并且掺杂区域设置在深阱中。掺杂区域和深阱在电场中的掺杂浓度具有第一比例，并且掺杂区域和电场外的深阱的掺杂浓度具有第二比例。第一比例大于第二比率。

6. 发明申请

US20130049114A1 HIGH VOLTAGE METAL-OXIDE-SEMICONDUCTOR TRANSISTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：高电压金属氧化物半导体晶体管器件及其制造方法
公开(公告)号：US20130049114A1
公开(公告)日：2013-02-28
申请号：US13216276
申请日：2011-08-24
申请人： Chih-Chung Wang , Wei-Lun Hsu , Shan-Shi Huang , Ke-Feng Lin , Te-Yuan Wu
发明人： Chih-Chung Wang , Wei-Lun Hsu , Shan-Shi Huang , Ke-Feng Lin , Te-Yuan Wu
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66681 , H01L21/0334 , H01L21/266 , H01L29/0619 , H01L29/0634 , H01L29/0696 , H01L29/0878 , H01L29/402 , H01L29/404 , H01L29/42368 , H01L29/4238 , H01L29/66659 , H01L29/7816
摘要： The present invention provides a high voltage metal-oxide-semiconductor transistor device including a substrate, a deep well, and a doped region. The substrate and the doped region have a first conductive type, and the substrate has at least one electric field concentration region. The deep well has a second conductive type different from the first conductive type. The deep well is disposed in the substrate, and the doped region is disposed in the deep well. The doping concentrations of the doped region and the deep well in the electric field have a first ratio, and the doping concentrations of the doped region and the deep well outside the electric field have a second ratio. The first ratio is greater than the second ratio.
摘要翻译：本发明提供一种包括衬底，深阱和掺杂区的高电压金属氧化物半导体晶体管器件。衬底和掺杂区域具有第一导电类型，并且衬底具有至少一个电场集中区域。深井具有不同于第一导电类型的第二导电类型。深阱设置在衬底中，并且掺杂区域设置在深阱中。掺杂区域和深阱在电场中的掺杂浓度具有第一比例，并且掺杂区域和电场外的深阱的掺杂浓度具有第二比例。第一比例大于第二比率。

7. 发明申请

US20120326266A1 HIGH-VOLTAGE SEMICONDUCTOR DEVICE 有权
标题翻译：高压半导体器件
公开(公告)号：US20120326266A1
公开(公告)日：2012-12-27
申请号：US13169008
申请日：2011-06-26
申请人： Shih-Chieh Pu , Ching-Ming Lee , Wei-Lun Hsu , Chih-Chung Wang , Ke-Feng Lin
发明人： Shih-Chieh Pu , Ching-Ming Lee , Wei-Lun Hsu , Chih-Chung Wang , Ke-Feng Lin
IPC分类号： H01L27/04
CPC分类号： H01L29/8611 , H01L27/0255 , H01L29/0619 , H01L29/0649 , H01L29/36
摘要： A high-voltage semiconductor device is disclosed. The HV semiconductor device includes: a substrate; a well of first conductive type disposed in the substrate; a first doping region of second conductive type disposed in the p-well; a first isolation structure disposed in the well of first conductive type and surrounding the first doping region of second conductive type; and a first drift ring of second conductive type disposed between the first doping region of second conductive type and the first isolation structure.
摘要翻译：公开了一种高压半导体器件。 HV半导体装置包括：基板; 设置在基板中的第一导电类型的阱; 布置在p阱中的第二导电类型的第一掺杂区; 第一隔离结构，设置在第一导电类型的阱中，并且包围第二导电类型的第一掺杂区; 以及设置在第二导电类型的第一掺杂区域和第一隔离结构之间的第二导电类型的第一漂移环。

8. 发明授权

US08592905B2 High-voltage semiconductor device 有权
标题翻译：高压半导体器件
公开(公告)号：US08592905B2
公开(公告)日：2013-11-26
申请号：US13169008
申请日：2011-06-26
申请人： Shih-Chieh Pu , Ching-Ming Lee , Wei-Lun Hsu , Chih-Chung Wang , Ke-Feng Lin
发明人： Shih-Chieh Pu , Ching-Ming Lee , Wei-Lun Hsu , Chih-Chung Wang , Ke-Feng Lin
IPC分类号： H01L29/66
CPC分类号： H01L29/8611 , H01L27/0255 , H01L29/0619 , H01L29/0649 , H01L29/36
摘要： A high-voltage semiconductor device is disclosed. The HV semiconductor device includes: a substrate; a well of first conductive type disposed in the substrate; a first doping region of second conductive type disposed in the p-well; a first isolation structure disposed in the well of first conductive type and surrounding the first doping region of second conductive type; and a first drift ring of second conductive type disposed between the first doping region of second conductive type and the first isolation structure.
摘要翻译：公开了一种高压半导体器件。 HV半导体装置包括：基板; 设置在基板中的第一导电类型的阱; 布置在p阱中的第二导电类型的第一掺杂区; 第一隔离结构，设置在第一导电类型的阱中，并且包围第二导电类型的第一掺杂区; 以及设置在第二导电类型的第一掺杂区域和第一隔离结构之间的第二导电类型的第一漂移环。

9. 发明申请

US20130277742A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US20130277742A1
公开(公告)日：2013-10-24
申请号：US13454149
申请日：2012-04-24
申请人： Chiu-Te Lee , Ke-Feng Lin , Shu-Wen Lin , Kun-Huang Yu , Chih-Chung Wang , Te-Yuan Wu
发明人： Chiu-Te Lee , Ke-Feng Lin , Shu-Wen Lin , Kun-Huang Yu , Chih-Chung Wang , Te-Yuan Wu
IPC分类号： H01L29/78 , H01L21/76
CPC分类号： H01L29/0653 , H01L29/0878 , H01L29/407 , H01L29/7816
摘要： A semiconductor structure comprises a substrate having a first conductive type; a deep well having a second conductive type formed in the substrate and extending down from a surface of the substrate; a first well having the first conductive type and a second well having the second conductive type both formed in the deep well and extending down from the surface of the substrate, and the second well spaced apart from the first well; a gate electrode formed on the substrate and disposed between the first and second wells; an isolation extending down from the surface of the substrate and disposed between the gate electrode and the second well; a conductive plug including a first portion and a second portion electrically connected to each other, and the first portion electrically connected to the gate electrode, and the second portion penetrating into the isolation.
摘要翻译：半导体结构包括具有第一导电类型的衬底; 具有形成在所述基板中并从所述基板的表面向下延伸的第二导电类型的深阱; 具有第一导电类型的第一阱和具有第二导电类型的第二阱都形成在深阱中并且从衬底的表面向下延伸，并且第二阱与第一阱间隔开; 栅电极，形成在所述基板上并且设置在所述第一阱和所述第二阱之间; 从衬底的表面向下延伸并且设置在栅电极和第二阱之间的隔离件; 导电插头，其包括彼此电连接的第一部分和第二部分，并且所述第一部分电连接到所述栅电极，并且所述第二部分穿透所述隔离。

10. 发明授权

US08766358B2 Semiconductor structure and method for manufacturing the same 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US08766358B2
公开(公告)日：2014-07-01
申请号：US13454149
申请日：2012-04-24
申请人： Chiu-Te Lee , Ke-Feng Lin , Shu-Wen Lin , Kun-Huang Yu , Chih-Chung Wang , Te-Yuan Wu
发明人： Chiu-Te Lee , Ke-Feng Lin , Shu-Wen Lin , Kun-Huang Yu , Chih-Chung Wang , Te-Yuan Wu
IPC分类号： H01L29/76
CPC分类号： H01L29/0653 , H01L29/0878 , H01L29/407 , H01L29/7816
摘要： A semiconductor structure comprises a substrate having a first conductive type; a deep well having a second conductive type formed in the substrate and extending down from a surface of the substrate; a first well having the first conductive type and a second well having the second conductive type both formed in the deep well and extending down from the surface of the substrate, and the second well spaced apart from the first well; a gate electrode formed on the substrate and disposed between the first and second wells; an isolation extending down from the surface of the substrate and disposed between the gate electrode and the second well; a conductive plug including a first portion and a second portion electrically connected to each other, and the first portion electrically connected to the gate electrode, and the second portion penetrating into the isolation.
摘要翻译：半导体结构包括具有第一导电类型的衬底; 具有形成在所述基板中并从所述基板的表面向下延伸的第二导电类型的深阱; 具有第一导电类型的第一阱和具有第二导电类型的第二阱都形成在深阱中并且从衬底的表面向下延伸，并且第二阱与第一阱间隔开; 栅电极，形成在所述基板上并且设置在所述第一阱和所述第二阱之间; 从衬底的表面向下延伸并且设置在栅电极和第二阱之间的隔离件; 导电插头，其包括彼此电连接的第一部分和第二部分，并且所述第一部分电连接到所述栅电极，并且所述第二部分穿透所述隔离。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式