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    • 2. 发明授权
    • Method of self-detecting and dynamically displaying detected results for a card reader used to read flash memory cards
    • 用于读取闪存卡的读卡器的自检和动态显示检测结果的方法
    • US07014121B2
    • 2006-03-21
    • US10888706
    • 2004-07-12
    • Chi-Tung ChangHUng-Chou TsaiChao-Yu Chen
    • Chi-Tung ChangHUng-Chou TsaiChao-Yu Chen
    • G06K19/06G06K7/08
    • G06K19/07732G06K7/0021G06K7/0047
    • A method of self-detecting and dynamically displaying detected results for a card reader used to read flash memory cards includes the steps of sending out a detecting code to each card slot or any flash memory card inserted therein via detecting circuits provided on and controlled by a control chip in the card reader; storing a detected state code sent back by the detecting circuits in a state register of the control chip; sending the state code from the state register to a computer; comparing and determining the state code in the computer; displaying a current state of the card slot or the flash memory card inserted therein on a screen of the computer; and periodically repeating the self-detecting and displaying to always show the most current state of the card slots on the card reader or the inserted flash memory card.
    • 对用于读取闪存卡的读卡器进行自检测和动态显示检测结果的方法包括以下步骤:通过检测电路将检测码发送到每个卡槽或其中插入的任何闪存卡, 控制芯片在读卡器中; 将由所述检测电路发回的检测状态码存储在所述控制芯片的状态寄存器中; 将状态代码从状态寄存器发送到计算机; 比较和确定计算机中的状态代码; 在计算机的屏幕上显示插入其中的卡槽或闪存卡的当前状态; 并且周期性地重复自检和显示以始终显示读卡器或插入的闪存卡上的卡插槽的最新状态。
    • 6. 发明申请
    • Card reader and data transmission method therefor
    • 读卡器及其数据传输方法
    • US20060027654A1
    • 2006-02-09
    • US10910754
    • 2004-08-04
    • Chi-Tung ChangWen-Chao TsengChao-Yu Chen
    • Chi-Tung ChangWen-Chao TsengChao-Yu Chen
    • G06K7/06
    • G06K7/0021G06K7/0047
    • A structurally integrated and simplified card reader includes a data I/O interface, via which data are input or output to or from the card reader; a managing system for controlling and managing data input/output to/from the card reader; at least one data reading device adapted to connect to at least one type of memory device for controlling access of data input/output to/from the memory device; and at least one data-sharing control device for providing a path for accessing data input/output to/from the memory device. When the data I/O interface is connected to a computer system, and the memory device is connected to the data reading device and the data-sharing control device, the managing system and the computer system cooperate to detect and control data input/output to/from the memory device via the path provided by the data-sharing control device.
    • 结构集成和简化的读卡器包括数据I / O接口,通过该数据I / O接口向读卡器输入或输出数据; 用于控制和管理从读卡器读取数据的数据输入/输出的管理系统; 至少一个数据读取装置,适于连接至少一种类型的存储装置,用于控制对存储装置的数据输入/输出的访问; 以及至少一个数据共享控制装置,用于提供用于访问/从存储装置输出的数据的路径。 当数据I / O接口连接到计算机系统,并且存储器件连接到数据读取装置和数据共享控制装置时,管理系统和计算机系统协同检测和控制数据输入/输出到 /通过由数据共享控制装置提供的路径从存储装置。
    • 7. 发明授权
    • Flash memory storage device and read/write method
    • 闪存存储设备和读/写方式
    • US07516296B2
    • 2009-04-07
    • US11581430
    • 2006-10-17
    • Chi-Tung ChangChia-Wei HouKuo-Hsiang HsuWen-Hao Cheng
    • Chi-Tung ChangChia-Wei HouKuo-Hsiang HsuWen-Hao Cheng
    • G06F12/06
    • G06F12/0246
    • A memory storage device and a read/write method thereof, first defining logically the flash memory as at least one particular data management area and at least one common data management area; next, determining the logical block address located in the particular data management area or the common data management area according to data transmitted to an external system by an area decision mechanism, wherein the method of writing to the particular data management area is by using a method of dynamic deviation value, and the method of writing to the common data management area is by using a method of same displacement value. Whereby, the particular data management area can be avoided moving frequently caused by updating data from the external system to improve read/write performance of the flash memory.
    • 一种存储器存储设备及其读/写方法,首先将闪速存储器逻辑地定义为至少一个特定数据管理区域和至少一个公共数据管理区域; 接下来,根据通过区域判定机构发送给外部系统的数据来确定位于特定数据管理区域或公共数据管理区域中的逻辑块地址,其中写入特定数据管理区域的方法是使用方法 的动态偏差值,并且写入公共数据管理区域的方法是通过使用相同位移值的方法。 由此,可以避免特定的数据管理区域通过从外部系统更新数据而频繁地移动,以提高闪速存储器的读/写性能。
    • 8. 发明申请
    • Method to Access Storage Device Through Universal Serial Bus
    • 通过通用串行总线访问存储设备的方法
    • US20080276037A1
    • 2008-11-06
    • US12172672
    • 2008-07-14
    • Chi-Tung ChangChing-Wen Wang
    • Chi-Tung ChangChing-Wen Wang
    • G06F12/02
    • G06F3/0656G06F3/0613G06F3/0679
    • A method accessing a flash memory storage device through universal serial bus (USB) of the present invention includes a flash controller and a flash memory, wherein the method includes connecting the storage device to a USB interface of an electronic device; outputting a plurality of accessing instructions to the flash controller via the electronic device; deciding which data is needed to be temporarily saved in a cache memory and a priority of the accessing instructions according to the characteristic of the file system and the content of preceding instructions of the flash controller; and writing the data temporarily saved in the cache memory into the flash memory according to the priority of the flash controller. The objective of the method of the present invention is to enhance the operation efficiency of the storage device.
    • 通过本发明的通用串行总线(USB)访问闪存存储设备的方法包括闪存控制器和闪速存储器,其中该方法包括将存储设备连接到电子设备的USB接口; 经由电子设备向闪存控制器输出多个访问指令; 根据文件系统的特性和闪存控制器的前述指令的内容,确定需要临时保存在高速缓冲存储器中的数据和访问指令的优先级; 并根据闪存控制器的优先级将临时保存在高速缓冲存储器中的数据写入闪速存储器。 本发明的方法的目的是提高存储装置的操作效率。
    • 9. 发明申请
    • Integrated hub control chip
    • 集成集线器控制芯片
    • US20080120454A1
    • 2008-05-22
    • US11638481
    • 2006-12-14
    • Chi-Tung ChangShih-Min LanI-Chieh Lin
    • Chi-Tung ChangShih-Min LanI-Chieh Lin
    • G06F3/00
    • G06F13/4022G06F2213/0042
    • An integrated hub control chip is applied to a motherboard of an application system. The integrated hub control chip contains an upstream port transceiver, an upstream port controller, a relaying circuit unit, a keyboard control module, a digital camera control module, a storage medium control module, and a relaying circuit controller. The keyboard control module, the digital camera control module, and the storage medium control module are directly connected to the relaying circuit controller. The relaying circuit controller switches the transmission path of the relaying circuit unit according to the transmission speed of these control modules. The upstream port controller controls the transmission direction of the upstream port transceiver to accomplish the data communication with the motherboard. The objects of saving the circuit space of motherboard, reducing the hardware cost, and increasing the purposes and expansibility of the integrated hub control chip can therefore be achieved.
    • 将集成的集线器控制芯片应用于应用系统的主板。 集成集线器控制芯片包括上行端口收发器,上游端口控制器,中继电路单元,键盘控制模块,数字照相机控制模块,存储介质控制模块和中继电路控制器。 键盘控制模块,数码相机控制模块和存储介质控制模块直接连接到继电电路控制器。 中继电路控制器根据这些控制模块的传输速度切换中继电路单元的传输路径。 上行端口控制器控制上行端口收发器的传输方向,完成与主板的数据通信。 因此可以实现节省主板电路空间,降低硬件成本,增加集成集线器控制芯片的目的和可扩展性的目的。
    • 10. 发明申请
    • Design of a signal switch
    • 信号开关设计
    • US20070067553A1
    • 2007-03-22
    • US11216649
    • 2005-09-01
    • Chi-Tung Chang
    • Chi-Tung Chang
    • G06F13/00
    • G06F13/4072
    • The present invention provides an improved design of the signal switch, wherein the signal switch comprises at least one combinational logic such as a chip, a plurality of hosts and at least one set of input control device such as a keyboard and a mouse. The chip can further comprise one or more virtual keyboard controller and a plurality of hubs and a multiplexer. The multiplexer of the present invention is utilized to detect and interpret signals. The present invention utilizes the combinational logic design of the chips and the multiplexer to provide a signal switch that can share multi-upstream devices but less downstream ports, only one set of keyboard and mouse is required. Multiplexing downstream devices among multiple hubs, which are dedicated to upstream hosts, help reducing the whole enumeration process of time. The signal switch of the present invention provides an improved design by replacing the central processing units (CPU) of a conventional design of signal switch with the combinational logics such as chips in order to increase the speed of the enumeration, as a result, the enumerating time is thus reduced.
    • 本发明提供了信号开关的改进设计,其中信号开关包括至少一个组合逻辑,例如芯片,多个主机以及至少一组诸如键盘和鼠标之类的输入控制装置。 芯片还可以包括一个或多个虚拟键盘控制器和多个集线器以及多路复用器。 本发明的复用器用于检测和解释信号。 本发明利用芯片和复用器的组合逻辑设计来提供可以共享多上游设备但较少下游端口的信号交换机,仅需要一组键盘和鼠标。 专用于上游主机的多个集线器之间的多路复用下游设备有助于减少整个计时过程。 本发明的信号开关通过用诸如芯片的组合逻辑代替信号开关的常​​规设计的中央处理单元(CPU)来提供改进的设计,以便增加枚举的速度,结果是枚举 因此减少了时间。