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1. 发明授权

US07291863B2 Light emitting diode structure 有权
标题翻译：发光二极管结构
公开(公告)号：US07291863B2
公开(公告)日：2007-11-06
申请号：US11163220
申请日：2005-10-11
申请人： Cheng-Yi Liu , Yuan-Tai Lai , Shen-Jie Wang
发明人： Cheng-Yi Liu , Yuan-Tai Lai , Shen-Jie Wang
IPC分类号： H01L29/205 , H01L33/00
CPC分类号： H01L33/382 , H01L27/153 , H01L33/0079
摘要： A LED structure including an epitaxy substrate, a semiconductor layer, a first bonding pad and a second bonding pad, is provided. The epitaxy substrate has a through hole and the semiconductor layer is disposed on the epitaxy substrate. The semiconductor layer includes a first type doped semiconductor layer, a light-emitting layer and a second type doped semiconductor layer. The first type doped semiconductor layer is disposed on the epitaxy substrate, while the light-emitting layer is disposed between the first type and second type doped semiconductor layers. The first bonding pad is disposed in the through hole and electrically connected to the first type doped semiconductor layer, while the second bonding pad is disposed on the second type doped semiconductor layer.
摘要翻译：提供了包括外延基板，半导体层，第一接合焊盘和第二接合焊盘的LED结构。外延衬底具有通孔，并且半导体层设置在外延衬底上。半导体层包括第一掺杂半导体层，发光层和第二掺杂半导体层。第一类型掺杂半导体层设置在外延衬底上，而发光层设置在第一类型和第二类型掺杂半导体层之间。第一接合焊盘设置在通孔中并电连接到第一掺杂半导体层，而第二接合焊盘设置在第二掺杂半导体层上。

2. 发明申请

US20060141644A1 LIGHT EMITTING DIODE AND FABRICATING METHOD THEREOF 有权
标题翻译：发光二极管及其制造方法
公开(公告)号：US20060141644A1
公开(公告)日：2006-06-29
申请号：US11163314
申请日：2005-10-14
申请人： Cheng-Yi Liu , Yuan-Tai Lai , Shen-Jie Wang
发明人： Cheng-Yi Liu , Yuan-Tai Lai , Shen-Jie Wang
IPC分类号： H01L21/00 , H01L21/44
CPC分类号： H01L33/0079 , H01L25/0753 , H01L2224/48091 , H01L2924/00014
摘要： A method for fabricating a light emitting diode (LED) is provided. Successively forming a first type doped semiconductor layer, a light emitting layer and a second type doped semiconductor layer on an epitaxy substrate; forming a bonding layer thereon; bonding a transferring substrate with the bonding layer; removing the epitaxy substrate; removing a part of the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer for exposing a part of the bonding layer; patterning the bonding layer to form a first and a second bonding portion isolated from each other, wherein the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer are disposed on the first bonding portion; forming a pad on the first type doped semiconductor layer; and forming a conducting wire for electrically connecting the pad and the second bonding portion.
摘要翻译：提供一种制造发光二极管（LED）的方法。在外延衬底上连续形成第一掺杂半导体层，发光层和第二掺杂半导体层; 在其上形成结合层; 用转移衬底与接合层接合; 去除外延衬底; 去除所述第一类型掺杂半导体层的一部分，所述发光层和所述第二类型掺杂半导体层，用于暴露所述结合层的一部分; 图案化所述接合层以形成彼此隔离的第一和第二接合部分，其中所述第一掺杂半导体层，所述发光层和所述第二掺杂半导体层设置在所述第一接合部分上; 在所述第一掺杂半导体层上形成焊盘; 以及形成用于电连接所述焊盘和所述第二接合部的导线。

3. 发明申请

US20060102925A1 LIGHT EMITTING DIODE STRUCTURE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：发光二极管结构及其制造方法
公开(公告)号：US20060102925A1
公开(公告)日：2006-05-18
申请号：US11163220
申请日：2005-10-11
申请人： Cheng-Yi Liu , Yuan-Tai Lai , Shen-Jie Wang
发明人： Cheng-Yi Liu , Yuan-Tai Lai , Shen-Jie Wang
IPC分类号： H01L33/00
CPC分类号： H01L33/382 , H01L27/153 , H01L33/0079
摘要： A LED structure including an epitaxy substrate, a semiconductor layer, a first bonding pad and a second bonding pad, is provided. The epitaxy substrate has a through hole and the semiconductor layer is disposed on the epitaxy substrate. The semiconductor layer includes a first type doped semiconductor layer, a light-emitting layer and a second type doped semiconductor layer. The first type doped semiconductor layer is disposed on the epitaxy substrate, while the light-emitting layer is disposed between the first type and second type doped semiconductor layers. The first bonding pad is disposed in the through hole and electrically connected to the first type doped semiconductor layer, while the second bonding pad is disposed on the second type doped semiconductor layer.
摘要翻译：提供了包括外延基板，半导体层，第一接合焊盘和第二接合焊盘的LED结构。外延衬底具有通孔，并且半导体层设置在外延衬底上。半导体层包括第一掺杂半导体层，发光层和第二掺杂半导体层。第一类型掺杂半导体层设置在外延衬底上，而发光层设置在第一类型和第二类型掺杂半导体层之间。第一接合焊盘设置在通孔中并电连接到第一掺杂半导体层，而第二接合焊盘设置在第二掺杂半导体层上。

4. 发明授权

US07265389B2 Light emitting diode and fabricating method thereof 有权
标题翻译：发光二极管及其制造方法
公开(公告)号：US07265389B2
公开(公告)日：2007-09-04
申请号：US11163314
申请日：2005-10-14
申请人： Cheng-Yi Liu , Yuan-Tai Lai , Shen-Jie Wang
发明人： Cheng-Yi Liu , Yuan-Tai Lai , Shen-Jie Wang
IPC分类号： H01L27/15 , H01L21/00
CPC分类号： H01L33/0079 , H01L25/0753 , H01L2224/48091 , H01L2924/00014
摘要： A method for fabricating a light emitting diode (LED) is provided. Successively forming a first type doped semiconductor layer, a light emitting layer and a second type doped semiconductor layer on an epitaxy substrate; forming a bonding layer thereon; bonding a transferring substrate with the bonding layer; removing the epitaxy substrate; removing a part of the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer for exposing a part of the bonding layer; patterning the bonding layer to form a first and a second bonding portion isolated from each other, wherein the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer are disposed on the first bonding portion; forming a pad on the first type doped semiconductor layer; and forming a conducting wire for electrically connecting the pad and the second bonding portion.
摘要翻译：提供一种制造发光二极管（LED）的方法。在外延衬底上连续形成第一掺杂半导体层，发光层和第二掺杂半导体层; 在其上形成结合层; 用转移衬底与接合层接合; 去除外延衬底; 去除所述第一类型掺杂半导体层的一部分，所述发光层和所述第二类型掺杂半导体层，用于暴露所述结合层的一部分; 图案化所述接合层以形成彼此隔离的第一和第二接合部分，其中所述第一掺杂半导体层，所述发光层和所述第二掺杂半导体层设置在所述第一接合部分上; 在所述第一掺杂半导体层上形成焊盘; 以及形成用于电连接所述焊盘和所述第二接合部的导线。

5. 发明申请

US20070122646A1 SOLDER COMPOSITION AND SOLDERING STRUCTURE 审中-公开
标题翻译：焊接组合物和焊接结构
公开(公告)号：US20070122646A1
公开(公告)日：2007-05-31
申请号：US11307447
申请日：2006-02-08
申请人： Cheng-Yi Liu , Shen-Jie Wang
发明人： Cheng-Yi Liu , Shen-Jie Wang
IPC分类号： C22C13/00 , B32B15/01
CPC分类号： C22C13/00 , C22C13/02 , Y10T428/12708
摘要： A solder composition for reacting with aluminum is provided. The main alloying components in the solder includes tin (Sn), zinc (Zn) and chromium (Cr) with 0.01 wt % to 20 wt % zinc and 0.01 wt % to 20 wt % chromium.
摘要翻译：提供了与铝反应的焊料组合物。焊料中的主要合金成分包括含有0.01重量％至20重量％锌和0.01重量％至20重量％铬的锡（Sn），锌（Zn）和铬（Cr）。

6. 发明申请

US20050031483A1 [SOLDER COMPOSITION] 审中-公开
标题翻译： [焊接组合物]
公开(公告)号：US20050031483A1
公开(公告)日：2005-02-10
申请号：US10709990
申请日：2004-06-11
申请人： Cheng-Yi Liu , Shih-Chieh Hsu , Shen-Jie Wang
发明人： Cheng-Yi Liu , Shih-Chieh Hsu , Shen-Jie Wang
IPC分类号： B23K35/22 , B23K35/26 , B23K35/28 , B23K35/32 , C22C12/00 , C22C13/00 , C22C18/00 , C22C28/00
CPC分类号： B23K35/26 , B23K35/262 , B23K35/264 , B23K35/282 , B23K35/32 , C22C12/00 , C22C13/00 , C22C18/00 , C22C28/00
摘要： A solder composition adapted to bond metallic materials and non-metallic materials is provided. The solder composition can enhance the bonding strength for the metallic materials and the non-metallic materials. The solder composition mainly comprises Sn—Cr alloy. The solder composition further includes anther metal component for regulating the bonding capability so that the solder composition can be used to bond various materials.
摘要翻译：提供了适于粘合金属材料和非金属材料的焊料组合物。焊料组合物可以增强金属材料和非金属材料的结合强度。焊料组成主要包括Sn-Cr合金。焊料组合物还包括用于调节接合能力的其他金属组分，以便可以将焊料组合物用于粘合各种材料。

7. 发明申请

US20060019481A1 GOLD BUMP STRUCTURE AND FABRICATING METHOD THEREOF 审中-公开
标题翻译：金块结构及其制作方法
公开(公告)号：US20060019481A1
公开(公告)日：2006-01-26
申请号：US11163087
申请日：2005-10-04
申请人： Cheng-Yi Liu , Shen-Jie Wang
发明人： Cheng-Yi Liu , Shen-Jie Wang
IPC分类号： H01L21/48 , H01L21/44 , H01L21/50
CPC分类号： H01L24/11 , H01L24/13 , H01L2224/13144 , H01L2224/13582 , H01L2224/13647 , H01L2224/13655 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2224/13099 , H01L2224/0401
摘要： A flip-chip gold bump structure and a method of fabricating thereof are disclosed. The structure includes a nickel layer formed on a gold bump formed on a chip, and a copper layer formed on the nickel layer for forming a Ni/Cu barrier layer. Because of the formation of the Ni/Cu layer which prevents the interaction of the gold bump and the solder, the fragile connecting point resulting from the rapid interaction of the Au—Sn can be eliminated.
摘要翻译：公开了一种倒装金凸块结构及其制造方法。该结构包括在形成在芯片上的金凸块上形成的镍层和形成在镍层上形成Ni / Cu阻挡层的铜层。由于形成了防止金凸块与焊料相互作用的Ni / Cu层，可以消除由Au-Sn的快速相互作用产生的易碎连接点。

8. 发明授权

US06744142B2 Flip chip interconnection structure and process of making the same 有权
标题翻译：倒装芯片的互连结构和制作过程相同
公开(公告)号：US06744142B2
公开(公告)日：2004-06-01
申请号：US10248992
申请日：2003-03-07
申请人： Cheng-Yi Liu , Shen-Jie Wang , Cheng-Heng Kao
发明人： Cheng-Yi Liu , Shen-Jie Wang , Cheng-Heng Kao
IPC分类号： H01L2940
CPC分类号： H01L24/13 , H01L21/563 , H01L24/16 , H01L24/81 , H01L2224/05001 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05572 , H01L2224/13099 , H01L2224/13111 , H01L2224/13347 , H01L2224/16 , H01L2224/73203 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/00014 , H01L2924/01047
摘要： In a process of fabricating flip chip interconnection, a UBM layer is deposited on an I/O pad of a chip. The UBM layer includes a nickel layer. On the UBM layer is formed a tin-containing solder material. The chip is mounted on a carrier substrate by alignment of the bonding pad with a contact pad of the carrier substrate. A reflow process is performed to respectively turn the tin-containing solder material to a tin-containing solder bump and form a composite intermetallic compound on the nickel layer of the UBM to prevent its spalling.
摘要翻译：在制造倒装芯片互连的过程中，UBM层沉积在芯片的I / O焊盘上。 UBM层包括镍层。在UBM层上形成含锡焊料。通过使焊盘与载体基板的接触焊盘对准，将芯片安装在载体基板上。进行回流处理以分别将含锡焊料材料转化为含锡焊料凸块，并在UBM的镍层上形成复合金属间化合物以防止其剥落。

9. 发明授权

US06642079B1 Process of fabricating flip chip interconnection structure 有权
标题翻译：制造倒装芯片互连结构的过程
公开(公告)号：US06642079B1
公开(公告)日：2003-11-04
申请号：US10065297
申请日：2002-10-01
申请人： Cheng-Yi Liu , Shen-Jie Wang , Cheng-Heng Kao
发明人： Cheng-Yi Liu , Shen-Jie Wang , Cheng-Heng Kao
IPC分类号： H01L2144
CPC分类号： H01L24/16 , H01L24/11 , H01L24/13 , H01L24/81 , H01L2224/05001 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05572 , H01L2224/13099 , H01L2224/13147 , H01L2224/16 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014
摘要： In a process of fabricating flip chip interconnection, a UBM layer is deposited on an I/O pad of a chip. The UBM layer includes a nickel layer. On the UBM layer is formed a tin-containing solder material. The chip is mounted on a carrier substrate by alignment of the bonding pad with a contact pad of the carrier substrate. A reflow process is performed to respectively turn the tin-containing solder material to a tin-containing solder bump and form a composite intermetallic compound on the nickel layer of the UBM to prevent its spalling.
摘要翻译：在制造倒装芯片互连的过程中，UBM层沉积在芯片的I / O焊盘上。 UBM层包括镍层。在UBM层上形成含锡焊料。通过使焊盘与载体基板的接触焊盘对准，将芯片安装在载体基板上。进行回流处理以分别将含锡焊料材料转化为含锡焊料凸块，并在UBM的镍层上形成复合金属间化合物以防止其剥落。

10. 发明申请

US20140291613A1 MULTIPLE QUANTUM WELL STRUCTURE 审中-公开
标题翻译：多量子井结构
公开(公告)号：US20140291613A1
公开(公告)日：2014-10-02
申请号：US13851953
申请日：2013-03-27
申请人： Ching-Liang Lin , Shen-Jie Wang , Yen-Lin Lai
发明人： Ching-Liang Lin , Shen-Jie Wang , Yen-Lin Lai
IPC分类号： H01L29/15 , H01L29/205 , H01L29/06
CPC分类号： H01L29/155 , H01L29/2003 , H01L33/06
摘要： A multiple quantum well structure including a plurality of well-barrier pairs arranged along a direction is provided. Each of the well-barrier pairs includes a barrier layer and a well layer adjacent to the barrier layer. The barrier layers and the well layers of the well-barrier pairs are disposed alternately. A ratio of a thickness of the well layer in the direction to a thickness of the barrier layer in the direction in each well-barrier pair is a well-barrier thickness ratio, and the well-barrier thickness ratios of a part of the well-barrier pairs gradually increase along the direction.
摘要翻译：提供了包括沿着一个方向布置的多个阱 - 屏障对的多量子阱结构。每个阱屏障对包括阻挡层和邻近阻挡层的阱层。阱屏障对的阻挡层和阱层交替设置。阱层的厚度在阻挡层的厚度方向上的阻挡层厚度比为良好的阻挡层厚度比，阱壁的厚度比，屏障对沿着方向逐渐增加。

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