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1. 发明授权

US06871305B2 Device for prolonging lifetime of nonvolatile memory 有权
标题翻译：用于延长非易失性存储器使用寿命的设备
公开(公告)号：US06871305B2
公开(公告)日：2005-03-22
申请号：US09879979
申请日：2001-06-14
申请人： Cheng-Chih Chien , Bing-Fei Wu , Jou-Wei Fu , Wen-Chung Chang
发明人： Cheng-Chih Chien , Bing-Fei Wu , Jou-Wei Fu , Wen-Chung Chang
IPC分类号： G11C16/34 , G11C29/00 , G11C16/06
CPC分类号： G11C16/349
摘要： A device for prolonging the lifetime of a nonvolatile memory is applied to the connection between a host electronic machine and a nonvolatile memory device. The device includes a RAM (Random Access Memory) buffer zone, a counter, and two sets of inverters, wherein the RAM buffer zone is employed to store a unit data train temporarily; the counter is used to count the total bits of logic “0”; the inverters are used to lessen the times for readying/writing a nonvolatile memory device by inverting the unit data train based on the count (for example, when the number of logic “1“s exceeds the number of logic “0“s, and the state flag keeps track of whether an inversion has occurred or is needed.
摘要翻译：用于延长非易失性存储器的寿命的装置被应用于主机电子机器和非易失性存储器件之间的连接。该装置包括RAM（随机存取存储器）缓冲区，计数器和两组反相器，其中RAM缓冲区用于临时存储单元数据列; 计数器用于计数逻辑“0”的总位数; 逆变器用于通过基于计数（例如，当逻辑“1”的数量超过逻辑“0”的数量）反转单元数据序列来减少用于准备/写入非易失性存储器件的时间，并且状态标志跟踪是否已经发生或需要反转。

2. 发明授权

US06754756B2 GPS card reader 有权
标题翻译： GPS读卡器
公开(公告)号：US06754756B2
公开(公告)日：2004-06-22
申请号：US09924994
申请日：2001-08-08
申请人： Cheng-Chih Chien , Bing-Fei Wu , Jou-Wei Fu , Lung-Yi Kuo , Chung-Chi Tien
发明人： Cheng-Chih Chien , Bing-Fei Wu , Jou-Wei Fu , Lung-Yi Kuo , Chung-Chi Tien
IPC分类号： G06F1300
CPC分类号： G06F13/387
摘要： A global positioning system (GPS) card reader comprises a bus connection interface, a GPS module, a universal asynchronous receiver transmitter (UART) coupled with the GPS module and a complex programmable logic circuit comprising a complex programmable logic device. The complex programmable logic circuit connects with the bus connection interface and comprises at least: a card information structural (CIS) memory, am address decoder, a power control register, and a storage card coupling for connecting a storage card.
摘要翻译：全球定位系统（GPS）读卡器包括总线连接接口，GPS模块，与GPS模块耦合的通用异步接收器发射器（UART）和包括复杂可编程逻辑器件的复杂可编程逻辑电路。复杂可编程逻辑电路与总线连接接口连接，至少包括：卡信息结构（CIS）存储器，地址解码器，功率控制寄存器和用于连接存储卡的存储卡耦合。

3. 发明授权

US06484290B1 IC package similar IDE interface solid state disk module and optimized pin design 有权
标题翻译： IC封装类似IDE接口固态磁盘模块和优化引脚设计
公开(公告)号：US06484290B1
公开(公告)日：2002-11-19
申请号：US09433010
申请日：1999-11-03
申请人： Cheng-Chih Chien , Bing-Fei Wu , Khein-Seng Pua , Aw Yong-Chee Kong
发明人： Cheng-Chih Chien , Bing-Fei Wu , Khein-Seng Pua , Aw Yong-Chee Kong
IPC分类号： G06F1750
CPC分类号： G06F3/0664 , G06F3/0619 , G06F3/0658 , G06F3/0679
摘要： The present invention involves an IC Package Similar IDE Interface Solid State Disk Module & Optimized Pin Design, in which the solid state disk module consists of a solid state disk module control, several flash memories, a power regulator; a low power detector and a short circuit preventing circuit; through link between signal position and data lines of the solid state disk and the IDE data storage a interface, data which are expected to be stored in the system is able to be written in the solid state disk module or read out by the solid state disk module; the link has a type of dual-in-line package which can be soldered directly on a PCB of the system so that the mechanical structure for conventional hard disk will be get rid of, resulting in high vibration resistance, small dimensions, therefore, it is very suitable to light type portable computer systems or industrial computer systems where requirements on data storage and vibration resistance are needed.
摘要翻译：本发明涉及一种IC封装类似的IDE接口固态盘模块和优化引脚设计，其中固态盘模块由固态盘模块控制，多个闪存，功率调节器组成; 低功率检测器和短路防止电路; 通过固态盘的信号位置和数据线之间的链接以及IDE数据存储的接口，期望存储在系统中的数据能够被写入固态磁盘模块或由固态磁盘读出模块该连接件具有一种可以直接焊接在系统的PCB上的双列直插封装，从而可以摆脱常规硬盘的机械结构，从而产生高抗振性，小尺寸，因此它非常适用于需要数据存储和抗振性要求的轻型便携式计算机系统或工业计算机系统。

4. 发明申请

US20070218431A1 Interactive learning appliance and method 审中-公开
标题翻译：互动学习用具及方法
公开(公告)号：US20070218431A1
公开(公告)日：2007-09-20
申请号：US11377545
申请日：2006-03-17
申请人： Cheng-Chih Chien , Chih-Yung Cheng
发明人： Cheng-Chih Chien , Chih-Yung Cheng
IPC分类号： G09B19/00
CPC分类号： G09B1/34
摘要： A method and an appliance for interactive learning mainly comprise a plurality of pieces and a stage. After a user placing at least one piece on the stage, the stage will identify and judge if a combination formed by the at least one piece is meaningful and output a corresponding content package explaining a meaning of the combination subsequently.
摘要翻译：用于交互式学习的方法和装置主要包括多个片段和一个阶段。在用户在舞台上放置至少一件之后，舞台将识别并判断由至少一件作品形成的组合是否有意义，并输出相应的内容包，以说明该组合的含义。

5. 发明授权

US06742078B1 Management, data link structure and calculating method for flash memory 有权
标题翻译：闪存的管理，数据链路结构和计算方法
公开(公告)号：US06742078B1
公开(公告)日：2004-05-25
申请号：US09412323
申请日：1999-10-05
申请人： Cheng-Chih Chien , Chin-Chen Lee , Khein Seng Pua , Soo Ching Ng , Jiunn-Yeong Yang
发明人： Cheng-Chih Chien , Chin-Chen Lee , Khein Seng Pua , Soo Ching Ng , Jiunn-Yeong Yang
IPC分类号： G06F1200
CPC分类号： G06F3/064 , G06F3/0616 , G06F3/0679 , G06F12/0246 , G06F2212/7207 , G11C29/76
摘要： The present invention relates to a management and link structure of a flash memory. The flash memory is divided into several different types of data access blocks, such as general data blocks, spare blocks, link-table block, and new blocks. A simple data link structure is provided, and a management and calculating method for spare blocks saves time to search and write data effectively and prolongs the service life of the flash memory.
摘要翻译：本发明涉及闪速存储器的管理和链接结构。闪存被分为几种不同类型的数据访问块，例如通用数据块，备用块，链接表块和新块。提供简单的数据链路结构，并且备用块的管理和计算方法有效地节省了搜索和写入数据的时间，并延长了闪存的使用寿命。

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