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1. 发明授权

US5504919A Sorter structure based on shiftable content memory 失效
标题翻译：基于可移动内容记忆的分拣机结构
公开(公告)号：US5504919A
公开(公告)日：1996-04-02
申请号：US498108
申请日：1995-07-05
申请人： Chen-Yi Lee , Jer-Min Tsai , Po-Wen Hsieh
发明人： Chen-Yi Lee , Jer-Min Tsai , Po-Wen Hsieh
IPC分类号： G06F7/24 , G06F7/08
CPC分类号： G06F7/24 , Y10S707/99937
摘要： An optimized high-speed sorter has a plurality of process elements connected in series. Each process element includes a sorting unit used to store a sorted item, and a comparing/controlling unit coupled to the sorting unit. In this sorter, all sorted items are compared with the input item simultaneously, and then are divided into an LE-group wherein the sorted items are less than or equal to the input item, and a G-group wherein the sorted items are greater than the input item. We assume that the sorted items are arranged in a descending sequence from left to right. In the insertion operation, the sorted items in the LE-group are shifted rightwards simultaneously, and the input item is loaded in the position between the LE-group and G-group. In the deletion operation, only the sorted items in the LE-group are shifted leftwards simultaneously. In order to accelerate the operation speed, the sorter adopts a pre-shift strategy.
摘要翻译：优化的高速分选机具有串联连接的多个处理元件。每个处理单元包括用于存储分类项目的分类单元和耦合到分类单元的比较/控制单元。在该分拣机中，将所有排序的项目与输入项目同时进行比较，然后被划分为LE组，其中排序的项目小于或等于输入项目，以及G组，其中排序的项目大于输入项。我们假设排序的项目按照从左到右的降序排列。在插入操作中，LE组中的排序项目同时向右移动，并且输入项目被加载到LE组和G组之间的位置。在删除操作中，只有LE组中的排序项目同时向左移动。为了加快运营速度，分拣机采用了前转策略。

2. 发明授权

US09048259B2 Dielectric punch-through stoppers for forming FinFETs having dual fin heights 有权
标题翻译：用于形成具有双翅片高度的FinFET的介质穿通止动器
公开(公告)号：US09048259B2
公开(公告)日：2015-06-02
申请号：US13562805
申请日：2012-07-31
申请人： Shih-Ting Hung , Cheng-Hung Chang , Chen-Yi Lee , Chen-Nan Yeh , Chen-Hua Yu
发明人： Shih-Ting Hung , Cheng-Hung Chang , Chen-Yi Lee , Chen-Nan Yeh , Chen-Hua Yu
IPC分类号： H01L29/78 , H01L29/66
CPC分类号： H01L21/76202 , H01L21/823431 , H01L21/823481 , H01L29/1083 , H01L29/66795 , H01L29/785
摘要： A semiconductor structure includes a semiconductor substrate having a first portion and a second portion. A first Fin field-effect transistor (FinFET) is formed over the first portion of the semiconductor substrate, wherein the first FinFET includes a first fin having a first fin height. A second FinFET is formed over the second portion of the semiconductor substrate, wherein the second FinFET includes a second fin having a second fin height different from the first fin height. A top surface of the first fin is substantially level with a top surface of the second fin. A punch-through stopper is underlying and adjoining the first FinFET, wherein the punch-through stopper isolates the first fin from the first portion of the semiconductor substrate.
摘要翻译：半导体结构包括具有第一部分和第二部分的半导体衬底。第一Fin场效应晶体管（FinFET）形成在半导体衬底的第一部分上，其中第一FinFET包括具有第一鳍片高度的第一鳍片。第二FinFET形成在半导体衬底的第二部分上，其中第二FinFET包括具有不同于第一鳍片高度的第二鳍片高度的第二鳍片。第一翅片的顶表面基本上与第二翅片的顶表面平齐。穿通止动件位于第一FinFET的下面并邻接，其中穿通止动件将第一鳍片与半导体衬底的第一部分隔离。

3. 外观设计

USD722382S1 Plantar fasciitis support 有权
标题翻译：足底筋膜炎支持
公开(公告)号：USD722382S1
公开(公告)日：2015-02-10
申请号：US29444570
申请日：2013-01-31
申请人： Chen-Yi Lee , Hao-Husan Huang
设计人： Chen-Yi Lee , Hao-Husan Huang

4. 发明授权

US08943391B2 Cyclic code decoding method and cyclic code decoder 有权
标题翻译：循环码解码方法和循环码解码器
公开(公告)号：US08943391B2
公开(公告)日：2015-01-27
申请号：US13609829
申请日：2012-09-11
申请人： Yi-Min Lin , Chih-Hsiang Hsu , Hsie-Chia Chang , Chen-Yi Lee
发明人： Yi-Min Lin , Chih-Hsiang Hsu , Hsie-Chia Chang , Chen-Yi Lee
IPC分类号： H03M13/00 , H03M13/15 , H03M13/45
CPC分类号： H03M13/152 , H03M13/1525 , H03M13/159 , H03M13/451 , H03M13/6502
摘要： In a cyclic code decoding method, a decoder analyzes a received codeword to identify unreliable symbols in the codeword, and sets candidate syndrome patterns accordingly. Then, a syndrome calculator calculates evaluated syndrome values associated with one of the candidate syndrome patterns, and an error location polynomial (ELP) generator generates an ELP according to the syndrome values. An error correction device corrects the errors in the codeword according to the ELP when a degree of the ELP is not more than a threshold value, and the syndrome calculator adjusts the syndrome values and the ELP generator generates another ELP according to the adjusted syndrome values when otherwise.
摘要翻译：在循环码解码方法中，解码器分析接收的码字以识别码字中的不可靠符号，并相应地设置候选综合征模式。然后，校正子计算器计算与候选校正子模式中的一个相关联的评估校正子值，并且错误位置多项式（ELP）生成器根据校正子值生成ELP。当ELP的程度不大于阈值时，错误校正装置根据ELP校正码字中的错误，并且校正子计算器调整校正子值，并且ELP生成器根据校正的校正子值生成另一ELP，除此以外。

5. 发明申请

US20120299110A1 Dielectric Punch-Through Stoppers for Forming FinFETs Having Dual Fin Heights 审中-公开
标题翻译：用于形成具有双鳍高度的FinFET的介质穿通塞
公开(公告)号：US20120299110A1
公开(公告)日：2012-11-29
申请号：US13562805
申请日：2012-07-31
申请人： Shih-Ting Hung , Cheng-Hung Chang , Chen-Yi Lee , Chen-Nan Yeh , Chen-Hua Yu
发明人： Shih-Ting Hung , Cheng-Hung Chang , Chen-Yi Lee , Chen-Nan Yeh , Chen-Hua Yu
IPC分类号： H01L27/088
CPC分类号： H01L21/76202 , H01L21/823431 , H01L21/823481 , H01L29/1083 , H01L29/66795 , H01L29/785
摘要： A semiconductor structure includes a semiconductor substrate having a first portion and a second portion. A first Fin field-effect transistor (FinFET) is formed over the first portion of the semiconductor substrate, wherein the first FinFET includes a first fin having a first fin height. A second FinFET is formed over the second portion of the semiconductor substrate, wherein the second FinFET includes a second fin having a second fin height different from the first fin height. A top surface of the first fin is substantially level with a top surface of the second fin. A punch-through stopper is underlying and adjoining the first FinFET, wherein the punch-through stopper isolates the first fin from the first portion of the semiconductor substrate.
摘要翻译：半导体结构包括具有第一部分和第二部分的半导体衬底。第一Fin场效应晶体管（FinFET）形成在半导体衬底的第一部分上，其中第一FinFET包括具有第一鳍片高度的第一鳍片。第二FinFET形成在半导体衬底的第二部分上，其中第二FinFET包括具有不同于第一鳍片高度的第二鳍片高度的第二鳍片。第一翅片的顶表面基本上与第二翅片的顶表面平齐。穿通止动件位于第一FinFET的下面并邻接，其中穿通止动件将第一鳍片与半导体衬底的第一部分隔离。

6. 发明授权

US08108762B2 Operating method and circuit for low density parity check (LDPC) decoder 有权
标题翻译：低密度奇偶校验（LDPC）解码器的操作方法和电路
公开(公告)号：US08108762B2
公开(公告)日：2012-01-31
申请号：US11939119
申请日：2007-11-13
申请人： Chih-Hao Liu , Yen-Chin Liao , Chen-Yi Lee , Hsie-Chia Chang , Yarsun Hsu
发明人： Chih-Hao Liu , Yen-Chin Liao , Chen-Yi Lee , Hsie-Chia Chang , Yarsun Hsu
IPC分类号： G06F11/00 , H03M13/00
CPC分类号： H03M13/1137 , H03M13/1114 , H03M13/658 , H03M13/6591
摘要： An operating method and a circuit for low density parity check (LDPC) decoders, in which original bit nodes are incorporated into check nodes for simultaneous operation. The bit node messages are generated according to the difference between the newly generated check messages and the previous check node messages. The bit node messages can be updated immediately, and the decoder throughput can be improved. The required memory of LDPC decoders can be effectively reduced, and the decoding speed can also be enhanced.
摘要翻译：一种用于低密度奇偶校验（LDPC）解码器的操作方法和电路，其中将原始比特节点并入校验节点用于同时操作。根据新生成的检查消息和先前检查节点消息之间的差异来生成位节点消息。可以立即更新位节点消息，并且可以提高解码器吞吐量。可以有效地减少LDPC解码器所需的存储器，并且还可以提高解码速度。

7. 发明申请

US20100163971A1 Dielectric Punch-Through Stoppers for Forming FinFETs Having Dual Fin Heights 有权
标题翻译：用于形成具有双鳍高度的FinFET的介质穿通塞
公开(公告)号：US20100163971A1
公开(公告)日：2010-07-01
申请号：US12347123
申请日：2008-12-31
申请人： Shih-Ting Hung , Cheng-Hung Chang , Chen-Yi Lee , Chen-Nan Yeh , Chen-Hua Yu
发明人： Shih-Ting Hung , Cheng-Hung Chang , Chen-Yi Lee , Chen-Nan Yeh , Chen-Hua Yu
IPC分类号： H01L29/772
CPC分类号： H01L21/76202 , H01L21/823431 , H01L21/823481 , H01L29/1083 , H01L29/66795 , H01L29/785
摘要： A semiconductor structure includes a semiconductor substrate having a first portion and a second portion. A first Fin field-effect transistor (FinFET) is formed over the first portion of the semiconductor substrate, wherein the first FinFET includes a first fin having a first fin height. A second FinFET is formed over the second portion of the semiconductor substrate, wherein the second FinFET includes a second fin having a second fin height different from the first fin height. A top surface of the first fin is substantially level with a top surface of the second fin. A punch-through stopper is underlying and adjoining the first FinFET, wherein the punch-through stopper isolates the first fin from the first portion of the semiconductor substrate.
摘要翻译：半导体结构包括具有第一部分和第二部分的半导体衬底。第一Fin场效应晶体管（FinFET）形成在半导体衬底的第一部分上，其中第一FinFET包括具有第一鳍片高度的第一鳍片。第二FinFET形成在半导体衬底的第二部分上，其中第二FinFET包括具有不同于第一鳍片高度的第二鳍片高度的第二鳍片。第一翅片的顶表面基本上与第二翅片的顶表面平齐。穿通止动件位于第一FinFET的下面并邻接，其中穿通止动件将第一鳍片与半导体衬底的第一部分隔离。

8. 发明申请

US20090278617A1 Crystal-less Communications Device and Self-Calibrated Embedded Virtual Crystal Clock Generation Method 有权
标题翻译：无水晶通信设备和自校准嵌入式虚拟水晶时钟生成方法
公开(公告)号：US20090278617A1
公开(公告)日：2009-11-12
申请号：US12180176
申请日：2008-07-25
申请人： Chen-Yi Lee , Jui-Yuan Yu
发明人： Chen-Yi Lee , Jui-Yuan Yu
IPC分类号： G01R23/00 , H03J7/04
CPC分类号： H03J7/04
摘要： This invention discloses a crystal-less communication device and self-calibrated embedded virtual crystal clock generation method. In communication systems, the invention proposes a crystal-less scheme in the device for wireless or wired-line communications. The operation concepts are that the transmitter Device-1 provides Device-2 a reference signal, and Device-2 takes this signal to generate a local signal with the similar frequency that has limited frequency error compared with the one from Device-1. This invention is done via the circuit-design methodology, so it can be implemented from any kinds of circuit implementation processes, especially the CMOS process. As a result, the hardware can be designed in the way of highly integration and extremely low cost. Also, this can largely change and improve existing communications design architecture, hardware cost, and hardware area.
摘要翻译：本发明公开了一种无晶体通信装置和自校准嵌入式虚拟晶体钟产生方法。在通信系统中，本发明提出了一种无线或有线通信设备中的无晶体方案。操作原理是发射机Device-1向Device-2提供参考信号，Device-2采用该信号产生与Device-1相比具有有限频率误差相似频率的本地信号。本发明通过电路设计方法完成，因此可以通过任何种类的电路实现过程，特别是CMOS工艺实现。因此，硬件可以以高集成度和极低成本的方式进行设计。此外，这可以大大改变和改进现有的通信设计架构，硬件成本和硬件领域。

9. 发明申请

US20060262990A1 Dual-mode high throughput de-blocking filter 审中-公开
标题翻译：双模高吞吐量解块滤波器
公开(公告)号：US20060262990A1
公开(公告)日：2006-11-23
申请号：US11205811
申请日：2005-08-17
申请人： Chen-Yi Lee , Tsu-Ming Liu
发明人： Chen-Yi Lee , Tsu-Ming Liu
IPC分类号： G06K9/40 , G06K9/36
CPC分类号： H04N19/42 , H04N19/593 , H04N19/61 , H04N19/82 , H04N19/86
摘要： This invention provides the unique and high-throughput architecture for multiple video standards. Particularly, we propose a novel scheme to integrate the standard in-loop filter and the informative post-loop filter. Due to the non-standardization of post filter, it provides high freedom to develop a certain suitable algorithm for the integration with loop-filter. We modify the post filter algorithm to make a compromise between hardware integration complexity and performance loss. Further, we propose a hybrid scheduling to reduce the processing cycles and improve the system throughput. The main idea is that we use four pixel buffers to keep the intermediate pixel value and perform the horizontal and vertical filtering process in one hybrid scheduling flow. In our approach, we reduce processing cycles, and the synthesized gate counts are very small. Meanwhile, the synthesized results also indicate lower cost for hardware.
摘要翻译：本发明为多种视频标准提供了独特且高吞吐量的架构。特别地，我们提出了一种新颖的方案来整合标准的环路滤波器和信息后循环滤波器。由于后置滤波器的非标准化，它提供了高度的自由度来开发与环路滤波器集成的一些合适的算法。我们修改后置滤波器算法，以便在硬件集成复杂性和性能损失之间做出妥协。此外，我们提出一种混合调度来减少处理周期并提高系统吞吐量。主要思想是我们使用四个像素缓冲区来保持中间像素值，并在一个混合调度流中执行水平和垂直过滤处理。在我们的方法中，我们减少了处理周期，合成的门数非常小。同时，合成结果也表明硬件成本较低。

10. 发明申请

US20060236197A1 Transmission method combining trellis coded modulation and low-density parity check code and architecture thereof 审中-公开
标题翻译：组合网格编码调制和低密度奇偶校验码及其架构的传输方法
公开(公告)号：US20060236197A1
公开(公告)日：2006-10-19
申请号：US11225081
申请日：2005-09-14
申请人： Chien-Ching Lin , Hsie-Chia Chang , Chen-Yi Lee
发明人： Chien-Ching Lin , Hsie-Chia Chang , Chen-Yi Lee
IPC分类号： H03M13/00
CPC分类号： H03M13/256 , H03M13/11 , H03M13/255
摘要： The present invention discloses a method combining Trellis Coded Modulation (TCM) and Low-Density Parity Check (LDPC) code and the architecture thereof, which incorporates TCM with LDPC code having better error-correction capability to promote transmission quality and to define TCM of different transmission rates. Further, TCM can utilize less number of states to outperform the conventional spreading so that the hardware complexity in high-speed transmission can be reduced.
摘要翻译：本发明公开了一种组合网格编码调制（TCM）和低密度奇偶校验（LDPC）码的方法及其架构，其结合了TCM与具有更好的纠错能力的LDPC码，以提高传输质量并定义不同的TCM 传输速率。此外，TCM可以利用较少数量的状态来胜过传统的扩展，从而可以降低高速传输中的硬件复杂度。

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