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1. 发明授权

US08900994B2 Method for producing a protective structure 有权
标题翻译：保护结构的制造方法
公开(公告)号：US08900994B2
公开(公告)日：2014-12-02
申请号：US13157137
申请日：2011-06-09
申请人： Chen-Hua Yu , Shin-Puu Jeng , Wen-Chih Chiou , Fang Wen Tsai , Chen-Yu Tsai
发明人： Chen-Hua Yu , Shin-Puu Jeng , Wen-Chih Chiou , Fang Wen Tsai , Chen-Yu Tsai
IPC分类号： H01L21/44 , H01L25/065 , H01L23/00 , H01L23/48 , H01L21/683
CPC分类号： H01L25/0657 , H01L21/0217 , H01L21/6835 , H01L21/76831 , H01L21/76834 , H01L21/76871 , H01L21/76895 , H01L21/76898 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L25/50 , H01L2221/68372 , H01L2224/03002 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0347 , H01L2224/0391 , H01L2224/0401 , H01L2224/05008 , H01L2224/05018 , H01L2224/05023 , H01L2224/05025 , H01L2224/05073 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05548 , H01L2224/05559 , H01L2224/05562 , H01L2224/05568 , H01L2224/05647 , H01L2224/13023 , H01L2224/13025 , H01L2224/1411 , H01L2224/14181 , H01L2224/16113 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/00014 , H01L2924/10253 , H01L2924/01029 , H01L2224/05552
摘要： A system and method for manufacturing a through silicon via is disclosed. An embodiment comprises forming a through silicon via with a liner protruding from a substrate. A passivation layer is formed over the substrate and the through silicon via, and the passivation layer and liner are recessed from the sidewalls of the through silicon via. Conductive material may then be formed in contact with both the sidewalls and a top surface of the through silicon via.
摘要翻译：公开了一种制造硅通孔的系统和方法。一个实施例包括用从衬底突出的衬垫形成通孔硅通孔。钝化层形成在衬底和穿通硅通孔之上，钝化层和衬垫从通硅通孔的侧壁凹陷。然后可以将导电材料形成为与通孔硅通孔的两个侧壁和顶表面接触。

2. 发明申请

US20120313247A1 Through Silicon Via Structure and Method 有权
标题翻译：通过硅通孔结构和方法
公开(公告)号：US20120313247A1
公开(公告)日：2012-12-13
申请号：US13157137
申请日：2011-06-09
申请人： Chen-Hua Yu , Shin-Puu Jeng , Wen-Chih Chiou , Fang Wen Tsai , Chen-Yu Tsai
发明人： Chen-Hua Yu , Shin-Puu Jeng , Wen-Chih Chiou , Fang Wen Tsai , Chen-Yu Tsai
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L25/0657 , H01L21/0217 , H01L21/6835 , H01L21/76831 , H01L21/76834 , H01L21/76871 , H01L21/76895 , H01L21/76898 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L25/50 , H01L2221/68372 , H01L2224/03002 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0347 , H01L2224/0391 , H01L2224/0401 , H01L2224/05008 , H01L2224/05018 , H01L2224/05023 , H01L2224/05025 , H01L2224/05073 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05548 , H01L2224/05559 , H01L2224/05562 , H01L2224/05568 , H01L2224/05647 , H01L2224/13023 , H01L2224/13025 , H01L2224/1411 , H01L2224/14181 , H01L2224/16113 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/00014 , H01L2924/10253 , H01L2924/01029 , H01L2224/05552
摘要： A system and method for manufacturing a through silicon via is disclosed. An embodiment comprises forming a through silicon via with a liner protruding from a substrate. A passivation layer is formed over the substrate and the through silicon via, and the passivation layer and liner are recessed from the sidewalls of the through silicon via. Conductive material may then be formed in contact with both the sidewalls and a top surface of the through silicon via.
摘要翻译：公开了一种制造硅通孔的系统和方法。一个实施例包括用从衬底突出的衬垫形成通孔硅通孔。钝化层形成在衬底和穿通硅通孔之上，钝化层和衬垫从通硅通孔的侧壁凹陷。然后可以将导电材料形成为与通孔硅通孔的两个侧壁和顶表面接触。

3. 发明申请

US20120001337A1 Alignment Mark and Method of Formation 有权
标题翻译：对准标记和形成方法
公开(公告)号：US20120001337A1
公开(公告)日：2012-01-05
申请号：US12827563
申请日：2010-06-30
申请人： Chen-Yu Tsai , Shih-Hui Wang , Chien-Ming Chiu , Chia-Ho Chen , Fang Wen Tsai , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Chen-Yu Tsai , Shih-Hui Wang , Chien-Ming Chiu , Chia-Ho Chen , Fang Wen Tsai , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： H01L23/532 , H01L21/71 , H01L23/522
CPC分类号： H01L23/481 , H01L21/30604 , H01L21/6835 , H01L21/76831 , H01L21/76877 , H01L21/76898 , H01L23/544 , H01L2221/68327 , H01L2223/54426 , H01L2224/13
摘要： In accordance with an embodiment, a structure comprises a substrate having a first area and a second area; a through substrate via (TSV) in the substrate penetrating the first area of the substrate; an isolation layer over the second area of the substrate, the isolation layer having a recess; and a conductive material in the recess of the isolation layer, the isolation layer being disposed between the conductive material and the substrate in the recess.
摘要翻译：根据实施例，结构包括具有第一区域和第二区域的基板; 穿过基板的第一区域的贯穿基板通孔（TSV）; 在所述衬底的所述第二区域上方的隔离层，所述隔离层具有凹部; 以及在所述隔离层的所述凹部中的导电材料，所述隔离层设置在所述凹部中的所述导电材料和所述基板之间。

4. 发明授权

US08896136B2 Alignment mark and method of formation 有权
标题翻译：对齐标记和形成方法
公开(公告)号：US08896136B2
公开(公告)日：2014-11-25
申请号：US12827563
申请日：2010-06-30
申请人： Chen-Yu Tsai , Shih-Hui Wang , Chien-Ming Chiu , Chia-Ho Chen , Fang Wen Tsai , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Chen-Yu Tsai , Shih-Hui Wang , Chien-Ming Chiu , Chia-Ho Chen , Fang Wen Tsai , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： H01L23/544 , H01L29/40 , H01L23/48 , H01L23/52 , H01L21/76 , H01L21/00 , H01L21/4763 , H01L21/44 , H01L21/683
CPC分类号： H01L23/481 , H01L21/30604 , H01L21/6835 , H01L21/76831 , H01L21/76877 , H01L21/76898 , H01L23/544 , H01L2221/68327 , H01L2223/54426 , H01L2224/13
摘要： In accordance with an embodiment, a structure comprises a substrate having a first area and a second area; a through substrate via (TSV) in the substrate penetrating the first area of the substrate; an isolation layer over the second area of the substrate, the isolation layer having a recess; and a conductive material in the recess of the isolation layer, the isolation layer being disposed between the conductive material and the substrate in the recess.
摘要翻译：根据实施例，结构包括具有第一区域和第二区域的基板; 穿过基板的第一区域的贯穿基板通孔（TSV）; 在所述衬底的所述第二区域上方的隔离层，所述隔离层具有凹部; 以及在所述隔离层的所述凹部中的导电材料，所述隔离层设置在所述凹部中的所述导电材料和所述基板之间。

5. 发明授权

US08776399B2 Shoe insole 有权
标题翻译：鞋垫
公开(公告)号：US08776399B2
公开(公告)日：2014-07-15
申请号：US13357067
申请日：2012-01-24
申请人： Chen-Yu Tsai
发明人： Chen-Yu Tsai
IPC分类号： A43B13/38
CPC分类号： A43B17/006
摘要： A shoe insole includes a soft elastomer formed in a shape of an inner bottom surface of a shoe, wherein the soft elastomer includes a front metatarsal section, a mid foot section and a rear heel section, and wherein the rear heel section has a recessed area, and an inner arch concave surface and an outer arch concave surface are respectively defined in two opposite sides of the recessed area; and a hard elastomer combined with the mid foot section and the rear heel section of the soft elastomer, wherein a rear heel section of the hard elastomer has a through-hole, and a portion of material of the soft elastomer is filled in the through-hole, and an inner arch concave surface and an outer arch concave surface are respectively defined in two opposite outer sides of the rear heel section of the hard elastomer.
摘要翻译：鞋底包括形成鞋底内底形状的软质弹性体，其中软质弹性体包括前跖骨部分，中足部分和后跟部分，并且其中后跟部分具有凹陷区域并且在凹陷区域的两个相对侧中分别限定内拱形凹面和外拱形凹面; 以及硬质弹性体，与软质弹性体的中足部和后跟部结合，其中硬质弹性体的后跟部分具有通孔，并且软质弹性体的一部分材料填充在通孔中，孔，内拱凹面和外拱凹面分别限定在硬质弹性体的后跟部的两个相对的外侧。

6. 发明申请

US20130185957A1 Shoe Insole 有权
标题翻译：鞋垫
公开(公告)号：US20130185957A1
公开(公告)日：2013-07-25
申请号：US13357067
申请日：2012-01-24
申请人： Chen-Yu Tsai
发明人： Chen-Yu Tsai
IPC分类号： A43B13/38
CPC分类号： A43B17/006
摘要： A shoe insole includes a soft elastomer formed in a shape of an inner bottom surface of a shoe, wherein the soft elastomer includes a front metatarsal section, a mid foot section and a rear heel section, and wherein the rear heel section has a recessed area, and an inner arch concave surface and an outer arch concave surface are respectively defined in two opposite sides of the recessed area; and a hard elastomer combined with the mid foot section and the rear heel section of the soft elastomer, wherein a rear heel section of the hard elastomer has a through-hole, and a portion of material of the soft elastomer is filled in the through-hole, and an inner arch concave surface and an outer arch concave surface are respectively defined in two opposite outer sides of the rear heel section of the hard elastomer.
摘要翻译：鞋底包括形成鞋底内底形状的软质弹性体，其中软质弹性体包括前跖骨部分，中足部分和后跟部分，并且其中后跟部分具有凹陷区域并且在凹陷区域的两个相对侧中分别限定内拱形凹面和外拱形凹面; 以及硬质弹性体，与软质弹性体的中足部和后跟部结合，其中硬质弹性体的后跟部分具有通孔，并且软质弹性体的一部分材料填充在通孔中，孔，内拱凹面和外拱凹面分别限定在硬质弹性体的后跟部的两个相对的外侧。

7. 外观设计

USD684723S1 Pedicure machine 有权
标题翻译：修脚机
公开(公告)号：USD684723S1
公开(公告)日：2013-06-18
申请号：US29406532
申请日：2011-11-15
申请人： Chen-Yu Tsai
设计人： Chen-Yu Tsai

8. 发明申请

US20130133224A1 Shoe Insole 审中-公开
标题翻译：鞋垫
公开(公告)号：US20130133224A1
公开(公告)日：2013-05-30
申请号：US13305965
申请日：2011-11-29
申请人： Chen-Yu Tsai
发明人： Chen-Yu Tsai
IPC分类号： A43B13/38
CPC分类号： A43B3/0063 , A43B7/142 , A43B7/144 , A43B7/148
摘要： A shoe insole includes an elastic main body including a front metatarsal, a mid foot and a rear heel sections, the front metatarsal section having an enclosed forefoot buffer zone, the first recesses being formed in the forefoot buffer zone, the rear heel section having an enclosed heel buffer zone, the second recesses being formed in the heel buffer zone; an elastic pad member combined with the mid foot section and the rear heel section at the bottom surface of the elastic main body, a mid foot section of the elastic pad member having a protruding foot arch portion, the mid foot section of the elastic pad member having the elongated arc-shaped grooves and the through holes, a rear heel section of the elastic pad member having a through hole corresponding to the heel buffer zone; and an upper layer combined with the elastic main body.
摘要翻译：鞋底包括弹性主体，其包括前跖骨，中足和后脚跟部分，前跖骨部分具有封闭的前脚掌缓冲区，第一凹部形成在前脚掌缓冲区中，后跟部分具有封闭的跟部缓冲区，第二凹部形成在跟部缓冲区中; 与弹性主体底面的中间脚部和后跟部结合的弹性垫构件，具有突出的脚弓部的弹性垫构件的中间脚部，弹性垫构件的中间脚部具有细长的弧形槽和通孔，弹性垫构件的后跟部分具有对应于跟部缓冲区的通孔; 以及与弹性主体结合的上层。

9. 发明申请

US20080315284A1 Flash memory structure and method of making the same 审中-公开
标题翻译：闪存结构和制作方法相同
公开(公告)号：US20080315284A1
公开(公告)日：2008-12-25
申请号：US11953886
申请日：2007-12-11
申请人： Ching-Nan Hsiao , Chung-Lin Huang , Chen-Yu Tsai , Chung-Yuan Lee
发明人： Ching-Nan Hsiao , Chung-Lin Huang , Chen-Yu Tsai , Chung-Yuan Lee
IPC分类号： H01L29/00 , H01L21/336
CPC分类号： H01L27/11568 , H01L27/115 , H01L27/11526 , H01L27/11543
摘要： A flash memory cell includes a substrate, a T-shaped control gate disposed above the substrate, a floating gate embedded in a lower recess of the T-shaped control gate, a dielectric layer between the T-shaped control gate and the floating gate; a cap layer above the T-shaped control gate, a control gate oxide between the T-shaped control gate and the substrate, a floating gate oxide between the floating gate and the substrate, a liner covering the cap layer and the floating gate, and a source/drain region adjacent to the floating gate. The floating gate has a vertical wall surface that is coplanar with one side of the dielectric layer.
摘要翻译：闪存单元包括衬底，设置在衬底上方的T形控制栅极，嵌入在T形控制栅极的下凹槽中的浮置栅极，在T形控制栅极和浮置栅极之间的介电层; T形控制栅极上方的覆盖层，T形控制栅极和衬底之间的控制栅极氧化物，浮置栅极和衬底之间的浮置栅极氧化物，覆盖覆盖层和浮动栅极的衬底，以及与浮动栅极相邻的源极/漏极区域。浮动栅极具有与电介质层的一侧共面的垂直壁表面。

10. 发明申请

US20080296725A1 SEMICONDUCTOR COMPONENT AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：半导体元件及其制造方法
公开(公告)号：US20080296725A1
公开(公告)日：2008-12-04
申请号：US11955399
申请日：2007-12-13
申请人： Ching-Nan Hsiao , Chung-Lin Huang , Chen-Yu Tsai , Chung-Yuan Lee
发明人： Ching-Nan Hsiao , Chung-Lin Huang , Chen-Yu Tsai , Chung-Yuan Lee
IPC分类号： H01L23/00 , H01L21/76
CPC分类号： H01L21/823481 , H01L27/11521
摘要： A semiconductor component includes a substrate, two isolation structures, a conductor pattern and a dielectric layer. The isolation structures are disposed in the substrate, and each of the isolation structures has protruding portions protruding from the surface of the substrate. A trench is formed between the protruding portions. The included angle formed by the sidewall of the protruding portion and the surface of the substrate is an obtuse angle. The conductor pattern is disposed in the trench and fills the trench up. The dielectric layer is disposed between the conductor pattern and the substrate.
摘要翻译：半导体部件包括基板，两个隔离结构，导体图案和电介质层。隔离结构设置在基板中，并且每个隔离结构具有从基板的表面突出的突出部分。在突出部之间形成沟槽。由突出部分的侧壁和基板的表面形成的夹角是钝角。导体图案设置在沟槽中并将沟槽填满。电介质层设置在导体图案和基板之间。

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