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1. 发明授权

US5563834A Multiport memory and method 失效
标题翻译：多端口内存和方法
公开(公告)号：US5563834A
公开(公告)日：1996-10-08
申请号：US345689
申请日：1994-11-21
申请人： Charles W. T. Longway , William R. Young
发明人： Charles W. T. Longway , William R. Young
IPC分类号： G11C7/06 , G11C7/14 , G11C8/16 , G11C17/12 , G11C7/00
CPC分类号： G11C17/12 , G11C7/062 , G11C7/065 , G11C7/14 , G11C8/16
摘要： Integrated circuit memory with bitlines which cross each other in multiple place for symmetric capacitives coupling. Also read only memory with differential sense amplifier with an input to each half array of cells. Bits are stored complementarily in the two halves.
摘要翻译：集成电路存储器，其位线在多个位置彼此交叉，用于对称电容耦合。还可以使用差分读出放大器只读存储器，每个单元格的每个半阵列都有一个输入。位在两半中互补存储。

2. 发明授权

US5440506A Semiconductor ROM device and method 失效
标题翻译：半导体ROM器件及方法
公开(公告)号：US5440506A
公开(公告)日：1995-08-08
申请号：US930930
申请日：1992-08-14
申请人： Charles W. T. Longway , William R. Young
发明人： Charles W. T. Longway , William R. Young
IPC分类号： G11C7/06 , G11C7/14 , G11C8/16 , G11C17/12 , G11C17/00
CPC分类号： G11C17/12 , G11C7/062 , G11C7/065 , G11C7/14 , G11C8/16
摘要： Integrated circuit memory with bitlines which cross each other in multiple place for symmetric capacitives coupling. Also read only memory with differential sense amplifier with an input to each half array of cells. Bits are stored complementarily in the two halves.
摘要翻译：集成电路存储器，其位线在多个位置彼此交叉，用于对称电容耦合。还可以使用差分读出放大器只读存储器，每个单元格的每个半阵列都有一个输入。位在两半中互补存储。

3. 发明授权

US5586072A Multiport memory and method 失效
公开(公告)号：US5586072A
公开(公告)日：1996-12-17
申请号：US346178
申请日：1994-11-21
申请人： Charles W. T. Longway , William R. Young
发明人： Charles W. T. Longway , William R. Young
IPC分类号： G11C7/06 , G11C7/14 , G11C8/16 , G11C17/12 , G11C5/06
CPC分类号： G11C17/12 , G11C7/062 , G11C7/065 , G11C7/14 , G11C8/16
摘要： Integrated circuit memory with bitlines which cross each other in multiple place for symmetric capacitives coupling. Also read only memory with differential sense amplifier with an input to each half array of cells. Bits are stored complementarily in the two halves.

4. 发明授权

US5544095A Rom cell for a multiport memory and method 失效
标题翻译： Rom单元的多端口内存和方法
公开(公告)号：US5544095A
公开(公告)日：1996-08-06
申请号：US450879
申请日：1995-05-26
申请人： Charles W. T. Longway , William R. Young
发明人： Charles W. T. Longway , William R. Young
IPC分类号： G11C7/06 , G11C7/14 , G11C8/16 , G11C17/12 , G11C17/00
CPC分类号： G11C17/12 , G11C7/062 , G11C7/065 , G11C7/14 , G11C8/16
摘要： Integrated circuit memory with bitlines which cross each other in multiple place for symmetric capacitives coupling. Also read only memory with differential sense amplifier with an input to each half array of cells. Bits are stored complementarily in the two halves.
摘要翻译：集成电路存储器，其位线在多个位置彼此交叉，用于对称电容耦合。还可以使用差分读出放大器只读存储器，每个单元格的每个半阵列都有一个输入。位在两半中互补存储。

5. 发明授权

US5373466A Flash-clear of ram array using partial reset mechanism 失效
标题翻译：使用部分复位机制清除ram阵列
公开(公告)号：US5373466A
公开(公告)日：1994-12-13
申请号：US858310
申请日：1992-03-25
申请人： David S. Landeta , William R. Young , Charles W. T. Longway
发明人： David S. Landeta , William R. Young , Charles W. T. Longway
IPC分类号： G11C7/20 , G11C8/16 , G11C7/00
CPC分类号： G11C7/20 , G11C8/16 , Y10S257/903 , Y10S257/904
摘要： A reset mechanism for a random access memory array comprises an auxiliary reset circuit, which does not require modification of the contents of the memory itself. For a random access memory capable of storing M, N-bit words, the auxiliary mechanism includes a plurality of M reset state circuits that are respectively associated with the M words of memory. The reset state circuit preferably comprises an additional `resetable` memory cell for each word of memory, which is integrated within the structure of the memory itself. In order to reset one or more words of memory, the associated reset state circuits are placed in a reset state-representative condition. The state of each reset state circuit is used to controllably mask (e.g. is logically ANDed with) the contents of its associated word of memory, whenever that word is read out. If the reset memory cell has been cleared, then regardless of the contents of its associated word in memory, the mask will cause the addressed memory word to be output as all zeros. Whenever a new word value is written to memory, its associated reset state circuit is simultaneously accessed and a valid or non-reset representative `1` bit is stored in that reset state circuit. Subsequently, when that word is read out from memory, the (`1`) value of the mask bit stored in its associated reset cell will cause the contents of the word to be output as is.
摘要翻译：用于随机存取存储器阵列的复位机构包括辅助复位电路，其不需要修改存储器本身的内容。对于能够存储M，N位字的随机存取存储器，辅助机制包括分别与存储器的M个字相关联的多个M复位状态电路。复位状态电路优选地包括用于存储器的每个字的附加的“可复位”存储器单元，其被集成在存储器本身的结构内。为了复位一个或多个存储器字，相关的复位状态电路处于复位状态代表状态。每当读出该字时，每个复位状态电路的状态用于可控制地掩蔽（例如，与其相关联的存储器的内容的逻辑“与”）。如果复位存储单元已被清除，则无论存储器中相关字的内容如何，该掩码将使所寻址的存储器字全部输出。每当将新的字值写入存储器时，其相关的复位状态电路被同时访问，并且有效或非复位代表“1”位被存储在该复位状态电路中。随后，当从存储器中读出该字时，存储在其相关联的复位单元中的掩码位的（'1'）值将导致字的内容原样输出。

6. 发明授权

US07084481B2 Symmetric inducting device for an integrated circuit having a ground shield 有权
公开(公告)号：US07084481B2
公开(公告)日：2006-08-01
申请号：US10855953
申请日：2004-05-28
申请人： Rex Everett Lowther , William R. Young
发明人： Rex Everett Lowther , William R. Young
IPC分类号： H01L29/00
CPC分类号： H01L28/10 , H01F17/0013 , H01F27/367 , H01L23/5223 , H01L23/5225 , H01L23/5227 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to integrated circuits having symmetric inducting devices with a ground shield. In one embodiment, a symmetric inducting device for an integrated circuit comprises a substrate, a main metal layer and a shield. The substrate has a working surface. The main metal layer has at least one pair of current path regions. Each of the current path region pairs is formed in generally a regular polygonal shape that is generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate. The shield is patterned into segments that are generally symmetric about the plane of symmetry. Medial portions of at least some segments of the shield are formed generally perpendicular to the plane of symmetry as the medial portions cross the plane of symmetry.

7. 发明授权

US06211056B1 Integrated circuit air bridge structures and methods of fabricating same 有权
标题翻译：集成电路空气桥结构及其制造方法
公开(公告)号：US06211056B1
公开(公告)日：2001-04-03
申请号：US09199292
申请日：1998-11-24
申请人： Patrick A. Begley , William R. Young , Anthony L. Rivoli , Jose Avelino Delgado , Stephen J. Gaul
发明人： Patrick A. Begley , William R. Young , Anthony L. Rivoli , Jose Avelino Delgado , Stephen J. Gaul
IPC分类号： H01L214763
CPC分类号： H01L28/10 , H01L21/7682 , H01L23/5221 , H01L2924/0002 , H01L2924/00
摘要： Conductive elements which provide interconnections (air bridges between circuits) and components such as capacitors and inductors may be incorporated in the devices in a manner to reduce parasitic effects in the operation of the devices while providing close spacing which enhances the performance of the devices at high frequency. Separate substrates are provided respectively having the integrated circuits formed therein and covering, preferably sealing the integrated circuits. The air bridge conductive components (interconnections, capacitors or inductors) are formed separately in the covering substrate which is assembled with the substrate having the integrated circuit as a lid which seals and packages the circuits and the conductive element or component contained in the lid. The conductive component may be separated by cavities formed in the lid substrate or in the substrate having the integrated circuit device already formed therein. Assembly may take place at temperatures lower than necessary for fusion bonding and diffusion commonly used in the fabrication of integrated circuits. Bonds which are used may be metal, oxide or plastic (polymer) bonding material.
摘要翻译：提供互连（电路之间的空气桥）和诸如电容器和电感器的部件的导电元件可以以减少器件操作中的寄生效应的方式并入器件中，同时提供紧密的间隔，这增强了器件在高处的性能频率。分别提供分离的基板，其中形成有集成电路并覆盖，优选地密封集成电路。空气桥导电部件（互连，电容器或电感器）分别形成在与具有集成电路的基板组装的覆盖基板上，该基板具有密封并封装电路和包含在盖中的导电元件或部件的盖。导电部件可以由形成在盖基板中的空腔或已经形成有集成电路器件的基板分离。组装可能发生在集成电路制造中常用的熔接和扩散所需的温度以下。使用的债券可以是金属，氧化物或塑料（聚合物）结合材料。

8. 发明授权

US5696452A Arrangement and method for improving room-temperature testability of CMOS integrated circuits optimized for cryogenic temperature operation 失效
标题翻译： CMOS半导体集成电路室温可测性的优化布置及方法，适用于低温运行
公开(公告)号：US5696452A
公开(公告)日：1997-12-09
申请号：US512323
申请日：1995-08-08
申请人： Donald F. Hemmenway , John T. Gasner , William R. Young
发明人： Donald F. Hemmenway , John T. Gasner , William R. Young
IPC分类号： G01R31/26
CPC分类号： G01R31/2621
摘要： Room temperature-testing of an MOS field effect transistor architecture, whose parameters have been optimized for operation at cryogenic temperatures, is facilitated by applying a prescribed reverse body-to-source voltage bias, that modifies the variation of the drain-to-source current vs. gate-to-source voltage characteristic, so as to shift the gate threshold voltage to a value corresponding to the device operating at its optimally designed cryogenic temperature. The magnitude of this back bias voltage is set at a value which adds to the number of charges required to balance the gate voltage before an inversion condition is achieved. In effect, the back bias causes the depletion layer beneath the gate to be expanded into the body beneath the gate, thereby compensating for what would otherwise be depletion mode operation, if the cryogenically designed MOS device were placed at room temperature. This allows the cryogenic performance of the MOS field effect transistor to be tested at room temperature, thereby substantially reducing manufacturing cost. Upon completion of testing of the circuit to evaluate its performance at cryogenic temperatures, the back-bias is removed, so as to allow normal operation in the circuit's intended cryogenic environment.
摘要翻译： MOS场效应晶体管架构的室温测试通过施加规定的反向体对电压偏置来实现，其中参数已被优化用于在低温下的操作，该电压修正了漏 - 源电流的变化与栅极至源极电压特性相对应，以便将栅极阈值电压移动到对应于在其最佳设计的低温温度下工作的器件的值。该反偏置电压的大小被设定为在实现反转条件之前平衡栅极电压所需的电荷数量的值。实际上，背偏置导致栅极下面的耗尽层扩展到栅极下方的主体，从而补偿如果将低温设计的MOS器件放置在室温下将是耗尽模式操作。这允许在室温下测试MOS场效应晶体管的低温性能，从而显着降低制造成本。在完成电路测试以评估其在低温温度下的性能时，将去除偏压，以便允许在电路预期的低温环境中正常工作。

9. 发明授权

US5493581A Digital down converter and method 失效
标题翻译：数字下变频器和方法
公开(公告)号：US5493581A
公开(公告)日：1996-02-20
申请号：US930170
申请日：1992-08-14
申请人： William R. Young , David B. Chester
发明人： William R. Young , David B. Chester
IPC分类号： H03D7/16 , H03H17/06 , H04B1/26 , H04B1/30 , H04J1/05 , H04Q11/04 , H04B1/10
CPC分类号： H04B1/0021 , H03D7/165 , H03H17/06 , H04B1/0003 , H04B1/26 , H04B1/30 , H04J1/05 , H04Q11/04
摘要： A digital down converter for extracting a signal from a complex digital signal wherein the real and imaginary components of the complex digital signal are each modulated to shift the center frequency of the desired signal to zero frequency, decimated digitally to limit the bandwidth of each to the bandwidth of the desired signal and filtered to alter the shape thereof. The digital down converter includes a formatter for arranging the output of the desired signal in one of multiple output formats and a controller for programmably controlling the modulation, decimation and filtering and for selecting the desired output format.
摘要翻译：一种用于从复数数字信号中提取信号的数字下变频器，其中复数数字信号的实分量和虚分量均被调制，以将期望信号的中心频率移位到零频率，数字地抽取以限制每个信号的带宽所需信号的带宽并被滤波以改变其形状。数字下变频器包括一个格式化器，用于以多种输出格式之一布置所需信号的输出，以及用于可编程地控制调制，抽取和滤波以及选择所需输出格式的控制器。

10. 发明授权

US5484665A Rotary seal member and method for making 失效
标题翻译：旋转密封件及其制造方法
公开(公告)号：US5484665A
公开(公告)日：1996-01-16
申请号：US685110
申请日：1991-04-15
申请人： Jogender Singh , Jerry D. Schell , William R. Young
发明人： Jogender Singh , Jerry D. Schell , William R. Young
IPC分类号： C23C26/00 , C23C26/02 , C23C30/00 , F01D11/00 , F01D11/08 , F16J15/28 , B52B15/00 , B63H1/26
CPC分类号： F01D11/08 , C23C26/02 , Y10S277/94 , Y10T428/12486 , Y10T428/12806 , Y10T428/12812 , Y10T428/12819 , Y10T428/12882 , Y10T428/12889 , Y10T428/12896 , Y10T428/12903
摘要： A rotary seal member, such as a gas turbine engine blade, is provided with an improved surface layer which has an elastic modulus matched with the elastic modulus of a substrate of the member. Also, the surface layer does not form a brittle intermetallic with the substrate at an intended operating temperature. In one form, the surface layer includes abrasive particles adapted to inhibit chemical reaction with the layer material. One specific example is a Ti-alloy substrate having a metallurgically bonded layer based on Nb, and including cubic boron nitride abrasive particles coated with cobalt entrapped in the layer.
摘要翻译：诸如燃气涡轮发动机叶片的旋转密封构件设置有改进的表面层，其具有与构件的基底的弹性模量匹配的弹性模量。此外，表面层在预定的工作温度下不与基底形成脆性金属间化合物。在一种形式中，表面层包括适于抑制与层材料的化学反应的磨料颗粒。一个具体实例是具有基于Nb的冶金结合层的Ti合金基底，并且包括被包覆在该层中的钴的立方氮化硼磨料颗粒。

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