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1. 发明授权

US06304106B1 CMOS bi-directional current mode differential link with precompensation 有权
标题翻译： CMOS双向电流模式差分链路，带预补偿
公开(公告)号：US06304106B1
公开(公告)日：2001-10-16
申请号：US09506754
申请日：2000-02-18
申请人： Delbert Raymond Cecchi , Charles C. Hanson , Curtis Walter Preuss
发明人： Delbert Raymond Cecchi , Charles C. Hanson , Curtis Walter Preuss
IPC分类号： H03K19094
CPC分类号： H04L25/08
摘要： A Complementary Metal Oxide Semiconductor (CMOS) current mode differential link with precompensation is provided. The Complementary Metal Oxide Semiconductor (CMOS) bi-directional current mode differential link with precompensation includes a CMOS driver receiving a data input and having an output coupled to a transmission line. A CMOS replica driver receives the data input and provides a replica driver output substantially equal to the CMOS driver output. A CMOS receiver is coupled to both the transmission line and replica driver output. The CMOS receiver subtracts the replica driver output from a signal at the transmission line. The CMOS driver and the CMOS replica driver include a plurality of parallel current sources. Each of the current sources is arranged to send positive or negative current through a load responsive to an applied control signal. The use of the plurality of parallel current sources allows the CMOS driver to effectively implement precompensation. The output current of the CMOS driver is a function of a data bit and at least one previous data bit.
摘要翻译：提供了具有预补偿的互补金属氧化物半导体（CMOS）电流模式差分链路。具有预补偿的互补金属氧化物半导体（CMOS）双向电流模式差分链路包括接收数据输入并具有耦合到传输线的输出的CMOS驱动器。 CMOS复制驱动器接收数据输入并提供基本上等于CMOS驱动器输出的复制驱动器输出。 CMOS接收器耦合到传输线和副本驱动器输出。 CMOS接收器从传输线上的信号中减去副本驱动器输出。 CMOS驱动器和CMOS复制驱动器包括多个并联电流源。每个电流源被布置成响应于所施加的控制信号而通过负载发送正或负电流。使用多个并联电流源允许CMOS驱动器有效地实现预补偿。 CMOS驱动器的输出电流是数据位和至少一个先前的数据位的函数。

2. 发明授权

US06603348B1 Center tap level control for current mode differential driver 失效
标题翻译：当前模式差分驱动器的中心抽头级别控制
公开(公告)号：US06603348B1
公开(公告)日：2003-08-05
申请号：US10124966
申请日：2002-04-18
申请人： Curtis Walter Preuss , Charles C. Hanson
发明人： Curtis Walter Preuss , Charles C. Hanson
IPC分类号： G06G712
CPC分类号： H03F3/45179 , H03F2203/45008 , H04L25/0274 , H04L25/0282
摘要： A feedback mechanism is provided to a current mode differential driver by connecting the center tap of a terminator of the output of the driver through feedback resistors to the gates of a positive and a negative current source connected to the driver. Connecting the center tap between the feedback resistors, the average common mode voltage at the output of the differential driver is substantially constant which avoids variations and reflective noise in high speed data transmission that can occur because of manufacturing tolerances.
摘要翻译：通过将驱动器的输出的终端器的中心抽头通过反馈电阻器连接到连接到驱动器的正电流源和负电流源的门，将反馈机制提供给电流模式差分驱动器。连接反馈电阻之间的中心抽头，差分驱动器输出端的平均共模电压基本上是恒定的，避免了由于制造公差而可能发生的高速数据传输中的变化和反射噪声。

3. 发明授权

US06344756B1 Echo cancellation circuit for a Bi-directional current mode link 失效
标题翻译：用于双向电流模式链路的回波消除电路
公开(公告)号：US06344756B1
公开(公告)日：2002-02-05
申请号：US09712594
申请日：2000-11-14
申请人： Delbert Raymond Cecchi , Charles C. Hanson , Curtis Walter Preuss
发明人： Delbert Raymond Cecchi , Charles C. Hanson , Curtis Walter Preuss
IPC分类号： H03K1716
CPC分类号： H04L25/0272 , H04B3/23 , H04L25/0282 , H04L25/0294
摘要： An echo cancellation circuit for neutralizing signal reflections in a differential link interface, and a method for achieving the same. The differential link interface includes a line driver that generates a line drive signal and a replica driver for generating a replica signal that mirrors the line drive signal within the differential link. The echo cancellation circuit includes a slope adjustment device within the replica driver for temporarily altering the slope of the replica line drive signal during a signal reflection at the output of the line driver, such that the amplitude of the replica signal corresponds to the amplitude of the line drive signal during the signal reflection.
摘要翻译：用于中和差分链路接口中的信号反射的回波消除电路及其实现方法。差分链路接口包括生成线路驱动信号的线路驱动器和用于产生反映差分链路内的线路驱动信号的复制信号的副本驱动器。回波消除电路包括复制驱动器内的斜率调整装置，用于在线驱动器的输出处的信号反射期间临时改变复制线驱动信号的斜率，使得复制信号的幅度对应于信号反射期间的线路驱动信号。

4. 发明授权

US06944239B2 CMOS receiver for simultaneous bi-directional links 失效
标题翻译： CMOS接收机用于同时双向链路
公开(公告)号：US06944239B2
公开(公告)日：2005-09-13
申请号：US10037537
申请日：2002-01-02
申请人： Delbert Raymond Cecchi , Charles C. Hanson , Curtis Walter Preuss
发明人： Delbert Raymond Cecchi , Charles C. Hanson , Curtis Walter Preuss
IPC分类号： H04L5/14 , H04L25/02 , H04L25/08 , H04L27/38
CPC分类号： H04L25/0294 , H04L5/1423 , H04L25/0272 , H04L25/0276 , H04L25/0282 , H04L25/085
摘要： Methods and apparatus are provided for implementing a receiver capable of receiving signals in simultaneous bi-directional current mode differential links. The receiver comprises a resistor-summing network and a differential amplifier. The resistor-summing network can also comprise capacitors for the purpose of attenuating high-frequency noise at the differential amplifier. The high-frequency noise can arise from impedance discontinuities in the signal paths or from differences in rising or falling transition times between the data driver and the replica driver in the links.
摘要翻译：提供了用于实现能够在同时双向电流模式差分链路中接收信号的接收机的方法和装置。接收机包括电阻求和网络和差分放大器。电阻求和网络还可以包括用于衰减差分放大器处的高频噪声的电容器。高频噪声可能来自信号路径中的阻抗不连续性或数据驱动器与链路中副本驱动器之间的上升或下降转换时间的差异。

5. 发明授权

US06605997B1 CMOS dual-stage differential receiver-amplifer 失效
标题翻译： CMOS双级差分接收放大器
公开(公告)号：US06605997B1
公开(公告)日：2003-08-12
申请号：US10071170
申请日：2002-02-08
申请人： Charles C. Hanson , Curtis Walter Preuss
发明人： Charles C. Hanson , Curtis Walter Preuss
IPC分类号： H03F345
CPC分类号： H03F3/45475 , H03F3/4521
摘要： A differential receiver-amplifier having reduced input distortion at differential input (positive and negative) terminals to the differential receiver-amplifier. The output from the differential receiver-amplifier is generated from a differential signal detector receiving each differential input from one of a pair of differential amplifiers. While each of the differential amplifiers have two differential input terminals of substantially different input impedances, the first differential input terminal of the first differential amplifier and the second differential input terminal of the second differential amplifier are coupled to the differential positive terminal, and the second differential input terminal of the first differential amplifier and the first differential input terminal of the second differential amplifier are coupled to the differential negative terminal, wherein the resulting input impedance at the differential positive terminal is substantially equal to the resulting input impedance at the differential negative terminal.
摘要翻译：差分接收放大器在差分输入（正极和负极）端子到差分接收放大器的输入失真减小。来自差分接收放大器的输出从接收来自一对差分放大器之一的每个差分输入的差分信号检测器产生。虽然每个差分放大器具有两个基本上不同的输入阻抗的差分输入端子，但是第一差分放大器的第一差分输入端和第二差分放大器的第二差分输入端耦合到差分正极端子，而第二差分放大器第一差分放大器的输入端和第二差分放大器的第一差分输入端耦合到差分负极，其中差分正端子处的所得输入阻抗基本上等于差分负端子处的所得输入阻抗。

6. 发明授权

US06753724B2 Impedance enhancement circuit for CMOS low-voltage current source 失效
标题翻译： CMOS低压电流源阻抗增强电路
公开(公告)号：US06753724B2
公开(公告)日：2004-06-22
申请号：US10132890
申请日：2002-04-25
申请人： Charles C. Hanson
发明人： Charles C. Hanson
IPC分类号： G05F110
CPC分类号： G05F3/262
摘要： Methods and apparatus are provided for implementing a CMOS low voltage current source. The current source embodies a voltage feedback mechanism with a low voltage gain. The current source controls a gate of an output driver FET such that a substantially constant current is maintained, even for a portion of the linear range of operation of the output FET. The current source is suitable for driving transmission lines on printed wiring boards, or other application where the load is relatively heavy or complex, and where operation near the power supply is required.
摘要翻译：提供了实现CMOS低电压电流源的方法和装置。电流源具有低电压增益的电压反馈机构。电流源控制输出驱动器FET的栅极，使得即使对于输出FET的线性操作范围的一部分，保持基本恒定的电流。电流源适用于驱动印刷电路板上的传输线，或负载较重或复杂的其他应用，以及需要靠近电源的操作。

7. 发明授权

US06504417B1 Active trim circuit for CMOS on-chip resistors 失效
标题翻译：用于CMOS片上电阻的主动微调电路
公开(公告)号：US06504417B1
公开(公告)日：2003-01-07
申请号：US09930670
申请日：2001-08-15
申请人： Delbert R. Cecchi , Charles C. Hanson , Curtis W. Preuss
发明人： Delbert R. Cecchi , Charles C. Hanson , Curtis W. Preuss
IPC分类号： H03L500
CPC分类号： H01L27/0802
摘要： A resistance circuit includes an off-chip resistor having a precision resistance; a plurality of on-chip switchable resistors, each of which is capable being switched so as to be coupled in parallel to a nominal resistor; and a resistance comparison unit. The resistance comparison unit compares a plurality of on-chip comparison resistors to the off-chip resistor and couples a number of the on-chip switchable resistors to the nominal resistor so that the combined resistance of the parallel combination of the nominal resistor and the coupled on-chip switchable resistors is within a predetermined range of the precision resistance.
摘要翻译：电阻电路包括具有精度电阻的片外电阻器; 多个片上可切换电阻器，每个电容器能够被切换成与标称电阻器并联耦合; 和电阻比较单元。电阻比较单元将多个片上比较电阻器与片外电阻器进行比较，并将多个片上可切换电阻器耦合到标称电阻器，使得标称电阻器和耦合的并联组合的组合电阻片上可切换电阻在精密电阻的预定范围内。

8. 发明授权

US4831469A Disk drive head retract and motor braking method and apparatus 失效
标题翻译：磁盘驱动头缩回和电机制动方法及装置
公开(公告)号：US4831469A
公开(公告)日：1989-05-16
申请号：US79302
申请日：1987-07-29
申请人： Charles C. Hanson , Michael J. Ross
发明人： Charles C. Hanson , Michael J. Ross
IPC分类号： G11B19/00 , G11B19/04 , G11B19/20 , G11B19/22 , G11B21/12
CPC分类号： G11B19/20 , G11B19/04 , G11B19/22 , G11B21/12
摘要： One phase of a multi-phase spindle motor, normally used to rotate the disk of a disk drive system when power is on, is used to supply power to a capacitor storage circuit when power is lost (turned off or otherwise interrupted). The capacitor storage circuit provides the power to the retract circuit, which retracts the head. The combination of the generator effect of the phase and the capacitor storage circuit provides power to the retract circuit for a time clearly sufficient to reliably retract and lock the head regardless of the bias of the head prior to power loss.Simultaneously with one phase being used to retract the head, the other phases are shorted together to provide regenerative braking. FET drivers, normally used to drive the spindle motor when power is supplied, are used to short out the remaining phases to brake the motor when power is lost.In the preferred embodiment, the capacitor storage circuit is used as a line filter circuit when power is on. Therefore, the major circuit components used for retracting the head and braking the motor upon loss of power (capacitor storage circuit, motor windings, FET drivers) are all used for different purposes when power is on. This efficient use of the same circuitry for multiple purposes results in an efficient, reliable, compact, and relatively inexpensive approach for disk drive head retract and motor braking upon loss of power.

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