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1. 发明申请

US20090206920A1 SOFT-START DEVICE 有权
标题翻译：软起动装置
公开(公告)号：US20090206920A1
公开(公告)日：2009-08-20
申请号：US12388201
申请日：2009-02-18
申请人： Chao-Cheng Lee , Wei-Chou Wang
发明人： Chao-Cheng Lee , Wei-Chou Wang
IPC分类号： G05F1/10
CPC分类号： H02M1/36
摘要： A soft-start device including a current source, a first transistor, and a second transistor is described. The first transistor is coupled to the current source, and an amount of current conducted by the first transistor is determined according to a voltage. The second transistor is also coupled to the current source, and an amount of current conducted by the second transistor is determined according to a fixed bias. An initial voltage value of the voltage is smaller than a voltage value of the fixed bias. However, after a soft start, the voltage value of the first voltage is increased gradually to be larger than the voltage value of the fixed bias, such that the soft start may be implemented smoothly.
摘要翻译：描述了包括电流源，第一晶体管和第二晶体管的软启动器件。第一晶体管耦合到电流源，并且根据电压确定由第一晶体管传导的电流量。第二晶体管还耦合到电流源，并且由第二晶体管传导的电流量根据固定偏压来确定。电压的初始电压值小于固定偏压的电压值。然而，在软启动之后，第一电压的电压值逐渐增加，以使其大于固定偏压的电压值，从而软启动可以平滑地实现。

2. 发明授权

US07948273B2 Soft-start device 有权
标题翻译：软起动装置
公开(公告)号：US07948273B2
公开(公告)日：2011-05-24
申请号：US12388201
申请日：2009-02-18
申请人： Chao-Cheng Lee , Wei-Chou Wang
发明人： Chao-Cheng Lee , Wei-Chou Wang
IPC分类号： G05F1/00 , H03K5/00
CPC分类号： H02M1/36
摘要： A soft-start device including a current source, a first transistor, and a second transistor is described. The first transistor is coupled to the current source, and an amount of current conducted by the first transistor is determined according to a voltage. The second transistor is also coupled to the current source, and an amount of current conducted by the second transistor is determined according to a fixed bias. An initial voltage value of the voltage is smaller than a voltage value of the fixed bias. However, after a soft start, the voltage value of the first voltage is increased gradually to be larger than the voltage value of the fixed bias, such that the soft start may be implemented smoothly.
摘要翻译：描述了包括电流源，第一晶体管和第二晶体管的软启动器件。第一晶体管耦合到电流源，并且根据电压确定由第一晶体管传导的电流量。第二晶体管还耦合到电流源，并且由第二晶体管传导的电流量根据固定偏压来确定。电压的初始电压值小于固定偏压的电压值。然而，在软起动之后，第一电压的电压值逐渐增加，使其大于固定偏压的电压值，从而能够平滑地实现软启动。

3. 发明授权

US08416025B2 Reference assisted control system and method thereof 有权
标题翻译：参考辅助控制系统及其方法
公开(公告)号：US08416025B2
公开(公告)日：2013-04-09
申请号：US12759704
申请日：2010-04-14
申请人： Chia-Liang Lin , Chao-Cheng Lee
发明人： Chia-Liang Lin , Chao-Cheng Lee
IPC分类号： H03L7/087 , H03L7/07 , H03L7/093 , H03L7/22
CPC分类号： H03L7/0805 , H03L7/22
摘要： A reference assisted control system and method thereof are disclosed. The method comprises: receiving a first input signal and a second control signal; generating a first intermediate signal in accordance with a difference between the first input signal and the first output signal; filtering the second control signal to generate a second intermediate signal; performing a weighted sum of the first intermediate signal and the second intermediate signal to generate the control signal; and outputting the first output signal in accordance with the control signal.
摘要翻译：公开了一种参考辅助控制系统及其方法。该方法包括：接收第一输入信号和第二控制信号; 根据第一输入信号和第一输出信号之间的差产生第一中间信号; 对第二控制信号进行滤波以产生第二中间信号; 执行第一中间信号和第二中间信号的加权和以产生控制信号; 并根据控制信号输出第一输出信号。

4. 发明申请

US20120235763A1 EQUALIZER AND EQUALIZING METHOD 有权
标题翻译：均衡和均衡方法
公开(公告)号：US20120235763A1
公开(公告)日：2012-09-20
申请号：US13048877
申请日：2011-03-16
申请人： Chao-Cheng Lee , Tzu-Chien Tzeng
发明人： Chao-Cheng Lee , Tzu-Chien Tzeng
IPC分类号： H04B3/04
CPC分类号： H04B3/04 , H04L25/03885
摘要： An equalizer and a related equalizing method for equalizing signal reflection caused by a stub at a transmitting end are provided. The equalizer includes a summing device and a delay device. The summing device is utilized for adding a feedback delay signal to the input signal to generate the equalized signal. The delay device is coupled to the summing device, and utilized for delaying the equalized signal to generate the feedback delay signal. Wherein the delay device has a variable delay time and the variable delay time is a non-integer multiple of a bit time of the input signal.
摘要翻译：提供了均衡器和相关均衡方法，用于均衡由发送端的短截线引起的信号反射。均衡器包括求和装置和延迟装置。求和装置用于将反馈延迟信号添加到输入信号以产生均衡信号。延迟装置耦合到求和装置，用于延迟均衡信号以产生反馈延迟信号。其中延迟装置具有可变的延迟时间，并且可变延迟时间是输入信号的位时间的非整数倍。

5. 发明申请

US20110089982A1 Fast Lock-In All-Digital Phase-Locked Loop with Extended Tracking Range 有权
标题翻译：具有扩展跟踪范围的快速锁定全数字锁相环
公开(公告)号：US20110089982A1
公开(公告)日：2011-04-21
申请号：US12580556
申请日：2009-10-16
申请人： Hong-Yean Hsieh , Chao-Cheng Lee
发明人： Hong-Yean Hsieh , Chao-Cheng Lee
IPC分类号： H03L7/06
CPC分类号： H03L7/113 , H03L7/091 , H03L7/099 , H03L2207/50
摘要： An apparatus and a method for achieving lock-in of a phase-locked loop (PLL) are disclosed. The PLL receives a reference clock and generates an output clock according to the reference clock. The method comprises: adjusting an oscillation frequency of a controlled oscillator of the PLL close to a desired frequency by counting the number of rising edges of a first clock in a number of a second clock cycles; aligning a rising edge of a third clock and a rising edge of a fourth clock by temporarily changing the oscillation frequency of the digitally controlled oscillator; and locking the phases of the third and fourth clocks by a phase detector of the PLL, wherein the first and the third clocks correspond to the output clock and the second and fourth clocks correspond to the reference clock.
摘要翻译：公开了一种用于实现锁相环（PLL）锁定的装置和方法。 PLL接收参考时钟，并根据参考时钟产生输出时钟。该方法包括：通过以第二时钟周期的数量计数第一时钟的上升沿的数量来调节PLL的受控振荡器的振荡频率接近期望的频率; 通过临时改变数字控制振荡器的振荡频率，对准第三时钟的上升沿和第四时钟的上升沿; 以及通过PLL的相位检测器锁定第三和第四时钟的相位，其中第一和第三时钟对应于输出时钟，第二和第四时钟对应于参考时钟。

6. 发明授权

US07911287B2 Multi-phase layout structure and method 有权
标题翻译：多相布局结构与方法
公开(公告)号：US07911287B2
公开(公告)日：2011-03-22
申请号：US12132829
申请日：2008-06-04
申请人： Chao-Cheng Lee
发明人： Chao-Cheng Lee
IPC分类号： H01P3/02
CPC分类号： G06F17/5077
摘要： The present invention provides a multi-phase layout structure and method. The layout structure comprises: a first layout layer; a second layout layer substantially parallel to the first layout layer; a plurality of traces, each transmitting a signal, and the plurality of signals having a phase difference between each other; wherein a horizontal coupling capacitance is provided between two neighboring traces configured on the same layer of the first layout layer and the second layout layer, a vertical coupling capacitance is provided between two neighboring traces configured on different layers of the first layout layer and the second layout layer, and the plurality of traces have substantially the same total coupling capacitance wherein the total coupling capacitance is defined by the horizontal coupling capacitance and the vertical coupling capacitance.
摘要翻译：本发明提供一种多相布局结构和方法。布局结构包括：第一布局层; 基本上平行于所述第一布局层的第二布局层; 多个迹线，各自发送信号，并且所述多个信号具有彼此之间的相位差; 其中在配置在所述第一布局层和所述第二布局层的相同层上的两个相邻迹线之间提供水平耦合电容，在配置在所述第一布局层和所述第二布局层的不同层上的两个相邻迹线之间提供垂直耦合电容层，并且多个迹线具有基本上相同的总耦合电容，其中总耦合电容由水平耦合电容和垂直耦合电容限定。

7. 发明授权

US07834693B2 Amplifying circuit 有权
标题翻译：放大电路
公开(公告)号：US07834693B2
公开(公告)日：2010-11-16
申请号：US12136428
申请日：2008-06-10
申请人： Chao-Cheng Lee , Yi-Kuang Chen
发明人： Chao-Cheng Lee , Yi-Kuang Chen
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F1/3211 , H03F3/3022 , H03F2203/45091 , H03F2203/45134 , H03F2203/45318
摘要： An amplifier includes: a class AB input stage, receiving an input signal, for generating an inner signal according to the input signal; class AB output stage, includes: a biasing circuit, for providing a first voltage and a second voltage according to the inner signal; and an output stage, for generating an output signal according to the first voltage and the second voltage; wherein a voltage difference between the first voltage and the second voltage generated by the biasing circuit is corresponding to the input signal.
摘要翻译：放大器包括：AB类输入级，接收输入信号，用于根据输入信号产生内部信号; AB类输出级包括：偏置电路，用于根据内部信号提供第一电压和第二电压; 以及输出级，用于根据第一电压和第二电压产生输出信号; 其中由所述偏置电路产生的所述第一电压和所述第二电压之间的电压差对应于所述输入信号。

8. 发明授权

US07692459B2 High resolution delay adjustor 有权
标题翻译：高分辨率延时调节器
公开(公告)号：US07692459B2
公开(公告)日：2010-04-06
申请号：US11878411
申请日：2007-07-24
申请人： Chao-Cheng Lee
发明人： Chao-Cheng Lee
IPC分类号： H03H9/38 , H03M1/12
CPC分类号： H03K5/131 , H03K2005/00117 , H03K2005/00123 , H03K2005/0013 , H03K2005/00143
摘要： A delay adjustor for adjusting the delay time of a signal, the adjustor comprising: a first capacitance unit and a variable capacitance unit serially coupled to the first capacitor wherein the capacitance of the variable capacitance unit is adjusted according to a first control signal and the variable capacitance unit comprises a plurality of second capacitors and at least a first switch coupled to the at least one capacitor of the second capacitors.
摘要翻译：一种用于调整信号的延迟时间的延迟调整器，所述调整器包括：第一电容单元和串联耦合到所述第一电容器的可变电容单元，其中根据第一控制信号调整所述可变电容单元的电容，电容单元包括多个第二电容器和耦合到第二电容器的至少一个电容器的至少第一开关。

9. 发明授权

US07583145B2 Hybrid output stage apparatus and related method thereof 有权
标题翻译：混合输出级装置及其相关方法
公开(公告)号：US07583145B2
公开(公告)日：2009-09-01
申请号：US11829079
申请日：2007-07-26
申请人： Chao-Cheng Lee
发明人： Chao-Cheng Lee
IPC分类号： H03F3/45
CPC分类号： H03F3/301 , H03F1/0261 , H03F1/0277 , H03F1/26 , H03F3/3022 , H03F3/345 , H03F2200/372 , H03F2200/456
摘要： The present invention discloses an apparatus for generating an output signal according to an input signal, including a signal generating circuit for generating a first and a second control signal according to the input signal; a first output stage has a first amplifying configuration for receiving the first control signal; and a second output stage has a second amplifying configuration for receiving the second control signal, wherein the first amplifying configuration is different from the second amplifying configuration.
摘要翻译：本发明公开了一种根据输入信号生成输出信号的装置，包括：信号发生电路，用于根据输入信号产生第一和第二控制信号; 第一输出级具有用于接收第一控制信号的第一放大配置; 并且第二输出级具有用于接收第二控制信号的第二放大配置，其中第一放大配置不同于第二放大配置。

10. 发明授权

US07489185B2 Voltage converting circuit structure 有权
标题翻译：电压转换电路结构
公开(公告)号：US07489185B2
公开(公告)日：2009-02-10
申请号：US11946879
申请日：2007-11-29
申请人： Chao-Cheng Lee
发明人： Chao-Cheng Lee
IPC分类号： G05F1/10
CPC分类号： G05F1/465
摘要： A voltage converting circuit is able to convert an input voltage generated by a system to a voltage capable of being utilized by a chip, avoids the defects of conventional switching regulators and linear regulators, and achieves voltage regulation with extremely high power efficiency and without off-chip components. The voltage converting circuit is adapted in systems with a plurality of similar or identical circuits.
摘要翻译：电压转换电路能够将由系统产生的输入电压转换为能够被芯片利用的电压，避免了传统的开关稳压器和线性稳压器的缺陷，并且以极高的功率效率和无关的电压来实现电压调节，芯片组件。电压转换电路适用于具有多个类似或相同电路的系统。

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