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1. 发明授权

US08245120B2 Power reduced queue based data detection and decoding systems and methods for using such 有权
标题翻译：基于功率减少队列的数据检测和解码系统及使用方法
公开(公告)号：US08245120B2
公开(公告)日：2012-08-14
申请号：US12270713
申请日：2008-11-13
申请人： Changyou Xu , Shaohua Yang , Hao Zhong , Nils Graef , Ching-Fu Wu
发明人： Changyou Xu , Shaohua Yang , Hao Zhong , Nils Graef , Ching-Fu Wu
IPC分类号： G06F11/00
CPC分类号： H04L1/0051 , H04L1/0057 , H04L1/0071
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a variable iteration data processing system is disclosed that includes a first detector, a second detector, a decoder and a unified memory buffer. An input data set is received by the first detector that performs a data detection and provides a first detected data set. The decoder receives a derivative of the first detected data set and performs a decoding operation that yields a decoded data set. In some cases, the derivative of the first detected data set is an interleaved version of the first detected data set. The decoded data set is written to a unified memory buffer. The first decoded data set is retrievable from the unified memory buffer and a derivative thereof is provided to the second detector. In some cases, the derivative of the decoded is a de-interleaved version of the decoded data set. The second detector is operable to perform a data detection on the derivative of the decoded data set and to provide a second detected data set that is written to the unified memory buffer.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，公开了包括第一检测器，第二检测器，解码器和统一存储器缓冲器的可变迭代数据处理系统。由执行数据检测的第一检测器接收输入数据集，并提供第一检测数据集。解码器接收第一检测数据集的导数，并执行产生解码数据集的解码操作。在一些情况下，第一检测数据集的导数是第一检测数据集的交错版本。解码的数据集被写入统一的存储缓冲器。第一解码数据集可从统一存储器缓冲器检索，并且其导数被提供给第二检测器。在一些情况下，解码的导数是解码数据集的解交织版本。第二检测器可操作以对解码数据集的导数执行数据检测，并提供写入统一存储器缓冲器的第二检测数据集。

2. 发明申请

US20100070837A1 Power Reduced Queue Based Data Detection and Decoding Systems and Methods for Using Such 有权
标题翻译：基于功率减少的队列数据检测和解码系统及其使用方法
公开(公告)号：US20100070837A1
公开(公告)日：2010-03-18
申请号：US12270713
申请日：2008-11-13
申请人： Changyou Xu , Shaohua Yang , Hao Zhong , Nils Graef , Ching-Fu Wu
发明人： Changyou Xu , Shaohua Yang , Hao Zhong , Nils Graef , Ching-Fu Wu
IPC分类号： H04L1/00
CPC分类号： H04L1/0051 , H04L1/0057 , H04L1/0071
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a variable iteration data processing system is disclosed that includes a first detector, a second detector, a decoder and a unified memory buffer. An input data set is received by the first detector that performs a data detection and provides a first detected data set. The decoder receives a derivative of the first detected data set and performs a decoding operation that yields a decoded data set. In some cases, the derivative of the first detected data set is an interleaved version of the first detected data set. The decoded data set is written to a unified memory buffer. The first decoded data set is retrievable from the unified memory buffer and a derivative thereof is provided to the second detector. In some cases, the derivative of the decoded is a de-interleaved version of the decoded data set. The second detector is operable to perform a data detection on the derivative of the decoded data set and to provide a second detected data set that is written to the unified memory buffer.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，公开了包括第一检测器，第二检测器，解码器和统一存储器缓冲器的可变迭代数据处理系统。由执行数据检测的第一检测器接收输入数据集，并提供第一检测数据集。解码器接收第一检测数据集的导数，并执行产生解码数据集的解码操作。在一些情况下，第一检测数据集的导数是第一检测数据集的交错版本。解码的数据集被写入统一的存储缓冲器。第一解码数据集可从统一存储器缓冲器检索，并且其导数被提供给第二检测器。在一些情况下，解码的导数是解码数据集的解交织版本。第二检测器可操作以对解码数据集的导数执行数据检测，并提供写入统一存储器缓冲器的第二检测数据集。

3. 发明申请

US20100275096A1 Systems and Methods for Hard Decision Assisted Decoding 有权
标题翻译：硬判决辅助解码的系统和方法
公开(公告)号：US20100275096A1
公开(公告)日：2010-10-28
申请号：US12430927
申请日：2009-04-28
申请人： Hao Zhong , Shaohua Yang , Weijun Tan , Changyou Xu , Yuan Xing Lee
发明人： Hao Zhong , Shaohua Yang , Weijun Tan , Changyou Xu , Yuan Xing Lee
IPC分类号： H03M13/00 , G06F11/00
CPC分类号： H03M13/1111 , H03M13/1108 , H03M13/1128 , H03M13/3715 , H03M13/6331
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a processing loop circuit having a data detector and a soft decision decoder. The data detector provides a detected output, and the soft decision decoder applies a soft decoding algorithm to a derivative of the detected output to yield a soft decision output and a first hard decision output. The systems further include a queuing buffer and a hard decision decoder. The queuing buffer is operable to store the soft decision output, and the hard decision decoder accesses the soft decision output and applies a hard decoding algorithm to yield a second hard decision output. The data detector is operable to perform a data detection on a derivative of the soft decision output if the soft decision decoder and the hard decision decoder fail to converge
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，公开了一种包括具有数据检测器和软判决解码器的处理环路电路的数据处理系统。数据检测器提供检测输出，软判决解码器将软解码算法应用于检测输出的导数，以产生软决策输出和第一硬决策输出。该系统还包括排队缓冲器和硬判决解码器。排队缓冲器可操作以存储软判决输出，并且硬判决解码器访问软决策输出并应用硬解码算法以产生第二硬决策输出。如果软判决解码器和硬判决解码器不能收敛，则数据检测器可操作以对软决策输出的导数执行数据检测

4. 发明授权

US08281214B2 Programmable quasi-cyclic low-density parity check (QC LDPC) encoder for read channel 有权
标题翻译：用于读通道的可编程准循环低密度奇偶校验（QC LDPC）编码器
公开(公告)号：US08281214B2
公开(公告)日：2012-10-02
申请号：US12288221
申请日：2008-10-17
申请人： Shaohua Yang , Changyou Xu , Richard Rauschmayer , Hao Zhong , Weijun Tan
发明人： Shaohua Yang , Changyou Xu , Richard Rauschmayer , Hao Zhong , Weijun Tan
IPC分类号： H03M13/00
CPC分类号： H03M13/05 , G06F11/1008 , H03M13/116 , H03M13/2792
摘要： The present invention is a programmable QC LDPC encoder for encoding user data. The encoder may be configurable for implementation with a read channel. The encoder may include a plurality of barrel shifter circuits. The barrel shifter circuits are configured for generating a plurality of parity bits based on interleaved user bits received by the encoder. The barrel shifter circuits are further configured for outputting the parity bits. The encoder may further include an encoder interleaver memory. The encoder interleaver memory may be communicatively coupled with the barrel shifter circuits and may receive the parity bits output from the barrel shifter circuits. The encoder interleaver may be configured for interleaving the parity bits. Further, the encoder may be configured for outputting the interleaved parity bits to a multiplexer. The barrel shifter circuits may generate the plurality of parity bits via an encoding algorithm: p=u*GT.
摘要翻译：本发明是用于编码用户数据的可编程QC LDPC编码器。编码器可以被配置为用读通道实现。编码器可以包括多个桶形移位器电路。桶形移位器电路被配置为基于由编码器接收的交织的用户比特生成多个奇偶校验位。桶形移位器电路还被配置为输出奇偶校验位。编码器还可以包括编码器交织器存储器。编码器交织器存储器可以与桶形移位器电路通信耦合，并且可以接收从桶形移位器电路输出的奇偶校验位。编码器交织器可以被配置为交织奇偶校验位。此外，编码器可以被配置为将交错的奇偶校验位输出到多路复用器。桶形移位器电路可以通过编码算法生成多个奇偶校验位：p = u * GT。

5. 发明授权

US08149527B2 Systems and methods for reducing attenuation of information derived from a defective medium 有权
标题翻译：用于减少从有缺陷介质得到的信息衰减的系统和方法
公开(公告)号：US08149527B2
公开(公告)日：2012-04-03
申请号：US12111889
申请日：2008-04-29
申请人： Weijun Tan , Hao Zhong , Yuan Xing Lee , Richard Rauschmayer , Shaohua Yang , Harley Burger , Kelly Fitzpatrick , Changyou Xu
发明人： Weijun Tan , Hao Zhong , Yuan Xing Lee , Richard Rauschmayer , Shaohua Yang , Harley Burger , Kelly Fitzpatrick , Changyou Xu
IPC分类号： G11B5/02 , G11B27/36 , G11B5/09
CPC分类号： G11B20/18 , G11B20/10009 , G11B20/10287 , G11B20/10296 , H03M13/3905 , H03M13/3961 , H03M13/4146 , H03M13/6343 , H03M13/658
摘要： Various embodiments of the present invention provide systems and methods for data regeneration. For example, a method for data regeneration is disclosed that includes receiving a data input derived from a medium, determining a media defect corresponding to the data input, and determining an attenuation factor associated with the defective medium. Based at least in part on the determination that the medium is defective, amplifying the data input by a derivative of the attenuation factor to regenerate the data.
摘要翻译：本发明的各种实施例提供了用于数据再生的系统和方法。例如，公开了一种用于数据再生的方法，包括接收从介质导出的数据输入，确定与数据输入相对应的介质缺陷，以及确定与缺陷介质相关联的衰减因子。至少部分地基于介质有缺陷的确定，通过衰减因子的导数来放大输入的数据以再生数据。

6. 发明申请

US20100100788A1 Programmable quasi-cyclic low-density parity check (QC LDPC) encoder for read channel 有权
标题翻译：用于读通道的可编程准循环低密度奇偶校验（QC LDPC）编码器
公开(公告)号：US20100100788A1
公开(公告)日：2010-04-22
申请号：US12288221
申请日：2008-10-17
申请人： Shaohua Yang , Changyou Xu , Richard Rauschmayer , Hao Zhong , Weijun Tan
发明人： Shaohua Yang , Changyou Xu , Richard Rauschmayer , Hao Zhong , Weijun Tan
IPC分类号： H03M13/27 , G06F11/10
CPC分类号： H03M13/05 , G06F11/1008 , H03M13/116 , H03M13/2792
摘要： The present invention is a programmable QC LDPC encoder for encoding user data. The encoder may be configurable for implementation with a read channel. The encoder may include a plurality of barrel shifter circuits. The barrel shifter circuits are configured for generating a plurality of parity bits based on interleaved user bits received by the encoder. The barrel shifter circuits are further configured for outputting the parity bits. The encoder may further include an encoder interleaver memory. The encoder interleaver memory may be communicatively coupled with the barrel shifter circuits and may receive the parity bits output from the barrel shifter circuits. The encoder interleaver may be configured for interleaving the parity bits. Further, the encoder may be configured for outputting the interleaved parity bits to a multiplexer. The barrel shifter circuits may generate the plurality of parity bits via an encoding algorithm: p=u*GT.
摘要翻译：本发明是用于编码用户数据的可编程QC LDPC编码器。编码器可以被配置为用读通道实现。编码器可以包括多个桶形移位器电路。桶形移位器电路被配置为基于由编码器接收的交织的用户比特生成多个奇偶校验位。桶形移位器电路还被配置为输出奇偶校验位。编码器还可以包括编码器交织器存储器。编码器交织器存储器可以与桶形移位器电路通信耦合，并且可以接收从桶形移位器电路输出的奇偶校验位。编码器交织器可以被配置为交织奇偶校验位。此外，编码器可以被配置为将交错的奇偶校验位输出到多路复用器。桶形移位器电路可以通过编码算法生成多个奇偶校验位：p = u * GT。

7. 发明申请

US20090268575A1 Systems and Methods for Reducing Attenuation of Information Derived from a Defective Medium 有权
标题翻译：减少缺陷介质信息衰减的系统和方法
公开(公告)号：US20090268575A1
公开(公告)日：2009-10-29
申请号：US12111889
申请日：2008-04-29
申请人： Weijun Tan , Hao Zhong , Yuan Xing Lee , Richard Rauschmayer , Shaohua Yang , Harley Burger , Kelly Fitzpatrick , Changyou Xu
发明人： Weijun Tan , Hao Zhong , Yuan Xing Lee , Richard Rauschmayer , Shaohua Yang , Harley Burger , Kelly Fitzpatrick , Changyou Xu
IPC分类号： G11B20/18
CPC分类号： G11B20/18 , G11B20/10009 , G11B20/10287 , G11B20/10296 , H03M13/3905 , H03M13/3961 , H03M13/4146 , H03M13/6343 , H03M13/658
摘要： Various embodiments of the present invention provide systems and methods for data regeneration. For example, a method for data regeneration is disclosed that includes receiving a data input derived from a medium, determining a media defect corresponding to the data input, and determining an attenuation factor associated with the defective medium. Based at least in part on the determination that the medium is defective, amplifying the data input by a derivative of the attenuation factor to regenerate the data.
摘要翻译：本发明的各种实施例提供了用于数据再生的系统和方法。例如，公开了一种用于数据再生的方法，包括接收从介质导出的数据输入，确定与数据输入相对应的介质缺陷，以及确定与缺陷介质相关联的衰减因子。至少部分地基于介质有缺陷的确定，通过衰减因子的导数来放大输入的数据以再生数据。

8. 发明申请

US20100042897A1 SELECTIVELY STRENGTHENING AND WEAKENING CHECK-NODE MESSAGES IN ERROR-CORRECTION DECODERS 有权
标题翻译：在错误修正解码器中选择加强和减弱检查节点信息
公开(公告)号：US20100042897A1
公开(公告)日：2010-02-18
申请号：US12538915
申请日：2009-08-11
申请人： Yang Han , Kiran Gunnam , Shaohua Yang , Hao Zhong , Nils Graef , Yuan Xing Lee
发明人： Yang Han , Kiran Gunnam , Shaohua Yang , Hao Zhong , Nils Graef , Yuan Xing Lee
IPC分类号： H03M13/05 , G06F11/07 , G06F11/10
CPC分类号： H03M13/1111 , H03M13/09 , H03M13/1142 , H03M13/3707 , H03M13/3738 , H03M13/3753 , H03M13/451
摘要： In one embodiment, an LDPC decoder has a plurality of check-node units (CNUs) and a controller. Initially, the CNUs generate check-node messages based on an initial offset value selected by the controller. If the decoder converges on a trapping set, then the controller selects new offset values for missatisfied check nodes (MSCs), the locations of which are approximated, and/or unsatisfied check nodes (USCs). In particular, offset values are selected such that (i) the messages corresponding to the MSCs are decreased relative to the messages that would be generated using the initial offset value and/or (ii) the messages corresponding to the USCs are increased relative to the messages that would be generated using the initial offset value. Decoding is then continued for a specified number of iterations to break the trapping set. In other embodiments, the controller selects scaling factors rather than, or in addition to, offset values.
摘要翻译：在一个实施例中，LDPC解码器具有多个校验节点单元（CNU）和控制器。最初，CNU基于由控制器选择的初始偏移值生成校验节点消息。如果解码器收敛于陷阱集合，则控制器为不满意的校验节点（MSC）（其位置近似）和/或不满足的校验节点（USC）选择新的偏移值。特别地，选择偏移值，使得（i）相对于MSC的消息相对于将使用初始偏移值生成的消息减少和/或（ii）相对于USC的消息相对于将使用初始偏移值生成的消息。然后继续解码指定数量的迭代以打破陷阱集。在其他实施例中，控制器选择缩放因子，而不是或附加于偏移值。

9. 发明授权

US08443267B2 Systems and methods for hard decision assisted decoding 有权
标题翻译：硬判决辅助解码的系统和方法
公开(公告)号：US08443267B2
公开(公告)日：2013-05-14
申请号：US12430927
申请日：2009-04-28
申请人： Hao Zhong , Shaohua Yang , Weijun Tan , Changyou Xu , Yuan Xing Lee
发明人： Hao Zhong , Shaohua Yang , Weijun Tan , Changyou Xu , Yuan Xing Lee
IPC分类号： G06F11/00
CPC分类号： H03M13/1111 , H03M13/1108 , H03M13/1128 , H03M13/3715 , H03M13/6331
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a processing loop circuit having a data detector and a soft decision decoder. The data detector provides a detected output, and the soft decision decoder applies a soft decoding algorithm to a derivative of the detected output to yield a soft decision output and a first hard decision output. The systems further include a queuing buffer and a hard decision decoder. The queuing buffer is operable to store the soft decision output, and the hard decision decoder accesses the soft decision output and applies a hard decoding algorithm to yield a second hard decision output. The data detector is operable to perform a data detection on a derivative of the soft decision output if the soft decision decoder and the hard decision decoder fail to converge.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，公开了一种包括具有数据检测器和软判决解码器的处理环路电路的数据处理系统。数据检测器提供检测输出，软判决解码器将软解码算法应用于检测输出的导数，以产生软决策输出和第一硬决策输出。该系统还包括排队缓冲器和硬判决解码器。排队缓冲器可操作以存储软判决输出，并且硬判决解码器访问软决策输出并应用硬解码算法以产生第二硬决策输出。如果软判决解码器和硬判决解码器不能收敛，则数据检测器可操作以对软决策输出的导数执行数据检测。

10. 发明授权

US08245098B2 Selectively strengthening and weakening check-node messages in error-correction decoders 有权
标题翻译：在纠错解码器中选择性地加强和削弱校验节点消息
公开(公告)号：US08245098B2
公开(公告)日：2012-08-14
申请号：US12538915
申请日：2009-08-11
申请人： Yang Han , Kiran Gunnam , Shaohua Yang , Hao Zhong , Nils Graef , Yuan Xing Lee
发明人： Yang Han , Kiran Gunnam , Shaohua Yang , Hao Zhong , Nils Graef , Yuan Xing Lee
IPC分类号： H03M13/00 , G06F11/10
CPC分类号： H03M13/1111 , H03M13/09 , H03M13/1142 , H03M13/3707 , H03M13/3738 , H03M13/3753 , H03M13/451
摘要： In one embodiment, an LDPC decoder has a plurality of check-node units (CNUs) and a controller. Initially, the CNUs generate check-node messages based on an initial offset value selected by the controller. If the decoder converges on a trapping set, then the controller selects new offset values for missatisfied check nodes (MSCs), the locations of which are approximated, and/or unsatisfied check nodes (USCs). In particular, offset values are selected such that (i) the messages corresponding to the MSCs are decreased relative to the messages that would be generated using the initial offset value and/or (ii) the messages corresponding to the USCs are increased relative to the messages that would be generated using the initial offset value. Decoding is then continued for a specified number of iterations to break the trapping set. In other embodiments, the controller selects scaling factors rather than, or in addition to, offset values.
摘要翻译：在一个实施例中，LDPC解码器具有多个校验节点单元（CNU）和控制器。最初，CNU基于由控制器选择的初始偏移值生成校验节点消息。如果解码器收敛于陷阱集合，则控制器为不满意的校验节点（MSC）（其位置近似）和/或不满足的校验节点（USC）选择新的偏移值。特别地，选择偏移值，使得（i）相对于MSC的消息相对于将使用初始偏移值生成的消息减少和/或（ii）相对于USC的消息相对于将使用初始偏移值生成的消息。然后继续解码指定数量的迭代以打破陷阱集。在其他实施例中，控制器选择缩放因子，而不是或附加于偏移值。

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