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    • 1. 发明授权
    • Thin film transistor array panel for liquid crystal display and method for manufacturing the same
    • 用于液晶显示器的薄膜晶体管阵列面板及其制造方法
    • US07990484B2
    • 2011-08-02
    • US11697122
    • 2007-04-05
    • Chang-Hun LeeNam-Hung KimHak-Sun ChangJae-Jin Lyu
    • Chang-Hun LeeNam-Hung KimHak-Sun ChangJae-Jin Lyu
    • G02F1/1343
    • G02F1/136213H01L27/1255
    • In a method of fabricating a liquid crystal display, an insulating layer for storage capacitors is reduced in thickness to increase the storage capacity while maintaining the aperture ratio in a stable manner. A thin film transistor array panel for the liquid crystal display includes an insulating substrate, and a gate line assembly and a storage capacitor line assembly formed on the insulating substrate. The gate line assembly has gate lines and gate electrodes. A gate insulating layer covers the gate line assembly and the storage capacitor line assembly. A semiconductor pattern is formed on the gate insulating layer. A data line assembly and storage capacitor conductive patterns are formed on the gate insulating layer overlaid with the semiconductor pattern. The data line assembly has data lines, source electrodes and drain electrodes. The storage capacitor conductive patterns are partially overlapped with the storage capacitor line assembly to thereby form first storage capacitors. A passivation layer covers the data line assembly, the storage capacitor conductive patterns and the semiconductor pattern. First and second contact holes are formed at the passivation layer while exposing the drain electrodes and the storage capacitor conductive patterns. Pixel electrodes are formed on the passivation layer while being connected to the drain electrodes and the storage capacitor conductive patterns through the first and the second contact holes. The pixel electrodes form second storage capacitors in association with parts of the storage capacitor line assembly.
    • 在制造液晶显示器的方法中,用于存储电容器的绝缘层的厚度减小以增加存储容量,同时以稳定的方式保持开口率。 用于液晶显示器的薄膜晶体管阵列面板包括绝缘基板,以及形成在绝缘基板上的栅极线组件和辅助电容器线组件。 栅极线组件具有栅极线和栅电极。 栅极绝缘层覆盖栅极线组件和存储电容器线组件。 在栅极绝缘层上形成半导体图形。 在与半导体图案重叠的栅极绝缘层上形成数据线组合和存储电容器导电图案。 数据线组件具有数据线,源电极和漏电极。 存储电容器导电图案与辅助电容线组合部分重叠,从而形成第一存储电容器。 钝化层覆盖数据线组件,存储电容器导电图案和半导体图案。 在钝化层处形成第一和第二接触孔,同时使漏电极和存储电容器导电图案暴露。 像素电极形成在钝化层上,同时通过第一和第二接触孔连接到漏电极和存储电容器导电图案。 像素电极与存储电容器线路组件的一部分相关联地形成第二存储电容器。
    • 2. 发明申请
    • Thin Film Transistor Array Panel for Liquid Crystal Display and Method for Manufacturing the Same
    • 用于液晶显示器的薄膜晶体管阵列面板及其制造方法
    • US20070176178A1
    • 2007-08-02
    • US11697174
    • 2007-04-05
    • Chang-Hun LeeNam-Hung KimHak-Sun ChangJae-Jin Lyu
    • Chang-Hun LeeNam-Hung KimHak-Sun ChangJae-Jin Lyu
    • H01L29/04G02F1/136
    • G02F1/13458G02F1/13306G02F1/136213G02F1/136227G02F1/136286G02F2001/136295H01L27/124H01L27/1255
    • In a method of fabricating a liquid crystal display, an insulating layer for storage capacitors is reduced in thickness to increase the storage capacity while maintaining the aperture ratio in a stable manner. A thin film transistor array panel for the liquid crystal display includes an insulating substrate, and a gate line assembly and a storage capacitor line assembly formed on the insulating substrate. The gate line assembly has gate lines and gate electrodes. A gate insulating layer covers the gate line assembly and the storage capacitor line assembly. A semiconductor pattern is formed on the gate insulating layer. A data line assembly and storage capacitor conductive patterns are formed on the gate insulating layer overlaid with the semiconductor pattern. The data line assembly has data lines, source electrodes and drain electrodes. The storage capacitor conductive patterns are partially overlapped with the storage capacitor line assembly to thereby form first storage capacitors. A passivation layer covers the data line assembly, the storage capacitor conductive patterns and the semiconductor pattern. First and second contact holes are formed at the passivation layer while exposing the drain electrodes and the storage capacitor conductive patterns. Pixel electrodes are formed on the passivation layer while being connected to the drain electrodes and the storage capacitor conductive patterns through the first and the second contact holes. The pixel electrodes form second storage capacitors in association with parts of the storage capacitor line assembly.
    • 在制造液晶显示器的方法中,用于存储电容器的绝缘层的厚度减小以增加存储容量,同时以稳定的方式保持开口率。 用于液晶显示器的薄膜晶体管阵列面板包括绝缘基板,以及形成在绝缘基板上的栅极线组件和辅助电容器线组件。 栅极线组件具有栅极线和栅电极。 栅极绝缘层覆盖栅极线组件和存储电容器线组件。 在栅极绝缘层上形成半导体图形。 在与半导体图案重叠的栅极绝缘层上形成数据线组合和存储电容器导电图案。 数据线组件具有数据线,源电极和漏电极。 存储电容器导电图案与辅助电容线组合部分重叠,从而形成第一存储电容器。 钝化层覆盖数据线组件,存储电容器导电图案和半导体图案。 在钝化层处形成第一和第二接触孔,同时使漏电极和存储电容器导电图案暴露。 像素电极形成在钝化层上,同时通过第一和第二接触孔连接到漏电极和存储电容器导电图案。 像素电极与存储电容器线路组件的一部分相关联地形成第二存储电容器。
    • 3. 发明授权
    • Thin film transistor array panel for liquid crystal display and method for manufacturing the same
    • 用于液晶显示器的薄膜晶体管阵列面板及其制造方法
    • US07209192B2
    • 2007-04-24
    • US10432833
    • 2002-02-27
    • Chang-Hun LeeNam-Hung KimHak-Sun ChangJae-Jin Lyu
    • Chang-Hun LeeNam-Hung KimHak-Sun ChangJae-Jin Lyu
    • G02F1/1343
    • G02F1/13458G02F1/13306G02F1/136213G02F1/136227G02F1/136286G02F2001/136295H01L27/124H01L27/1255
    • In a method of fabricating a liquid crystal display, an insulating layer for storage capacitors is reduced in thickness to increase the storage capacity while maintaining the aperture ratio in a stable manner. A thin film transistor array panel for the liquid crystal display includes an insulating substrate, and a gate line assembly and a storage capacitor line assembly formed on the insulating substrate. The gate line assembly has gate lines and gate electrodes. A gate insulating layer covers the gate line assembly and the storage capacitor line assembly. A semiconductor pattern is formed on the gate insulating layer. A data line assembly and storage capacitor conductive patterns are formed on the gate insulating layer overlaid with the semiconductor pattern. The data line assembly has data lines, source electrodes and drain electrodes. The storage capacitor conductive patterns are partially overlapped with the storage capacitor line assembly to thereby form first storage capacitors. A passivation layer covers the data line assembly, the storage capacitor conductive patterns and the semiconductor pattern. First and second contact holes are formed at the passivation layer while exposing the drain electrodes and the storage capacitor conductive patterns. Pixel electrodes are formed on the passivation layer while being connected to the drain electrodes and the storage capacitor conductive patterns through the first and the second contact holes. The pixel electrodes form second storage capacitors in association with parts of the storage capacitor line assembly.
    • 在制造液晶显示器的方法中,用于存储电容器的绝缘层的厚度减小以增加存储容量,同时以稳定的方式保持开口率。 用于液晶显示器的薄膜晶体管阵列面板包括绝缘基板,以及形成在绝缘基板上的栅极线组件和辅助电容器线组件。 栅极线组件具有栅极线和栅电极。 栅极绝缘层覆盖栅极线组件和存储电容器线组件。 在栅极绝缘层上形成半导体图形。 在与半导体图案重叠的栅极绝缘层上形成数据线组合和存储电容器导电图案。 数据线组件具有数据线,源电极和漏电极。 存储电容器导电图案与辅助电容线组合部分重叠,从而形成第一存储电容器。 钝化层覆盖数据线组件,存储电容器导电图案和半导体图案。 在钝化层处形成第一和第二接触孔,同时使漏电极和存储电容器导电图案暴露。 像素电极形成在钝化层上,同时通过第一和第二接触孔连接到漏电极和存储电容器导电图案。 像素电极与存储电容器线路组件的一部分相关联地形成第二存储电容器。
    • 5. 发明授权
    • Thin film transistor array panel for liquid crystal display and method for manufacturing the same
    • US07916227B2
    • 2011-03-29
    • US11697122
    • 2007-04-05
    • Chang-Hun LeeNam-Hung KimHak-Sun ChangJae-Jin Lyu
    • Chang-Hun LeeNam-Hung KimHak-Sun ChangJae-Jin Lyu
    • G02F1/1343
    • In a method of fabricating a liquid crystal display, an insulating layer for storage capacitors is reduced in thickness to increase the storage capacity while maintaining the aperture ratio in a stable manner. A thin film transistor array panel for the liquid crystal display includes an insulating substrate, and a gate line assembly and a storage capacitor line assembly formed on the insulating substrate. The gate line assembly has gate lines and gate electrodes. A gate insulating layer covers the gate line assembly and the storage capacitor line assembly. A semiconductor pattern is formed on the gate insulating layer. A data line assembly and storage capacitor conductive patterns are formed on the gate insulating layer overlaid with the semiconductor pattern. The data line assembly has data lines, source electrodes and drain electrodes. The storage capacitor conductive patterns are partially overlapped with the storage capacitor line assembly to thereby form first storage capacitors. A passivation layer covers the data line assembly, the storage capacitor conductive patterns and the semiconductor pattern. First and second contact holes are formed at the passivation layer while exposing the drain electrodes and the storage capacitor conductive patterns. Pixel electrodes are formed on the passivation layer while being connected to the drain electrodes and the storage capacitor conductive patterns through the first and the second contact holes. The pixel electrodes form second storage capacitors in association with parts of the storage capacitor line assembly.
    • 7. 发明申请
    • Thin Film Transistor Array Panel for Liquid Crystal Display and Method for Manufacturing the Same
    • US20070190703A1
    • 2007-08-16
    • US11697122
    • 2007-04-05
    • Chung-Hun LeeNam-Hung KimHak-Sun ChangJae-Jin Lyu
    • Chung-Hun LeeNam-Hung KimHak-Sun ChangJae-Jin Lyu
    • H01L21/84
    • G02F1/136213H01L27/1255
    • In a method of fabricating a liquid crystal display, an insulating layer for storage capacitors is reduced in thickness to increase the storage capacity while maintaining the aperture ratio in a stable manner. A thin film transistor array panel for the liquid crystal display includes an insulating substrate, and a gate line assembly and a storage capacitor line assembly formed on the insulating substrate. The gate line assembly has gate lines and gate electrodes. A gate insulating layer covers the gate line assembly and the storage capacitor line assembly. A semiconductor pattern is formed on the gate insulating layer. A data line assembly and storage capacitor conductive patterns are formed on the gate insulating layer overlaid with the semiconductor pattern. The data line assembly has data lines, source electrodes and drain electrodes. The storage capacitor conductive patterns are partially overlapped with the storage capacitor line assembly to thereby form first storage capacitors. A passivation layer covers the data line assembly, the storage capacitor conductive patterns and the semiconductor pattern. First and second contact holes are formed at the passivation layer while exposing the drain electrodes and the storage capacitor conductive patterns. Pixel electrodes are formed on the passivation layer while being connected to the drain electrodes and the storage capacitor conductive patterns through the first and the second contact holes. The pixel electrodes form second storage capacitors in association with parts of the storage capacitor line assembly.
    • 10. 发明授权
    • Liquid crystal display with a wide viewing angle using a compensation film
    • 使用补偿膜的宽视角的液晶显示器
    • US07265802B2
    • 2007-09-04
    • US11520540
    • 2006-09-13
    • Jae-Jin LyuChang-Hun LeeHak-Sun Chang
    • Jae-Jin LyuChang-Hun LeeHak-Sun Chang
    • G02F1/1335
    • G02F1/133632G02F1/1395G02F2413/105
    • Disclosed is a liquid crystal display comprising a liquid crystal cell including a pair of transparent substrates, with orientation layers deposited on inner surfaces thereof, and a liquid crystal layer of liquid crystal material injected between the substrates; biaxial compensation films provided on outer surfaces of the liquid crystal cell, the biaxial compensation films including an optical dielectric material layer; and polarization plates provided on outer surfaces of the biaxial compensation films, wherein if “d” is set as a cell gap of the liquid crystal cell, “RLC” is set as a phase retardation value of the liquid crystal layer, an axis perpendicular to planes made by the substrates is set as a z-axis, x-axis and y-axis are formed on a planar surface of the substrates, and refractive indices of molecules comprising the biaxial compensation films in the x, y and z directions are denoted by nx, ny and nz, retardation values (ny−nx)*d and (nz−nx)*d of the biaxial compensation films being respectively within ranges of −30±5 nm and −RLC/4±15 nm.
    • 公开了一种液晶显示器,包括:液晶单元,包括一对透明基板,其内表面上沉积有取向层;以及液晶材料的液晶层,被注入到所述基板之间; 设置在液晶单元的外表面上的双轴补偿膜,所述双轴补偿膜包括光介电材料层; 以及设置在双轴补偿膜的外表面上的偏振板,其中如果将“d”设置为液晶单元的单元间隙,则将“R”LC“设置为相位延迟值 液晶层,垂直于由基板制成的平面的轴被设定为z轴,x轴和y轴形成在基板的平面上,并且包括双轴补偿膜的分子的折射率在 x,y和z方向由nx,ny和nz表示,双轴补偿膜的延迟值(ny-nx)* d和(nz-nx)* d分别在-30±5nm的范围内,-R 4±15nm。