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1. 发明申请

US20070011630A1 METHODS FOR COMPUTING MILLER-FACTOR USING COUPLED PEAK NOISE 失效
标题翻译：使用耦合峰值噪声计算MILLER-FACTOR的方法
公开(公告)号：US20070011630A1
公开(公告)日：2007-01-11
申请号：US11160701
申请日：2005-07-06
申请人： Chandramouli Kashyap , Gregory Schaeffer , David Widiger
发明人： Chandramouli Kashyap , Gregory Schaeffer , David Widiger
IPC分类号： G06F17/50
CPC分类号： G06F17/5031 , G06F17/5036
摘要： A method for computing a Miller-factor compensated for peak noise is provided. The method includes mapping at least two delays as a function of at least two Miller-factors; determining an equation of the function; computing a peak noise; computing a peak delay resulting from the peak noise; and computing the compensated Miller-factor based on the equation and the peak delay. The function can be either a linear function or a non-linear function.
摘要翻译：提供了一种用于计算针对峰值噪声补偿的米勒因子的方法。该方法包括将至少两个延迟映射为至少两个米勒因子的函数; 确定函数的方程; 计算峰值噪声; 计算由峰值噪声引起的峰值延迟; 并根据方程和峰值延迟计算补偿的米勒因子。该函数可以是线性函数或非线性函数。

2. 发明申请

US20060248485A1 PRIORTIZING OF NETS FOR COUPLED NOISE ANALYSIS 失效
标题翻译：联网噪声分析网络优化
公开(公告)号：US20060248485A1
公开(公告)日：2006-11-02
申请号：US10908101
申请日：2005-04-27
申请人： Eric Foreman , Peter Habitz , Gregory Schaeffer
发明人： Eric Foreman , Peter Habitz , Gregory Schaeffer
IPC分类号： G06F17/50
CPC分类号： G06F17/5031
摘要： A system and method of performing microelectronic chip timing analysis, wherein the method comprises identifying failing timing paths in a chip; prioritizing the failing timing paths in the chip according to a size of random noise events occurring in each timing path; attributing a slack credit statistic for all but highest order random noise events occurring in each timing path; and calculating a worst case timing path scenario based on the prioritized failing timing paths and the slack credit statistic. Preferably, the random noise events comprise non-clock events. Moreover, the random noise events may comprise victim/aggressor net groups belonging to different regularity groups. Preferably, the size of random noise events comprises coupled noise delta delays due to the random noise events occurring in the chip.
摘要翻译：一种执行微电子芯片定时分析的系统和方法，其中所述方法包括识别芯片中的故障定时路径; 根据每个定时路径中发生的随机噪声事件的大小对芯片中的故障定时路径进行优先级排序; 归因于每个定时路径中发生的所有但最高阶随机噪声事件的松弛信用统计; 以及基于优先顺序的故障定时路径和松弛信用统计量来计算最坏情况的定时路径情景。优选地，随机噪声事件包括非时钟事件。此外，随机噪声事件可以包括属于不同规则组的受害者/侵略者网络组。优选地，由于芯片中发生的随机噪声事件，随机噪声事件的大小包括耦合的噪声增量延迟。

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