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    • 4. 发明授权
    • Erasable and programmable read only memory (EPROM) cell of an EPROM device and method of manufacturing a semiconductor device having the EPROM cell
    • EPROM装置的可擦除可编程只读存储器(EPROM)单元和具有EPROM单元的半导体器件的制造方法
    • US07202522B2
    • 2007-04-10
    • US10973894
    • 2004-10-26
    • Ki-Hyung LeeSeung-Han Yoo
    • Ki-Hyung LeeSeung-Han Yoo
    • H01L21/70
    • H01L27/115H01L27/11526H01L27/11546
    • Provided is an erasable and programmable read only memory (EPROM) device in which a plasma enhanced oxide (PEOX) film covers an upper surface of a floating gate in a single poly one time programmable (OTP) cell and a method of manufacturing a semiconductor device having the same. The semiconductor device comprises a substrate having an OTP cell region, on which a floating gate is formed for making an OTP cell transistor, and a main chip region, on which a gate of a transistor is formed. A PEOX film is formed on the OTP cell region and the main chip region. The PEOX film covers the floating gate in a close state and covers the gate by a predetermined distance. A silicon oxy nitride (SiON) film is interposed between the gate and the PEOX film in the main chip region.
    • 提供了一种可擦除和可编程的只读存储器(EPROM)器件,其中等离子体增强氧化物(PEOX)膜覆盖单个多时间可编程(OTP)单元中的浮动栅极的上表面,以及制造半导体器件的方法 有同样的 半导体器件包括具有OTP单元区域的衬底,在其上形成用于形成OTP单元晶体管的浮动栅极和形成晶体管的栅极的主芯片区域。 在OTP单元区域和主芯片区域上形成PEOX膜。 PEOX膜在关闭状态下覆盖浮动栅极并且将栅极覆盖预定距离。 在主芯片区域中的栅极和PEOX膜之间插入有氮氧化硅(SiON)膜。
    • 6. 发明授权
    • Method of manufacturing a semiconductor device having a one time programmable (OTP) erasable and programmable read only memory (EPROM) cell
    • 制造具有一次可编程(OTP)可擦除和可编程只读存储器(EPROM)单元的半导体器件的方法
    • US07491657B2
    • 2009-02-17
    • US11681429
    • 2007-03-02
    • Ki-Hyung LeeSeung-Han Yoo
    • Ki-Hyung LeeSeung-Han Yoo
    • H01L21/70
    • H01L27/115H01L27/11526H01L27/11546
    • Provided is an erasable and programmable read only memory (EPROM) device in which a plasma enhanced oxide (PEOX) film covers an upper surface of a floating gate in a single poly one time programmable (OTP) cell and a method of manufacturing a semiconductor device having the same. The semiconductor device comprises a substrate having an OTP cell region, on which a floating gate is formed for making an OTP cell transistor, and a main chip region, on which a gate of a transistor is formed. A PEOX film is formed on the OTP cell region and the main chip region. The PEOX film covers the floating gate in a close state and covers the gate by a predetermined distance. A silicon oxy nitride (SiON) film Is interposed between the gate and the PEOX film in the main chip region.
    • 提供了一种可擦除和可编程的只读存储器(EPROM)器件,其中等离子体增强氧化物(PEOX)膜覆盖单个多时间可编程(OTP)单元中的浮动栅极的上表面,以及制造半导体器件的方法 有同样的 半导体器件包括具有OTP单元区域的衬底,在其上形成用于制造OTP单元晶体管的浮置栅极和形成晶体管的栅极的主芯片区域。 在OTP单元区域和主芯片区域上形成PEOX膜。 PEOX膜在关闭状态下覆盖浮动栅极并且将栅极覆盖预定距离。 在主芯片区域中的栅极和PEOX膜之间插入氮氧化硅(SiON)膜。