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1. 发明授权

US4962342A Dynamic synapse for neural network 失效
标题翻译：神经网络的动态突触
公开(公告)号：US4962342A
公开(公告)日：1990-10-09
申请号：US347837
申请日：1989-05-04
申请人： Carver A. Mead , Timothy P. Allen , Federico Faggin
发明人： Carver A. Mead , Timothy P. Allen , Federico Faggin
IPC分类号： G06N3/063 , G11C27/02
CPC分类号： G11C27/026 , G06N3/063 , G06N3/0635
摘要： An electronic circuit is disclosed having a sample/hold amplifier connected to an adaptive amplifier. A plurality of such electronic circuits may be configured in an array of rows and columns. An input voltage vector may be compared with an analog voltage vector stored in a row or column of the array and the stored vector closest to the applied input vector may be identified and further processed. The stored analog value may be read out of the synapse by applying a voltage to a read line. An array of the readable synapses may be provided and used in conjunction with a dummy synapse to compensate for an error offset introduced by the operating characteristics of the synapses.
摘要翻译：公开了一种具有连接到自适应放大器的采样/保持放大器的电子电路。多个这样的电子电路可以被配置成行和列的阵列。可以将输入电压矢量与存储在阵列的行或列中的模拟电压矢量进行比较，并且可以识别并进一步处理最接近所施加的输入向量的存储向量。存储的模拟值可以通过向读取线施加电压而从突触中读出。可以提供可读突触的阵列并结合虚拟突触使用以补偿由突触的操作特征引入的误差偏移。

2. 发明授权

US5120996A Synaptic element and array 失效
标题翻译：突触元素和数组
公开(公告)号：US5120996A
公开(公告)日：1992-06-09
申请号：US535283
申请日：1990-06-06
申请人： Carver A. Mead , Federico Faggin , Timothy P. Allen , Janeen D. W. Anderson
发明人： Carver A. Mead , Federico Faggin , Timothy P. Allen , Janeen D. W. Anderson
IPC分类号： G06N3/063 , G11C15/04 , G11C27/02
CPC分类号： G11C27/024 , G06N3/063 , G11C11/54
摘要： An electronic circuit is disclosed having a sample/hold amplifier connected to an adaptive amplifier. A plurality of such electronic cicuits may be configured in an array of rows and columns. An input voltage vector may be compared with an analog voltage vector stored in a row or column of the array and the stored vector closest to the applied input vector may be identified and further processed.
摘要翻译：公开了一种具有连接到自适应放大器的采样/保持放大器的电子电路。多个这样的电子线路可以被配置成行和列的阵列。可以将输入电压矢量与存储在阵列的行或列中的模拟电压矢量进行比较，并且可以识别并进一步处理最接近所施加的输入向量的存储向量。

3. 发明授权

US5083044A Synaptic element and array 失效
标题翻译：突触元素和数组
公开(公告)号：US5083044A
公开(公告)日：1992-01-21
申请号：US357520
申请日：1989-05-25
申请人： Carver A. Mead , Timothy P. Allen , Federico Faggin , Janeen D. W. Anderson
发明人： Carver A. Mead , Timothy P. Allen , Federico Faggin , Janeen D. W. Anderson
IPC分类号： G06N3/063 , G11C15/04 , G11C27/02
CPC分类号： G11C15/04 , G06N3/063 , G11C27/02
摘要： An electronic circuit is disclosed having a sample/hold amplifier connected to an adaptive amplifier. A plurality of such electronic circuits may be configured in an array of rows and columns. An input voltage vector may be compared with an analog voltage vector stored in a row or column of the array and the stored vector closest to the applied input vector may be identified and further processed.
摘要翻译：公开了一种具有连接到自适应放大器的采样/保持放大器的电子电路。多个这样的电子电路可以被配置成行和列的阵列。可以将输入电压矢量与存储在阵列的行或列中的模拟电压矢量进行比较，并且可以识别并进一步处理最接近所施加的输入向量的存储向量。

4. 发明授权

US5331215A Electrically adaptable neural network with post-processing circuitry 失效
标题翻译：具有后处理电路的电适应神经网络
公开(公告)号：US5331215A
公开(公告)日：1994-07-19
申请号：US922535
申请日：1992-07-30
申请人： Timothy P. Allen , Janeen D. W. Anderson , Carver A. Mead , Federico Faggin , John C. Platt , Michael F. Wall
发明人： Timothy P. Allen , Janeen D. W. Anderson , Carver A. Mead , Federico Faggin , John C. Platt , Michael F. Wall
IPC分类号： G06N3/063 , H01L27/06 , H03F1/02 , H03F1/30 , H03F3/45 , H03K19/0948
CPC分类号： H03F1/303 , G06N3/063 , H01L27/0629 , H03F1/0261 , H03F3/45479 , H03F3/45753 , H03F3/45977
摘要： A synaptic array according to the present invention comprises a plurality of electrically-adaptable elements. Electrons may be placed onto and removed from a floating node in each electrically adaptable element associated with at least one MOS insulated gate field effect transistor, usually the gate of the transistor, in an analog manner, by application of first and second electrical control signals generated in response to an adapt signal. The inputs to all synaptic elements in a row are connected to a common row input line. Adapt inputs to all synaptic elements in a column are connected together to a common column adapt line. The current supplied to all amplifiers in a column is commonly provided by a sense line. In order to adapt the synaptic elements in the M row by N column matrix of the present invention, the voltages to which a given column n of the matrix is to be adapted are placed onto the input voltage lines, and the synaptic elements in column n are then simultaneously adapted by assertion of an adapt signal on the adapt line for column n. The vectors of input voltages for adapting successive columns may be placed sequentially onto the row input voltage lines and used to adapt the columns of synaptic elements by assertion of the adapt signals on the appropriate column adapt lines until the entire array is electrically adapted. After each synaptic element has been adapted, the current flowing through it will be maximized when the voltage at the input of the synaptic element equals the voltage to which the synaptic element has been adapted. An electrically adaptable winner-take-all circuit has its inputs connected to the column-sense lines of the array.
摘要翻译：根据本发明的突触阵列包括多个电适应元件。可以通过施加产生的第一和第二电控制信号将电子放置在与至少一个MOS绝缘栅场效应晶体管（通常是晶体管的栅极）相关联的每个电适应元件中的浮动节点上并从其移除，响应于适配信号。对一行中所有突触元素的输入连接到公共行输入行。将输入到列中的所有突触元素的调整连接到公共列适应线。提供给列中所有放大器的电流通常由感测线提供。为了适应本发明的M行×N列矩阵中的突触元素，要将矩阵的给定列n适应的电压放置在输入电压线上，并且列n中的突触元素然后通过在第n列的适应线上断言适配信号同时进行调整。用于适配连续列的输入电压的矢量可以顺序地放置在行输入电压线上，并且用于通过在适当的列适配线上断言适配信号来适应突触元件的列，直到整个阵列电气适配。在每个突触元件已经适应之后，当突触元件的输入端的电压等于突触元件适应的电压时，流过它的电流将被最大化。电气适应性的胜者总线电路的输入连接到阵列的列感测线。

5. 发明授权

US5488204A Paintbrush stylus for capacitive touch sensor pad 失效
标题翻译：用于电容式触摸传感器垫的画笔触控笔
公开(公告)号：US5488204A
公开(公告)日：1996-01-30
申请号：US324438
申请日：1994-10-17
申请人： Carver A. Mead , Ralph Wolf , Timothy P. Allen
发明人： Carver A. Mead , Ralph Wolf , Timothy P. Allen
IPC分类号： G06F3/023 , G06F3/033 , G06F3/041 , G06F3/044 , G06F3/048 , G08C21/00
CPC分类号： G06F3/04855 , G06F3/041 , G06F3/044 , G06F3/0488 , G06F3/04883 , G06F3/04892 , G06K9/00335
摘要： A proximity sensor system includes a touch-sensor pad with a sensor matrix array having a characteristic capacitance on horizontal and vertical conductors connected to sensor pads. The capacitance changes as a function of the proximity of an object or objects to the sensor matrix. The change in capacitance of each node in both the X and Y directions of the matrix due to the approach of an object is converted to a set of voltages in the X and Y directions. These voltages are processed by circuitry to develop electrical signals representative of the centroid of the profile of the object, i.e, its position in the X and Y dimensions. Noise reduction and background level setting techniques inherently available in the architecture are employed. A conductive paintbrush-type stylus is used to produce paint-like strokes on a display associated with the touch-sensor pad.
摘要翻译：接近传感器系统包括具有传感器矩阵阵列的触摸传感器焊盘，该传感器阵列在连接到传感器焊盘的水平和垂直导体上具有特征电容。电容根据物体或传感器矩阵的接近度而变化。由于物体的接近，矩阵的X和Y方向上的每个节点的电容的变化被转换成在X和Y方向上的一组电压。这些电压由电路处理以产生表示物体轮廓的质心的电信号，即其在X和Y尺寸中的位置。采用本构架中固有可用的降噪和背景设置技术。导电画笔型触笔用于在与触摸传感器垫相关联的显示器上产生油漆状笔触。

6. 发明授权

US5166562A Writable analog reference voltage storage device 失效
标题翻译：可写模拟参考电压存储器件
公开(公告)号：US5166562A
公开(公告)日：1992-11-24
申请号：US697410
申请日：1991-05-09
申请人： Timothy P. Allen , Adam K. Greenblatt , Carver A. Mead , Janeen D. W. Anderson
发明人： Timothy P. Allen , Adam K. Greenblatt , Carver A. Mead , Janeen D. W. Anderson
IPC分类号： G05F1/46 , G05F3/24 , G11C5/14 , G11C11/56 , G11C27/00
CPC分类号： G05F1/468 , G05F3/24 , G11C11/56 , G11C11/5621 , G11C27/005 , G11C5/147 , G11C16/30 , G11C2211/5634 , G11C7/16
摘要： A circuit for generating N analog voltage signals for reference or bias use employs N analog floating gate storage devices. Electron injection circuitry is provided for injecting electrons on to and a tunneling structure is provided for removing electrons from the floating gate of each floating gate storage device. A follower amplifier is connected to each floating gate storage device and drives an analog output voltage bus. A capacitor is connected to each analog output storage bus. An analog pass gate is connected between each analog output voltage bus and a common monitor/dynamic load bus. Each analog pass gate is driven by a strobe signal.
摘要翻译：用于产生用于参考或偏置使用的N个模拟电压信号的电路使用N个模拟浮动栅极存储装置。提供电子注入电路用于将电子注入到上面，并且提供隧道结构用于从每个浮动栅极存储装置的浮动栅极去除电子。跟随放大器连接到每个浮动栅极存储装置并驱动模拟输出电压总线。电容器连接到每个模拟输出存储总线。每个模拟输出电压总线和公共监视器/动态负载总线之间连接一个模拟传输门。每个模拟传输门由选通信号驱动。

7. 发明授权

US4935702A Subthreshold CMOS amplifier with offset adaptation 失效
标题翻译：具有偏移适应的亚阈值CMOS放大器
公开(公告)号：US4935702A
公开(公告)日：1990-06-19
申请号：US282176
申请日：1988-12-09
申请人： Carver A. Mead , Timothy P. Allen
发明人： Carver A. Mead , Timothy P. Allen
IPC分类号： G06N3/063 , H01L27/06 , H03F1/02 , H03F1/30 , H03F3/45
CPC分类号： G06N3/063 , H01L27/0629 , H03F1/0261 , H03F1/303 , H03F3/45753 , H03F3/45977
摘要： An integrated circuit amplifier having a random input offset voltage is adaptable such that the input offset voltage may be cancelled out. An input node is a floating input node and is coupled to a source of input signal by a first capacitor. A second capacitor is connected between the output of the amplifier and the floating node. An ultraviolet window above the second capacitor allows the floating node to be charged, by the application of ultraviolet light, to a voltage which effectively cancels the input offset voltage.
摘要翻译：具有随机输入偏移电压的集成电路放大器是可适应的，使得可以抵消输入偏移电压。输入节点是浮动输入节点，并且通过第一电容器耦合到输入信号源。第二电容器连接在放大器的输出端和浮动节点之间。第二电容器上方的紫外线窗口允许通过施加紫外线将浮动节点充电到有效地抵消输入偏移电压的电压。

8. 发明授权

US5248873A Integrated device for recognition of moving objects 失效
标题翻译：用于识别移动物体的集成装置
公开(公告)号：US5248873A
公开(公告)日：1993-09-28
申请号：US939108
申请日：1992-09-01
申请人： Timothy P. Allen , Federico Faggin
发明人： Timothy P. Allen , Federico Faggin
IPC分类号： G06K9/78
CPC分类号： G06K9/78
摘要： A moving object classifier is integrated onto a single integrated circuit chip and includes a retina comprising a two-dimensional array of photosensors upon which the image of the object of interest is focused. A position classifier receives inputs from the retina and determines where in the retina the image of an object is located. An object classifier receives inputs from the portion of interest of the retina and computes the degree of membership of the image to each class to be classified and determines which class has the largest membership function. A scan controller controlled by the position classifier limits the object classifier data to the portion of the retinal image which contains the object. An interface controller interfaces the other elements on the integrated circuit chip with a microcontroller, which comprises a standard CPU, memory and input/output lines interfacing to the interface controller.
摘要翻译：移动物体分类器被集成到单个集成电路芯片上，并且包括视网膜，其包括感兴趣对象的图像在其上聚焦的光电传感器的二维阵列。位置分类器从视网膜接收输入，并确定视网膜中物体的图像位于何处。对象分类器接收来自视网膜感兴趣部分的输入，并计算图像的隶属度到要分类的每个类，并确定哪个类具有最大的隶属函数。由位置分类器控制的扫描控制器将对象分类器数据限制为包含对象的视网膜图像的部分。接口控制器将集成电路芯片上的其他元件与微控制器接口，微控制器包括与接口控制器接口的标准CPU，存储器和输入/输出线。

9. 发明授权

US5629891A Writable analog reference voltage storage device 失效
标题翻译：可写模拟参考电压存储器件
公开(公告)号：US5629891A
公开(公告)日：1997-05-13
申请号：US622763
申请日：1996-03-25
申请人： John LeMoncheck , Timothy P. Allen , Gunter Steinbach , Carver A. Mead
发明人： John LeMoncheck , Timothy P. Allen , Gunter Steinbach , Carver A. Mead
IPC分类号： G05F1/46 , G05F3/24 , G11C5/14 , G11C11/56 , G11C27/00 , B11C16/04
CPC分类号： G05F3/247 , G05F1/468 , G05F3/24 , G11C11/56 , G11C11/5621 , G11C27/005 , G11C5/147 , G11C16/30 , G11C2211/5634 , G11C7/16
摘要： A circuit for generating N analog voltage signals for reference or bias use employs N analog floating gate storage devices. Circuitry is provided so that all floating gate storage devices can be programmed to their target voltages individually or in parallel. Electron injection circuitry is provided for injecting electrons on to and a tunneling structure is provided for removing electrons from the floating gate of each floating gate storage device. A transistor structure with a lightly doped drain is provided for control of the tunneling structure. A capacitor is connected to each floating gate node to provide control of the injection structure. A dynamic analog storage element is provided to store the target voltage for the floating gate storage device. A comparator is provided to monitor the floating gate voltage and target voltage and control tunneling and injection. A digital storage device is provided to statically store the output of the comparator. During normal operation of the voltage reference circuit, the voltage comparator is configured as a follower amplifier to buffer the analog voltage output. During normal operation of the bias reference circuit, the current comparator is configured as a current mirror to buffer the analog current output.
摘要翻译：用于产生用于参考或偏置使用的N个模拟电压信号的电路使用N个模拟浮动栅极存储装置。提供电路，使得所有浮动栅极存储装置可以单独地或并行地编程到它们的目标电压。提供电子注入电路用于将电子注入到上面，并且提供隧道结构用于从每个浮动栅极存储装置的浮动栅极去除电子。提供了具有轻掺杂漏极的晶体管结构，用于控制隧道结构。电容器连接到每个浮动栅极节点以提供对注入结构的控制。提供动态模拟存储元件以存储浮动栅极存储装置的目标电压。提供比较器来监控浮栅电压和目标电压，并控制隧道和注入。提供数字存储设备以静态存储比较器的输出。在电压基准电路正常工作期间，电压比较器被配置为跟随放大器以缓冲模拟电压输出。在偏置参考电路的正常工作期间，电流比较器被配置为电流镜来缓冲模拟电流输出。

10. 发明授权

US5160899A Adaptable MOS current mirror 失效
标题翻译：适应MOS电流镜
公开(公告)号：US5160899A
公开(公告)日：1992-11-03
申请号：US781503
申请日：1991-10-22
申请人： Janeen D. W. Anderson , Carver A. Mead , Timothy P. Allen , Michael F. Wall
发明人： Janeen D. W. Anderson , Carver A. Mead , Timothy P. Allen , Michael F. Wall
IPC分类号： G06N3/063 , H01L27/06 , H03F1/02 , H03F1/30 , H03F3/45
CPC分类号： G06N3/063 , H01L27/0629 , H03F1/0261 , H03F1/303 , H03F3/45479 , H03F3/45753 , H03F3/45977
摘要： An adaptable current mirror includes first and second MOS transistors. The first MOS transistor has its gate connected to its drain. A MOS capacitor structure is connected in series between the gate of the first MOS transistor and the gate of the second MOS transistor. Electrons may be placed onto and removed in an analog manner from a floating node associated with the second MOS transistor, usually the gate of the transistor, by application of first and second electrical control signals. A first electrical control signal controls the injection of electrons onto the floating node from an electron injection structure and the second electrical control signal controls the removal of electrons from the floating node by an electron removal structure. A plurality of adaptable current mirrors communicating with a plurality of current-carrying lines may be employed for indicating the output of the one of the plurality of current-carrying lines through which the most current is flowing.
摘要翻译：适应电流镜包括第一和第二MOS晶体管。第一个MOS晶体管的栅极连接到其漏极。 MOS电容器结构串联连接在第一MOS晶体管的栅极和第二MOS晶体管的栅极之间。电子可以通过施加第一和第二电气控制信号，以模拟方式从与第二MOS晶体管（通常是晶体管的栅极）相关联的浮动节点放置和去除。第一电控信号控制电子从电子注入结构注入到浮动节点上，第二电控信号通过电子去除结构控制从浮动节点去除电子。可以采用与多个载流线路通信的多个适应电流镜，以指示最流动的多个通电线路中的一个的输出。

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