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1. 发明授权

US08926888B2 Fluorinated silazane release agents in nanoimprint lithography 有权
标题翻译：氟化硅氮烷脱模剂纳米压印光刻
公开(公告)号：US08926888B2
公开(公告)日：2015-01-06
申请号：US13404083
申请日：2012-02-24
申请人： Carlton Grant Willson , Tsuyoshi Ogawa , Michael W. Lin , Daniel J. Hellebusch , B. Michael Jacobsson , William K. Bell
发明人： Carlton Grant Willson , Tsuyoshi Ogawa , Michael W. Lin , Daniel J. Hellebusch , B. Michael Jacobsson , William K. Bell
IPC分类号： G03F7/004 , G03F7/00 , B82Y10/00 , B82Y40/00 , B29C35/08
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00
摘要： An imprint lithography release agent having general formula (1): where R1 represents H or CH3, n is an integer from 1 to 5, and m is an integer from 1 to 40. Fluorinated silazanes of general formula (1) can be used to form a release layer on an imprint lithography template, added to an imprint lithography resist, or both.
摘要翻译：具有通式（1）的压印光刻剥离剂：其中R 1表示H或CH 3，n是1至5的整数，m是1至40的整数。通式（1）的氟化硅氮烷可用于在压印光刻模板上形成释放层，添加到压印光刻抗蚀剂或两者。

2. 发明申请

US20120217676A1 FLUORINATED SILAZANE RELEASE AGENTS IN NANOIMPRINT LITHOGRAPHY 有权
标题翻译： NANOIMPRINT LITHOGRAPHY中的氟化硅烷释放剂
公开(公告)号：US20120217676A1
公开(公告)日：2012-08-30
申请号：US13404083
申请日：2012-02-24
申请人： Carlton Grant Willson , Tsuyoshi Ogawa , Michael W. Lin , Daniel J. Hellebusch , B. Michael Jacobsson , William K. Bell
发明人： Carlton Grant Willson , Tsuyoshi Ogawa , Michael W. Lin , Daniel J. Hellebusch , B. Michael Jacobsson , William K. Bell
IPC分类号： B29C59/02
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00
摘要： An imprint lithography release agent having general formula (1): where R1 represents H or CH3, n is an integer from 1 to 5, and m is an integer from 1 to 40. Fluorinated silazanes of general formula (1) can be used to form a release layer on an imprint lithography template, added to an imprint lithography resist, or both.
摘要翻译：具有通式（1）的压印光刻剥离剂：其中R 1表示H或CH 3，n是1至5的整数，m是1至40的整数。通式（1）的氟化硅氮烷可用于在压印光刻模板上形成释放层，添加到压印光刻抗蚀剂或两者。

3. 发明授权

US09156863B2 Branched siloxanes and methods for synthesis 有权
标题翻译：支链硅氧烷和合成方法
公开(公告)号：US09156863B2
公开(公告)日：2015-10-13
申请号：US13577004
申请日：2011-02-16
申请人： C. Grant Willson , Tsuyoshi Ogawa , B. Michael Jacobsson
发明人： C. Grant Willson , Tsuyoshi Ogawa , B. Michael Jacobsson
IPC分类号： C07F7/08 , C07D303/12 , C07D301/00
CPC分类号： C07F7/0881 , C07D301/00 , C07D303/12 , C07F7/0838 , C07F7/0874 , C07F7/0878 , C07F7/0879 , C07F7/0889 , C07F7/0896 , C09D163/00 , G03F7/0002 , H01L21/31055
摘要： The present invention describes branched and functionalized siloxanes and methods for making such compounds. The compounds have a variety of uses. One preferred application is as novel planarizing material for lithography, in which case functionalized branched siloxane, such as an epoxy-modified branched siloxane is particularly useful.
摘要翻译：本发明描述了支链和官能化硅氧烷及其制备方法。这些化合物具有多种用途。一种优选的应用是用于光刻的新型平面化材料，在这种情况下，官能化的支化硅氧烷，例如环氧改性的支化硅氧烷是特别有用的。

4. 发明授权

US07395225B2 Custom-made product sales system and method 有权
标题翻译：定制产品销售体系和方法
公开(公告)号：US07395225B2
公开(公告)日：2008-07-01
申请号：US10204665
申请日：2001-12-25
申请人： Tetsuji Fuwa , Tsuyoshi Ogawa
发明人： Tetsuji Fuwa , Tsuyoshi Ogawa
IPC分类号： G06Q30/00 , G06F17/30
CPC分类号： G06Q30/06 , G06Q30/0621 , G06Q30/0643
摘要： As a server computer receives, in a communication portion, data on an appearance of a custom-made product, such as a stamp, from a purchaser computer, a preview image creating portion creates smaller-sized preview image data than normal image data to be used when a stamp is produced by a stamp producing device connected to a supplier computer. The created preview image data is transmitted from the communication portion to the purchaser computer and the supplier computer, as required, and displayed on respective browsers. Therefore, the purchaser of the custom-made product can be promptly view the preview image of the custom-made product.
摘要翻译：当服务器计算机在通信部分中接收来自购买者计算机的定制产品（例如邮票）的外观的数据时，预览图像创建部分产生比正常图像数据更小尺寸的预览图像数据当由连接到供应商计算机的印章制作装置制作印章时使用。所创建的预览图像数据根据需要从通信部分发送到购买者计算机和供应商计算机，并且显示在相应的浏览器上。因此，定制产品的购买者可以及时查看定制产品的预览图像。

5. 发明授权

US07244656B2 Thin film circuit board device and method for manufacturing the same 失效
标题翻译：薄膜电路板装置及其制造方法
公开(公告)号：US07244656B2
公开(公告)日：2007-07-17
申请号：US10965071
申请日：2004-10-14
申请人： Tsuyoshi Ogawa
发明人： Tsuyoshi Ogawa
IPC分类号： H01L21/20
CPC分类号： H01L23/49894 , H01L23/3121 , H01L23/3677 , H01L23/498 , H01L23/49822 , H01L24/48 , H01L25/16 , H01L2224/16 , H01L2224/48227 , H01L2224/73253 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/12042 , H01L2924/16152 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025 , H05K1/16 , H05K1/162 , H05K1/167 , H05K3/062 , H05K3/067 , H05K3/388 , H05K3/4602 , H05K3/4644 , H05K2201/0317 , H05K2201/0338 , H05K2201/09509 , H05K2203/0315 , H05K2203/0361 , H05K2203/1453 , Y10S438/957 , H01L2924/00 , H01L2224/0401 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The present invention relates to a thin film circuit board device having passive elements in wiring layers. The thin film circuit board device includes a base board (2) and a circuit part (3) including insulating layers (11) and (16) and pattern wiring (14) and (17) formed on a build-up forming surface (2a). On the first insulating layer (11), a receiving electrode part (21) is formed and the passive elements electrically connected to the receiving electrode part (21) are formed. In the circuit part (3), a substrate titanium film and a substrate film are laminated so as to cover the receiving electrode part (21) and the passive elements respectively. The substrate film and the substrate titanium film in areas in which a metallic film is not formed are etched through the metallic film serving as the first pattern wiring (14) formed on the substrate film as a mask. Thus, a substrate layer (23) and a substrate titanium layer (22) are formed. Consequently, the substrate titanium film serving as the substrate titanium layer (22) prevents the corrosion of the receiving electrode part and the respective passive elements due to etching liquid to form the passive elements with high performance.
摘要翻译：本发明涉及一种在布线层中具有无源元件的薄膜电路板器件。薄膜电路板装置包括基板（2）和包括绝缘层（11）和（16）的电路部分（3）和形成在积层形成表面（2）上的图案布线（14）和（17）一个）。在第一绝缘层（11）上，形成接收电极部（21），并且形成与接收电极部（21）电连接的无源元件。在电路部分（3）中，层叠基板钛膜和基板膜以覆盖接收电极部分（21）和无源元件。通过作为形成在基板膜上的第一图案布线（14）的金属膜作为掩模，蚀刻在未形成金属膜的区域中的基板膜和基板钛膜。因此，形成基板层（23）和基板钛层（22）。因此，用作基板钛层（22）的基板钛膜防止由于蚀刻液体而导致的接收电极部分和各个无源元件的腐蚀，从而形成具有高性能的无源元件。

6. 发明授权

US07167608B2 Hybrid circuit substrate with optical and electrical interconnects, hybrid circuit module with optical interconnects and manufacturing methods thereof 有权
标题翻译：具有光和电互连的混合电路基板，具有光学互连的混合电路模块及其制造方法
公开(公告)号：US07167608B2
公开(公告)日：2007-01-23
申请号：US11322710
申请日：2005-12-30
申请人： Tsuyoshi Ogawa
发明人： Tsuyoshi Ogawa
IPC分类号： G02B6/12
CPC分类号： G02B6/43 , G02B6/42 , G02B6/4214 , H01L2224/16225 , H01L2924/00014 , H01L2924/15192 , H01L2924/19105 , H05K1/0274 , H05K3/007 , H05K3/4602 , H05K3/4682 , H05K3/4694 , H05K2201/09972 , H05K2203/016 , H05K2203/061 , H01L2224/0401
摘要： Transmission of electric and optical signal, realization of high-speed and high capacity of transmission of information signals. A base substrate section having an interconnect layer formed on an insulating substrate by a printed circuit process; a micro interconnect circuit section having a micro electrical interconnect layer which is finer than the interconnect layer of the base substrate section, formed on an insulating resin layer by a semiconductor process; and an optical interconnect circuit section adapted to transfer and/or receive an optical signal and provided with an optical wave-guide having an input section and an output section of a optical signal at opposite ends thereof; and at least a pair of optical elements composed of a light emitting device with a light emitting section thereof facing the input section and a photo detecting device with a photo detecting section thereof facing the output section are provided and the micro interconnect circuit section and the optical interconnect circuit section are mounted on the base substrate section.
摘要翻译：传输电光信号，实现高速，高容量的信号传输信号。具有通过印刷电路工艺在绝缘基板上形成的互连层的基底部分; 微型互连电路部分，具有通过半导体工艺在绝缘树脂层上形成的比基底部分的互连层细的微电连接层; 以及光学互连电路部分，其适于传送和/或接收光信号并且设置有光波导，其具有在其相对端的光信号的输入部分和输出部分; 并且至少一对光学元件由其发光部分面向输入部分的发光器件和具有面向输出部分的光电检测部分的光检测器件组成，并且微型互连电路部分和光学器件互连电路部分安装在基底部分上。

7. 发明授权

US07099527B2 Optical waveguide switch and method of manufacturing the same 失效
公开(公告)号：US07099527B2
公开(公告)日：2006-08-29
申请号：US10764178
申请日：2004-01-23
申请人： Tsuyoshi Ogawa
发明人： Tsuyoshi Ogawa
IPC分类号： G02B6/35
CPC分类号： G02B6/3502 , G02B6/3536 , G02B6/3546 , G02B6/357
摘要： Optical waveguides facing each other with a layer-to-layer spacing kept not to permit the occurrence of a proximity effect perturbation within a gap section formed in an intermediate layer are configured so that at least one of the optical waveguides is moved toward the other facing the one optical waveguide with drive to cause the occurrence of the proximity effect perturbation between the optical waveguides. Thus, optical signal switching or translation takes place by coupling optical signals transmitted through the optical waveguides with each other by the proximity effect perturbation.

8. 发明申请

US20050250310A1 Multi-layer interconnection circuit module and manufacturing method thereof 有权
标题翻译：多层互连电路模块及其制造方法
公开(公告)号：US20050250310A1
公开(公告)日：2005-11-10
申请号：US11166970
申请日：2005-06-24
申请人： Tsuyoshi Ogawa
发明人： Tsuyoshi Ogawa
IPC分类号： H01L23/12 , H01L21/48 , H01L23/538 , H01L25/04 , H01L25/18 , H05K3/00 , H05K3/20 , H05K3/28 , H05K3/42 , H05K3/46 , H01L23/02
CPC分类号： H01L23/3121 , H01L21/4857 , H01L23/49822 , H01L23/5389 , H01L25/0655 , H01L2221/68345 , H01L2224/16 , H01L2224/73204 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/18161 , H01L2924/19041 , H01L2924/3011 , H01L2924/3025 , H05K3/0023 , H05K3/0058 , H05K3/205 , H05K3/284 , H05K3/423 , H05K3/465 , H05K3/4682 , H05K2203/025 , H05K2203/0733
摘要： The present invention is directed to a multi-layer interconnection circuit module in which plural unit wiring layers are interlayer-connected to each other through a large number of via holes so that they are laminated and formed, wherein respective unit wiring layers (8) to (12) are adapted so that photo-lithographic processing is implemented to a first insulating layer (22) formed by photosensitive insulating resin material to form via hole grooves (25), and photo-lithographic processing is implemented to a second insulating layer (23) formed by photosensitive insulating resin material on the first insulating layer (22) to form wiring grooves (27). A conductive metal layer (24) is formed on the second insulating layer (23) in such a manner that conductive metal is filled within the via hole grooves (25) and the wiring grooves (27) to implement polishing processing to the conductive metal layer (24) until the principal surface of the second insulating layer (23) is exposed to form via holes (13) and wiring patterns (26) by the conductive metal filled within the via hole grooves (25) and the wiring grooves (27).
摘要翻译：本发明涉及一种多层互连电路模块，其中多个单元布线层通过多个通孔彼此层间连接，使得它们被层压和形成，其中各单元布线层（8）至（12）适于对由感光绝缘树脂材料形成的第一绝缘层（22）进行光刻处理以形成通孔槽（25），并且对第二绝缘层（23）进行光刻处理）由第一绝缘层（22）上的感光绝缘树脂材料形成，以形成布线槽（27）。导电金属层（24）以这样的方式形成在第二绝缘层（23）上，使得导电金属填充在通孔槽（25）和布线槽（27）内以对导电金属层进行抛光处理（24）直到所述第二绝缘层（23）的主表面暴露，以通过填充在所述通孔槽（25）和所述布线槽（27）内的导电金属形成通孔（13）和布线图案（26）。

9. 发明授权

US06885099B2 Multichip module, manufacturing method thereof, multichip unit and manufacturing method thereof 有权
标题翻译：多芯片模块及其制造方法，多芯片单元及其制造方法
公开(公告)号：US06885099B2
公开(公告)日：2005-04-26
申请号：US10691382
申请日：2003-10-22
申请人： Tsuyoshi Ogawa
发明人： Tsuyoshi Ogawa
IPC分类号： G02B6/122 , H01L23/02 , H01L25/16 , H01L31/12 , H01L23/53
CPC分类号： G02B6/43 , G02B6/4214 , H01L24/97 , H01L25/167 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00014 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/15192 , H01L2924/00 , H01L2224/05599
摘要： Reduction of parasitic capacitance originated between semiconductor chip and optical chip by reducing the connection distance thereof by means of interlayer-connecting the semiconductor chip mounted on a surface of a resin layer and the optical chip buried on another surface of the resin layer with an interlayer via.
摘要翻译：通过将安装在树脂层的表面上的半导体芯片和埋在树脂层的另一表面上的光学芯片夹层连接到半导体芯片与光学芯片之间的寄生电容，通过使用夹层通孔。

10. 发明授权

US06831357B2 Circuit substrate device, method for producing the same, semiconductor device and method for producing the same 有权
公开(公告)号：US06831357B2
公开(公告)日：2004-12-14
申请号：US10397608
申请日：2003-03-26
申请人： Yuji Nishitani , Tsuyoshi Ogawa , Hiroshi Asami , Akihiko Okubora
发明人： Yuji Nishitani , Tsuyoshi Ogawa , Hiroshi Asami , Akihiko Okubora
IPC分类号： H01L2348
CPC分类号： H01L21/6835 , H01L21/4857 , H01L23/49833 , H01L2221/68345 , H01L2221/68359 , H01L2224/16 , H01L2924/01078 , H01L2924/01087 , H01L2924/09701 , H01L2924/19041 , H05K3/0052 , H05K3/20 , H05K3/4602 , H05K3/4614 , H05K3/467 , H05K3/4682 , H05K3/4694 , H05K2201/0352 , H05K2201/09536 , H05K2203/061
摘要： A circuit substrate device composed of a circuit unit 2 and a multi-layer wiring substrate 3 in which a pattern conductor of the circuit unit 2 may be prevented from being warped or inundated. The circuit substrate device includes a circuit unit 2 having a pattern conductor formed by a thin film technique, and an insulating layer, and a multi-layer wiring substrate 3 having a connecting terminal portion 14 exposed from its major surface. The circuit unit is formed on a dummy substrate. The circuit unit is connected to the multi-layer wiring substrate 3 so that the pattern conductor is connected to the connecting terminal portion 14. The dummy substrate is then removed to give a structure comprised of the circuit unit 2 formed on the multi-layer wiring substrate 3. The pattern conductor of the circuit unit 2 is freed of warping or inundations along the direction of thickness of the circuit unit 2.

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