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    • 8. 发明申请
    • CROSS-CHANNEL NOISE DETECTOR IN IMPLANTABLE DEVICES
    • 交叉通道噪声检测器在可移植设备中
    • WO2010090896A1
    • 2010-08-12
    • PCT/US2010/022028
    • 2010-01-26
    • CARDIAC PACEMAKERS, INC.LI, DanPERSCHBACHER, David, L.
    • LI, DanPERSCHBACHER, David, L.
    • A61N1/37A61N1/08
    • A61N1/3704A61N1/3718A61N1/3925
    • An apparatus comprises a primary cardiac signal sensing circuit to sense a first cardiac signal, a secondary cardiac signal sensing to sense a second cardiac signal, and an arrhythmia detection circuit. The primary sensing circuit includes at least first and second implantable electrodes, and the secondary sensing circuit includes a third implantable electrode to deliver high-energy shock therapy. The arrhythmia detection circuit detects tachyarrhythmia using the primary sensing circuit, determines correspondence between events sensed with the primary sensing circuit and events sensed with the secondary sensing circuit, and deems whether a detected rhythm is indicative of noise or is indicative of an arrhythmia according to the determined correspondence.
    • 一种装置包括用于感测第一心脏信号的主要心脏信号感测电路,感测第二心脏信号的次要心脏信号感测和心律失常检测电路。 主感测电路至少包括第一和第二可植入电极,并且次级感测电路包括用于输送高能量休克疗法的第三可植入电极。 心律失常检测电路使用主感测电路检测快速性心律失常,确定用主感测电路感测的事件与由次级感测电路感测的事件之间的对应关系,并且考虑检测到的节奏是指示噪声还是指示心律失常根据 确定的信件。
    • 9. 发明申请
    • DISABLE FOR ATRIOVENTRICULAR DELAY ADJUSTMENT
    • 禁止进行心律失常调整
    • WO2009073159A1
    • 2009-06-11
    • PCT/US2008/013247
    • 2008-12-01
    • CARDIAC PACEMAKERS, INC.PERSCHBACHER, David, L.
    • PERSCHBACHER, David, L.
    • A61B5/0464A61N1/362A61N1/372A61B5/00A61N1/368
    • A61N1/3622A61B5/0464A61N1/3682A61N1/37258
    • An apparatus comprises an electrical stimulation circuit, a ventricular sensing circuit, a ventricular sensing timer, and an atrial pacing timer. The ventricular sensing circuit detects an intrinsic ventricular tachyarrhythmia depolarization. The ventricular sensing timer initiates timing of a lowest tachy rate (LTR) zone interval and also a ventricular pace interval that is calculated using a lower rate limit (LRL). The atrial pacing timer calculates an atrial pace interval to follow the intrinsic ventricular depolarization using the ventricular pace interval less a paced atrioventricular (AV) delay interval, delays generation of the atrial pace until after expiration of the LTR zone interval by decreasing the paced AV delay interval when the calculated atrial pace interval is within the LTR zone interval, and disables decreasing of the paced AV delay interval when the LRL interval less the paced AV delay interval at the LRL is less than the LTR zone interval.
    • 一种装置包括电刺激电路,心室感测电路,心室感测计时器和心房起搏定时器。 心室感知电路检测内部室性快速性心律失常去极化。 心室感知计时器启动最低速度(LTR)区间隔的定时,以及使用较低速率限制(LRL)计算的心室起搏间隔。 心房起搏定时器计算心房起搏间隔,以使用心室起搏间隔较小的起搏房室(AV)延迟间隔来跟随内部心室去极化,延迟产生心房起搏直到LTR区间隔期到期之后,通过降低节奏的AV延迟 当计算出的心房起搏间隔在LTR区间内时间间隔,并且当LRL间隔小于LRL处的起搏AV延迟间隔小于LTR区间隔时,禁止降低节奏的AV延迟间隔。