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    • 1. 发明申请
    • PHASE-LOCKED LOOP
    • WO2009109636A4
    • 2009-09-11
    • PCT/EP2009/052630
    • 2009-03-05
    • CAMBRIDGE SILICON RADIO LIMITEDLAMANNA, PasqualeSORNIN, Nicolas
    • LAMANNA, PasqualeSORNIN, Nicolas
    • H03L7/093H03L7/197
    • A loop filter for a phase-locked loop that generates an output signal having a predetermined phase relationship with a reference signal, the loop filter being arranged to control a signal generator that forms the output signal in dependence on a phase error between the output signal and the reference signal by outputting a control signal for controlling the signal generator in dependence thereon, the loop filter being arranged to form the control signal to comprise a proportional component representative of an instantaneous magnitude of the phase difference and an integral component representative of an integral of the phase difference, the loop filter comprising a proportional path arranged to receive a signal representative of the instantaneous magnitude of the phase difference and form the proportional component of the control signal in dependence thereon and an integral path arranged to receive a signal representative of the instantaneous magnitude of the phase difference and form the integral component of the control signal in dependence thereon, the proportional and integral paths being decoupled in the loop filter such that each has a transfer function relating its received signal to its respective component of the control signal that is independent of the other path.
    • 2. 发明申请
    • CHARGE TRANSFER IN A PHASE-LOCKED LOOP
    • 相位锁定环路中的充电传输
    • WO2009109603A1
    • 2009-09-11
    • PCT/EP2009/052561
    • 2009-03-04
    • CAMBRIDGE SILICON RADIO LIMITEDLAMANNA, PasqualeSORNIN, Nicolas
    • LAMANNA, PasqualeSORNIN, Nicolas
    • H03L7/087H03L7/089H03L7/191H03L7/197
    • H03L7/087H03L7/0891H03L7/191H03L7/1974
    • A phase-locked loop arranged to generate an output signal having a first frequency that is a static value times the frequency of a reference signal, the phase-locked loop comprising a signal generator arranged to generate the output signal, a divider arranged to receive the output signal and divide the output signal to form a feedback signal, the divider being arranged to vary the divisor by which the output signal is divided to cause the output signal to have a frequency that is said static value times the frequency of the reference signal, a comparison unit arranged to compare the feedback signal with the reference signal, one or more current generators arranged to output current pulses in dependence on said comparison, a summation unit arranged to receive the current pulses output by the current generator(s) and form a single current pulse therefrom and a loop filter arranged to filter the single current pulse to form a control signal for controlling the signal generator, the phase-locked loop being arranged such that the current generator(s) generate(s) a first current pulse dependent on a phase-difference between the feedback signal and the reference signal and a second current pulse whose magnitude and sign are dependent on an error in the feedback signal that is caused by the variation of the divisor, and the summation unit receives the first and second current pulses and stores an electrical charge representative of those current pulses and the summation unit outputs a single current pulse dependent on the electrical charge stored by the summation unit, said single current pulse being representative of a phase-difference that would have existed between the reference signal and the feedback signal if the feedback signal had been formed by dividing the output signal by said static value and not by the varied divisor.
    • 一种锁相环,被布置成产生具有作为静态值的第一频率乘以参考信号的频率的输出信号,该锁相环包括布置成产生输出信号的信号发生器, 输出信号并分频输出信号以形成反馈信号,所述分频器被布置成改变所述输出信号被分频的除数,使得输出信号具有所述静态值的频率乘以参考信号的频率, 比较单元,其被布置为将反馈信号与参考信号进行比较,一个或多个电流发生器被布置为根据所述比较输出电流脉冲;一个求和单元,被布置成接收由电流发生器输出的电流脉冲并形成 单电流脉冲和环路滤波器被布置为滤波单电流脉冲以形成用于控制信号发生器的控制信号, 锁定环被布置成使得电流发生器产生取决于反馈信号和参考信号之间的相位差的第一电流脉冲,以及第二电流脉冲,其幅度和符号取决于 由除数的变化引起的反馈信号,并且求和单元接收第一和第二电流脉冲并存储代表那些电流脉冲的电荷,并且求和单元输出单个电流脉冲,这取决于由 如果反馈信号是通过将输出信号除以所述静态值而不是通过变数除数形成的,则所述单电流脉冲表示将存在于参考信号和反馈信号之间的相位差。
    • 3. 发明申请
    • CHARGE PUMP FOR A PHASE- LOCKED LOOP
    • 充电泵用于相位锁定环路
    • WO2009109638A1
    • 2009-09-11
    • PCT/EP2009/052632
    • 2009-03-05
    • Cambridge Silicon Radio LimitedLAMANNA, PasqualeSORNIN, Nicolas
    • LAMANNA, PasqualeSORNIN, Nicolas
    • H03L7/089H03L7/197
    • H03L7/0895H03L7/1974
    • A charge pump circuit for connection to another circuit via an output node (614) of the charge pump and for causing a current to flow either into or out of the other circuit via the output node in dependence on a current output by- first and second current paths (601, 602) in the charge pump, each current path comprising a current source and a current control device having two switched nodes, one switched node being arranged to receive a current from the current source, and a control node arranged to control a current flow between the first and second switched nodes in dependence on a voltage at the control node, the current control devices of the first and second paths being of the same type such that they are responsive to the same polarity of voltage at their control node to be conducting between their switched nodes, the charge pump further comprising a capacitive element (609, 610) having first and second capacitive plates and a switching arrangement (604-606, 611) arranged such that, during a first time period, the first and second capacitive plates are each in communication with a respective one of the current paths, whereby a current output by the first current path causes an electrical charge to be formed on the first capacitive plate and a current output by the second current path causes an electrical charge to be formed on the second capacitive plate, and during a second time period, the first and second capacitive plates are connected to a reference voltage and the output node (614) respectively, the electrical charge formed on the first and second capacitive plates during the first time period thereby being discharged to form a current at the output node.
    • 一种电荷泵电路,用于经由电荷泵的输出节点(614)连接到另一个电路,并且用于使得电流根据电流输出通过第一和第二电流经由输出节点流入或流出另一电路 电流泵中的电流路径(601,602),每个电流路径包括电流源和具有两个开关节点的电流控制装置,一个开关节点布置成从电流源接收电流,以及控制节点, 第一和第二开关节点之间的电流依赖于控制节点处的电压,第一和第二路径的电流控制装置是相同类型的,使得它们响应于它们的控制节点处的相同的电压极性 在其开关节点之间导通,电荷泵还包括具有第一和第二电容板的电容元件(609,610)和布置成这样的t的开关装置(604-606,611) 在第一时间段期间,第一和第二电容板各自与电流路径中的相应一个连通,由此由第一电流路径输出的电流导致在第一电容板上形成电荷,并且 由第二电流路径产生的电流导致在第二电容板上形成电荷,并且在第二时间段期间,第一和第二电容板分别连接到参考电压和输出节点(614),电气 在第一时间段期间在第一和第二电容板上形成的电荷被放电以在输出节点处形成电流。
    • 5. 发明申请
    • PHASE-LOCKED LOOP
    • 相锁环
    • WO2010089168A1
    • 2010-08-12
    • PCT/EP2010/050219
    • 2010-01-11
    • CAMBRIDGE SILICON RADIO LIMITEDNEWTON, Timothy JohnSORNIN, Nicolas
    • NEWTON, Timothy JohnSORNIN, Nicolas
    • H03L7/093
    • H03L7/093
    • A phase-locked loop comprising; an oscillator configured to output an oscillating signal in dependence on the control signal at an input of the oscillator; a phase detector and loop filter configured to output a low frequency compensation signal in dependence on the output of the oscillator and a reference signal; a correlator configured to frequency correlate an interferer signal and the low frequency compensation signal, and in dependence on that correlation generate a correlation signal; and an adaptive filter configured to adapt the interferer signal in dependence on the correlation signal to output a high frequency compensation signal; and a summation unit configured to combine the low frequency compensation signal and the high frequency compensation signal to form a control signal to drive the input of the oscillator.
    • 一种锁相环,包括: 振荡器,被配置为根据所述振荡器的输入端处的所述控制信号输出振荡信号; 相位检测器和环路滤波器,被配置为根据所述振荡器的输出和参考信号输出低频补偿信号; 相关器,被配置为使干扰信号和所述低频补偿信号频率相关,并且根据所述相关性产生相关信号; 以及自适应滤波器,被配置为根据所述相关信号来适应所述干扰信号以输出高频补偿信号; 以及相加单元,被配置为组合低频补偿信号和高频补偿信号以形成控制信号以驱动振荡器的输入。
    • 7. 发明申请
    • REJECTION OF INTERFERERS
    • WO2009144068A9
    • 2009-12-03
    • PCT/EP2009/054134
    • 2009-04-07
    • CAMBRIDGE SILICON RADIO LIMITEDSORNIN, Nicolas
    • SORNIN, Nicolas
    • H04B1/10
    • A filter for filtering a received signal to attenuate an interferer therein, the interferer having a component at an interferer frequency, and the filter comprising: an intermediate filter providing a passband and a stopband; a first frequency converter configured to form a first intermediate signal by frequency-shifting an input signal derived from the received signal such that a component of the input signal at the interferer frequency is shifted to a frequency in the passband of the intermediate filter, and to input the first intermediate signal to the intermediate filter so as to cause the first intermediate signal to be filtered by the intermediate filter to form a second intermediate signal; a second frequency converter configured to form a cancellation signal by frequency-shifting the second intermediate signal such that a component of the second intermediate signal in the passband of the intermediate filter is shifted to the interferer frequency; and a cancellation unit configured to cancel the cancellation signal from the received signal to attenuate the interferer therein.
    • 9. 发明申请
    • PHASE-LOCKED LOOP
    • 锁相环路
    • WO2009109637A2
    • 2009-09-11
    • PCT/EP2009/052631
    • 2009-03-05
    • CAMBRIDGE SILICON RADIO LIMITEDLAMANNA, PasqualeSORNIN, Nicolas
    • LAMANNA, PasqualeSORNIN, Nicolas
    • H03L7/093
    • H03L7/093H03L7/0893H03L2207/06
    • A loop filter for receiving an input signal indicative of a phase-difference between a reference signal and a signal output by a signal generator and forming a control signal for controlling the signal generator in dependence thereon, the loop filter comprising a plurality of filter components that determine the frequency response of the filter, said filter components being arranged so that a first set of said components determines one or more zeros of the filter's frequency response and a second set of said components determines one or more poles of the filter's frequency response, each of said first and second sets of filter components being independent of the other such that the zero(s) and pole(s) of the filter's frequency response may be selected independently.
    • 环路滤波器,用于接收指示参考信号与信号发生器输出的信号之间的相位差的输入信号,并根据该信号形成用于控制信号发生器的控制信号,环路 滤波器,其包括确定滤波器的频率响应的多个滤波器组件,所述滤波器组件被布置成使得第一组所述组件确定滤波器的频率响应的一个或多个零点,并且第二组所述组件确定一个或多个 所述滤波器的频率响应的极点,所述第一和第二组滤波器组件中的每一个相互独立,使得可以独立地选择所述滤波器的频率响应的零点和(或)极点。
    • 10. 发明申请
    • JITTER INSENSITIVE SIGMA- DELTA MODULATOR
    • 智能无效信号调制器
    • WO2009030580A1
    • 2009-03-12
    • PCT/EP2008/060422
    • 2008-08-07
    • CAMBRIDGE SILICON RADIO LIMITEDSORNIN, NicolasORIFAMMA, Davide
    • SORNIN, NicolasORIFAMMA, Davide
    • H03M3/02
    • H03M3/372H03M3/502
    • A sigma-delta modulator for forming a digital output signal representative of a voltage level of an input signal, the sigma delta modulator having a node arranged to receive a current flow that is representative of the voltage level of the input signal and on whose voltage the digital output signal is dependent, the sigma-delta modulator comprising a plurality of capacitive elements for smoothing the current flow, each capacitive element being connected at one end to the node and at its other end to a respective switch unit and a plurality of switch units, each switch unit being arranged to connect the respective one of the capacitive elements to either a first voltage level or a second voltage level in dependence on the voltage at the node so as to provide feedback that affects the voltage at the node.
    • 一种用于形成表示输入信号的电压电平的数字输出信号的Σ-Δ调制器,所述Σ-Δ调制器具有被布置成接收表示所述输入信号的电压电平的电流的节点,并且其电压 数字输出信号是相关的,Σ-Δ调制器包括用于平滑电流的多个电容元件,每个电容元件的一端连接到该节点,另一端连接到相应的开关单元和多个开关单元 每个开关单元被布置成根据节点处的电压将电容元件中的相应电容元件连接到第一电压电平或第二电压电平,以便提供影响节点处的电压的反馈。