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1. 发明申请

WO2018102370A1 NOISE REDUCTION IN VOLTAGE REFERENCE SIGNAL 审中-公开
公开(公告)号：WO2018102370A1
公开(公告)日：2018-06-07
申请号：PCT/US2017/063639
申请日：2017-11-29
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , ZANBAGHI, Ramin , DAS, Tejasvi , MELANSON, John, L. , THOMSEN, Axel
发明人： ZANBAGHI, Ramin , DAS, Tejasvi , MELANSON, John, L. , THOMSEN, Axel
IPC分类号： H03M1/08 , H03M1/12
摘要： A variable resistor may be coupled between a reference voltage source and components of an integrated circuit to reduce issues relating to thermal noise from a reference voltage signal generated by the reference voltage source. The variable resistor may be set to a low level during a first time period and a high level during a second time period, in which the time periods correspond to a sampling period of a switched-capacitor circuit. The low resistance time period may allow quick settling of an input reference voltage signal, whereas the high resistance time period may reduce a bandwidth of noise on a sampling capacitor coupled to the reference voltage signal. The variable resistor and switched-capacitor network may be used in an analog-to-digital converter (ADC), such as in audio circuits.

2. 发明申请

WO2018187656A1 SWITCHING IN AN AUDIO SYSTEM WITH MULTIPLE PLAYBACK PATHS 审中-公开
公开(公告)号：WO2018187656A1
公开(公告)日：2018-10-11
申请号：PCT/US2018/026410
申请日：2018-04-06
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR, LTD. , DAS, Tejasvi
发明人： DAS, Tejasvi , ZHAO, Xin , HE, Ku , FEI, Xiaofan
IPC分类号： H03F1/02 , H03F3/21 , H03F3/217 , H03F3/30 , H03F3/72
摘要： In accordance with embodiments of the present disclosure, a system may include a playback path and a control circuit. The playback path may have a playback input for receiving an input signal and configured to generate at a playback path output an output signal based on the input signal, wherein the playback path is configured to operate in a plurality of operational modes. The control circuit may be configured to receive a first signal from within the playback path and indicative of the input signal, receive a second signal generated from the input signal externally to the playback path, and select a selected operational mode from the plurality of operational modes based on the first signal and the second signal.

3. 发明申请

WO2019203887A1 A DUAL-PATH PULSE WIDTH MODULATION SYSTEM 审中-公开
公开(公告)号：WO2019203887A1
公开(公告)日：2019-10-24
申请号：PCT/US2018/054413
申请日：2018-10-04
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , DAS, Tejasvi
发明人： DAS, Tejasvi , MORTON, Alan Mark , ZHAO, Xin , ZHU, Lei , FEI, Xiaofan , GABORIAU, Johann G. , MELANSON, John L. , VELLANKI, Amar
IPC分类号： H03F3/183 , H03F3/217
摘要： A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, wherein a first gain of the first path and a second gain of the second path are approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.

4. 发明申请

WO2019079035A1 CALIBRATION OF A DUAL-PATH PULSE WIDTH MODULATION SYSTEM 审中-公开
公开(公告)号：WO2019079035A1
公开(公告)日：2019-04-25
申请号：PCT/US2018/054186
申请日：2018-10-03
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , DAS, Tejasvi
发明人： DAS, Tejasvi , MORTON, Alan Mark , ZHAO, Xin , ZHU, Lei , FEI, Xiaofan , GABORIAU, Johann G. , MELANSON, John L. , VELLANKI, Amar
IPC分类号： H03F3/183 , H03F3/217
摘要： A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem and configured to drive an open-loop driver stage, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, and a calibration subsystem configured to calibrate at least one of a first gain of the first path and a second gain of the second path in order that the first gain and the second gain are at least approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.

5. 发明申请

WO2018004617A1 NEUTRALIZING VOLTAGE KICKBACK IN A SWITCHED CAPACITOR BASED DATA CONVERTER 审中-公开
标题翻译：在基于开关电容的数据转换器中的中和电压KICKBACK
公开(公告)号：WO2018004617A1
公开(公告)日：2018-01-04
申请号：PCT/US2016/040480
申请日：2016-06-30
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR, LTD. , DAS, Tejasvi
发明人： DAS, Tejasvi , MELANSON, John L. , ZANBAGHI, Ramin
IPC分类号： H03M3/00 , H03M1/08 , G11C27/02
CPC分类号： H03M3/322 , G11C27/026 , H03M1/0863 , H03M3/342 , H03M3/376 , H03M3/424 , H03M3/464 , H03M3/50
摘要： In accordance with embodiments of the present disclosure, a method of neutralizing voltage kickback associated with a reference buffer of a switched capacitor based data converter having a first switched capacitor coupled to an output node of the reference buffer wherein the first switched capacitor comprises at least one first capacitor and at least one first switch may be provided. The method may include coupling a passive network to the output node of the reference buffer in response to a presence of a condition for encountering the voltage kickback in order to create an approximately equal and opposite voltage kickforward by the passive network to at least partially neutralize the voltage kickback.
摘要翻译：根据本公开的实施例，一种中和与基于开关电容器的数据转换器的基准缓冲器相关联的电压反冲的方法，所述基于开关电容器的数据转换器具有耦合到基准缓冲器的输出节点的第一开关电容器，其中第一开关电容器包括至少一个第一电容器并且可以提供至少一个第一开关。该方法可以包括：响应于存在用于遇到电压反冲的条件，将无源网络耦合到参考缓冲器的输出节点，以便创建无源网络的近似相等且相反的电压，以至少部分地中和电压反冲。

6. 发明申请

WO2020033313A1 VARIABLE OUTPUT RESISTANCE IN A PLAYBACK PATH WITH CLOSED-LOOP PULSE-WIDTH MODULATION DRIVER 审中-公开
公开(公告)号：WO2020033313A1
公开(公告)日：2020-02-13
申请号：PCT/US2019/045113
申请日：2019-08-05
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , DAS, Tejasvi
发明人： DAS, Tejasvi , GABORIAU, Johann G.
IPC分类号： H03F1/56 , H03F3/217 , H03G3/30
摘要： In accordance with embodiments of the present disclosure, an apparatus may include a signal path comprising a closed-loop analog pulse width modulator having a forward signal path and a feedback path, a variable resistor coupled to an output of the closed-loop analog pulse width modulator, and a control circuit configured to modify the variable resistor in order to modify an output impedance outside of the feedback path of the closed-loop analog pulse width modulator responsive to a condition for switching between a high output impedance mode and a low output impedance mode of the closed-loop analog pulse width modulator or vice versa.

7. 发明申请

WO2020033303A1 VARIABLE OUTPUT RESISTANCE IN A PLAYBACK PATH WITH OPEN-LOOP PULSE-WIDTH MODULATION DRIVER 审中-公开
公开(公告)号：WO2020033303A1
公开(公告)日：2020-02-13
申请号：PCT/US2019/045091
申请日：2019-08-05
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , DAS, Tejasvi
发明人： DAS, Tejasvi , KING, Eric J. , ZHAO, Xin , FEI, Xiaofan , GABORIAU, Johann G. , ZHU, Lei , MELANSON, John L. , HOFF, Thomas
IPC分类号： H03F1/56 , H03F3/217 , H03G1/00 , H03G3/30
摘要： A system may include a digital modulator configured to modulate an input signal received at an input of the digital modulator to generate a modulated input signal at an output of the digital modulator, a digital gain element having a digital gain and coupled to the digital modulator, an open-loop Class-D amplifier coupled to an output of the digital modulator and configured to amplify the modulated input signal, wherein the open-loop Class-D amplifier is powered from a variable power supply having a variable supply voltage which is variable in response to one or more characteristics of the input signal, and a control circuit configured to control the digital gain to approximately cancel changes in an analog gain of the open-loop Class-D amplifier due to variation in the variable supply voltage in response to the one or more characteristics of the input signal.

8. 发明申请

WO2018194979A1 FULLY-DIFFERENTIAL CURRENT DIGITAL-TO-ANALOG CONVERTER 审中-公开
公开(公告)号：WO2018194979A1
公开(公告)日：2018-10-25
申请号：PCT/US2018/027792
申请日：2018-04-16
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR, LTD. , DAS, Tejasvi
发明人： DAS, Tejasvi , ZHAO, Xin , MELANSON, John L.
IPC分类号： H03M1/00 , H03M1/74
摘要： A playback path may include an input configured to receive an input signal, an output configured to drive a differential output signal, a differential current-mode digital-to-analog converter configured to convert the input signal into the differential output signal, and a control circuit. The differential current-mode digital-to-analog converter may include a plurality of current-mode digital-to-analog elements configured to be selectively enabled and disabled based on the input signal and at least one reference element in a current mirror relationship with the plurality of current-mode digital-to-analog elements such that each individual current through each current-mode digital-to-analog element is a scaled version of a reference current of the at least one reference element. The control circuit may be configured to scale current mirror ratios between the at least one reference element and the plurality of current-mode digital-to-analog elements based on a characteristic of the input signal.

9. 发明申请

WO2018004610A1 MINIMIZING STARTUP TRANSIENTS IN AN AUDIO PLAYBACK PATH 审中-公开
标题翻译：最小化音频播放路径中的启动瞬态
公开(公告)号：WO2018004610A1
公开(公告)日：2018-01-04
申请号：PCT/US2016/040458
申请日：2016-06-30
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR, LTD. , DAS, Tejasvi
发明人： DAS, Tejasvi , ILANGO, Anand
IPC分类号： H03F1/30 , H03F1/34 , H03F3/187 , H03F3/72 , H03M1/66
CPC分类号： H04R3/007 , H03F1/305 , H03F1/34 , H03F3/181 , H03F3/187 , H03F3/20 , H03F3/72 , H03F2200/03 , H03F2200/129 , H03F2200/381 , H03F2200/408 , H03G3/348 , H03M1/66
摘要： A method may be provided for powering up or down a playback path (9) comprising a digital-to-analog converter (14) for generating a non- ground-centered analog intermediate voltage (VIN) centered at a common-mode voltage and coupled to a driver (16) for generating a ground-centered playback path output voltage (VOUT) at an output of the driver (16) wherein the output of the driver is clamped via a finite impedance (30) to a ground voltage. The method may include transitioning continuously or in a plurality of discrete steps the analog intermediate voltage (VIN) from an initial voltage to the common- mode voltage such that the transitioning is substantially inaudible at the output (VOUT) of the driver (16). A method for operating an output clamp (30) of an output driver stage of a playback path (9) may include transitioning continuously or in a plurality of discrete steps an impedance (32) of the output clamp (30) in order to match an output offset of the output driver stage in order to minimize audio artifacts appearing at an output (VOUT) of the output driver stage (16).
摘要翻译：可以提供一种用于对包括数模转换器（14）的回放路径（9）通电或断电的方法，所述回放路径（9）用于生成以地为中心的非地面模拟中间电压（VIN）（16），用于在驱动器（16）的输出端处产生地心回放路径输出电压（VOUT），其中驱动器的输出经由有限阻抗（30）钳位在共模电压处并耦合到驱动器）接地电压。该方法可以包括将模拟中间电压（VIN）从初始电压连续地或者以多个离散步骤转变为共模电压，使得在驱动器（16）的输出（VOUT）处该转变基本上是不可听的。用于操作回放路径（9）的输出驱动器级的输出钳位器（30）的方法可以包括连续地或以多个离散步骤转变输出钳位器（30）的阻抗（32），以匹配输出驱动级的输出偏移，以便使出现在输出驱动级（16）的输出（VOUT）处的音频伪像最小化。

10. 发明申请

WO2017184457A1 SYSTEMS AND METHODS FOR PREDICTIVE SWITCHING IN AUDIO AMPLIFIERS 审中-公开
标题翻译：用于音频放大器中预测性切换的系统和方法
公开(公告)号：WO2017184457A1
公开(公告)日：2017-10-26
申请号：PCT/US2017/027733
申请日：2017-04-14
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR, LTD. , DAS, Tejasvi
发明人： DAS, Tejasvi , MELANSON, John L. , KING, Eric J.
IPC分类号： H03F3/195 , H03F1/02 , H03F3/217 , H03F3/187 , H03F1/30
CPC分类号： H03F3/183 , H03F1/0222 , H03F1/025 , H03F1/305 , H03F3/187 , H03F3/2175 , H03F2200/03 , H03F2200/102 , H03F2200/228 , H03F2200/321 , H03F2200/471 , H03F2200/48 , H03F2200/504 , H03F2200/511 , H03F2200/78 , H03K5/1536 , H04R3/007
摘要： An audio amplifier circuit for providing an output signal to an audio transducer may include a power amplifier and a control circuit. The power amplifier may include an audio input for receiving an audio input signal, an audio output for generating the output signal based on the audio input signal, and a power supply input for receiving a power supply voltage, wherein the power supply voltage is variable among at least a first supply voltage and a second supply voltage greater than the first supply voltage. The control circuit may be configured to predict, based on one or more characteristics of a signal indicative of the output signal, an occurrence of a condition for changing the power supply voltage, and responsive to predicting the occurrence of the condition, change, at an approximate zero crossing of the signal indicative of the output signal, the power supply voltage.
摘要翻译：用于向音频换能器提供输出信号的音频放大器电路可以包括功率放大器和控制电路。功率放大器可以包括用于接收音频输入信号的音频输入端，用于基于音频输入信号生成输出信号的音频输出端，以及用于接收电源电压的电源输入端，其中电源电压是可变的至少第一电源电压和大于第一电源电压的第二电源电压。控制电路可以被配置为基于指示输出信号的信号的一个或多个特性来预测用于改变电源电压的条件的发生，并且响应于预测条件的发生，预测指示输出信号的信号的近似过零点，电源电压。

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