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1. 发明申请

WO2010068538A1 LIGHT EMITTING DIODE BASED LIGHTING SYSTEM WITH TIME DIVISION AMBIENT LIGHT FEEDBACK RESPONSE 审中-公开
标题翻译：基于发光二极管的照明系统，具有时间分辨率环境光反馈响应
公开(公告)号：WO2010068538A1
公开(公告)日：2010-06-17
申请号：PCT/US2009/066373
申请日：2009-12-02
申请人： CIRRUS LOGIC, INC. , DRAPER, William, A. , MELANSON, John, L.
发明人： DRAPER, William, A. , MELANSON, John, L.
IPC分类号： H05B33/08
CPC分类号： H05B33/0869 , H05B33/0872
摘要： A lighting system includes time division light output sensing and adjustment for ambient light. In at least one embodiment, time division light output sensing involves modulating power to a light emitting diode (LED) set, and the set of LEDs includes one or more LEDs. In at least one embodiment, each LED in the LED set is included in a single lamp, and, in at least one embodiment, the set of LEDs is contained in multiple lamps. In at least one embodiment, for each lamp, a controller modulates power to the LED set by selectively reducing power to the LED set using time division algorithm to allow a light sensor to sense the brightness of ambient light with a reduced contribution from the LED set. In at least one embodiment, a lighting system also includes time division light output sensing and adjustment for different spectra LEDs.
摘要翻译：照明系统包括对于环境光的时分光输出感测和调整。在至少一个实施例中，时分光输出感测涉及调制发光二极管（LED）组的功率，并且该组LED包括一个或多个LED。在至少一个实施例中，LED组中的每个LED包括在单个灯中，并且在至少一个实施例中，该组LED包含在多个灯中。在至少一个实施例中，对于每个灯，控制器通过使用时分算法选择性地降低对LED组的功率来调制LED组的功率，以允许光传感器以来自LED组的减少的贡献来感测环境光的亮度。在至少一个实施例中，照明系统还包括用于不同光谱LED的时分光输出感测和调整。

2. 发明申请

WO2010126765A2 CALIBRATION OF LAMPS 审中-公开
标题翻译： LAMPS的校准
公开(公告)号：WO2010126765A2
公开(公告)日：2010-11-04
申请号：PCT/US2010/031978
申请日：2010-04-22
申请人： CIRRUS LOGIC, INC. , DRAPER, William, A. , GRISAMORE, Robert, T. , MELANSON, John, L.
发明人： DRAPER, William, A. , GRISAMORE, Robert, T. , MELANSON, John, L.
CPC分类号： H05B37/0263 , H05B37/0218 , Y02B20/46
摘要： In at least one embodiment, a lamp includes a controller configured to generate power control signals for a lamp is also configured to receive lamp calibration data received via one or more power terminals of the lamp. The controller is configured to process the calibration data to calibrate the lamp. In at least one embodiment, the lamp includes one or more light emitting diodes.
摘要翻译：在至少一个实施例中，灯包括被配置为产生灯的功率控制信号的控制器，其还被配置为接收经由灯的一个或多个电源端子接收的灯校准数据。控制器配置为处理校准数据以校准灯。在至少一个实施例中，灯包括一个或多个发光二极管。

3. 发明申请

WO2012128794A1 TRAILING EDGE DIMMER COMPATIBILITY WITH DIMMER HIGH RESISTANCE PREDICTION 审中-公开
标题翻译：跟踪边缘调光器兼容性与调光器高电阻预测
公开(公告)号：WO2012128794A1
公开(公告)日：2012-09-27
申请号：PCT/US2011/061033
申请日：2011-11-16
申请人： CIRRUS LOGIC, INC. , MELANSON, John, L. , KING, Eric, J.
发明人： MELANSON, John, L. , KING, Eric, J.
IPC分类号： H05B33/08 , H05B39/08 , H05B39/04
CPC分类号： H05B37/02 , H05B33/0815 , H05B33/0851 , H05B39/048
摘要： Electronic system (100) including a controller (402), which provides compatibility between an electronic light source (410) and a trailing edge dimmer (404). The controller is capable of predicting an estimated occurrence
摘要翻译：电子系统（100）包括提供电子光源（410）和后缘调光器（404）之间的兼容性的控制器（402）。控制器能够预测相位切断AC电压的下降沿，并且将相位切换电压从后沿转变到预定电压阈值。控制器基于来自相切切断AC电压的一个或多个先前循环的实际观测值来预测相切切断AC电压的后沿的估计出现。

4. 发明申请

WO2010011962A1 CURRENT SENSING IN A SWITCHING POWER CONVERTER 审中-公开
标题翻译：开关电源转换器中的电流传感器
公开(公告)号：WO2010011962A1
公开(公告)日：2010-01-28
申请号：PCT/US2009/051746
申请日：2009-07-24
申请人： CIRRUS LOGIC, INC. , MELANSON, John, L. , GAETANO, Mauro
发明人： MELANSON, John, L. , GAETANO, Mauro
IPC分类号： G05F1/10
CPC分类号： G05F1/70 , H02M1/4225 , H02M3/156 , H02M2001/0009 , Y02B70/126
摘要： A power control system includes a current sense resistor located on an output side of a switching power converter. By locating the current sense resistor on the output side of the switching power converter, the current sense resistor conducts a sense current when a control switch of the switching power converter is nonconductive. Since a duty cycle of the control switch is larger for a low input voltage than for a higher input voltage, the current sense resistor conducts current for a shorter time duration for low input voltages than for higher input voltages. Thus, the root mean square (RMS) of a sense current in the current sense resistor and, thus, power dissipation by the current sense resistor, is lower during low input voltages than power dissipation in conventionally located current sense resistors. The RMS of the sense current is approximately constant across a full range of input voltages.
摘要翻译：功率控制系统包括位于开关功率转换器的输出侧的电流检测电阻器。通过在开关电源转换器的输出侧定位电流检测电阻器，当开关电源转换器的控制开关不导通时，电流检测电阻器传导检测电流。由于控制开关的占空比对于低输入电压而言比对于较高的输入电压较大，所以电流检测电阻器对于低输入电压而言，对于较高的输入电压而言，传导电流较短的持续时间。因此，电流检测电阻器中的感测电流的均方根（RMS）以及电流检测电阻器的功率耗散在低输入电压期间比传统定位的电流检测电阻器中的功耗更低。感测电流的RMS在整个输入电压范围内大致恒定。

5. 发明申请

WO2006044181A1 INVERSE TRACKING OVER TWO DIFFERENT CLOCK DOMAINS 审中-公开
标题翻译：两个不同时钟域的反向跟踪
公开(公告)号：WO2006044181A1
公开(公告)日：2006-04-27
申请号：PCT/US2005/035580
申请日：2005-10-03
申请人： CIRRUS LOGIC, INC. , GUDMUNDSON, Daniel , MELANSON, John, L. , SINGH, Rahul , CHOWDHURY, Ahsan, Habib
发明人： GUDMUNDSON, Daniel , MELANSON, John, L. , SINGH, Rahul , CHOWDHURY, Ahsan, Habib
IPC分类号： H04N5/12 , H04L7/033
CPC分类号： H03L7/06 , H03L7/0991 , H03L2207/50 , H04L7/005 , H04L7/0331 , H04N5/126
摘要： A video decoder in which the video source clock is generated entirely in the digital domain is disclosed herein. By creating a virtual version of the source clock in a numeric oscillator, the amount of noise in the system is substantially reduced. Furthermore, by transferring the digitized video signal, sampled with an asynchronous crystal clock, into the source clock domain, the accuracy of the brightness (amplitude) and color (phase) information can be greatly enhanced.
摘要翻译：本文公开了视频源时钟完全在数字域中生成的视频解码器。通过在数字振荡器中创建源时钟的虚拟版本，系统中的噪声量显着降低。此外，通过将用异步晶体时钟采样的数字化视频信号传送到源时钟域，可以大大提高亮度（幅度）和颜色（相位）信息的精度。

6. 发明申请

WO2004066540A2 SIGNAL PROCESSING SYSTEM WITH BASEBAND NOISE MODULATION AND NOISE FOLD BACK REDUCTION 审中-公开
标题翻译：具有基带噪声调制和噪声折叠减少的信号处理系统
公开(公告)号：WO2004066540A2
公开(公告)日：2004-08-05
申请号：PCT/US2004/001514
申请日：2004-01-21
申请人： CIRRUS LOGIC INC. , PLISCH, Marjorie, R. , MELANSON, John, L. , HODAPP, Stephen, T. , RANGAN, Giri, N., K.
发明人： PLISCH, Marjorie, R. , MELANSON, John, L. , HODAPP, Stephen, T. , RANGAN, Giri, N., K.
IPC分类号： H04L
CPC分类号： H03M3/34 , H03F1/02 , H03F1/26 , H03F3/211 , H03F3/217 , H03F3/2175 , H03F3/38 , H03F2200/331 , H03M3/50
摘要： A digital-to-analog converter ("DAC") system utilized chopping modulation technology to remove 1/f and other baseband noise from a baseband of a signal of interest. Chopping modulation and demodulation circuitry of the DAC operate at a chopping frequency equal to approximately one-half of a digital input signal sampling frequency. Chopping at one-half the sampling frequency allows fold back into the baseband of the input signal's frequency components and reduces fold back of noise, such as quantization noise, residing outside the baseband. In a further embodiment, a notch filter attenuates signals having frequencies around the chopping frequency prior to chopping to reduce fold back of noise into the baseband due to parasitic modulation. Coordination of chopping timing also reduces noises in the output of the DAC system.
摘要翻译：数模转换器（“DAC”）系统利用斩波调制技术来从感兴趣的信号的基带去除1 / f和其他基带噪声。 DAC的调制和解调电路的斩波工作在等于数字输入信号采样频率的大约一半的斩波频率。斩波采样频率的一半允许折回到输入信号频率分量的基带，并减少驻留在基带外的噪声（例如量化噪声）的折返。在另一实施例中，陷波滤波器在斩波之前衰减具有斩波频率附近的频率的信号，以减少由于寄生调制引起的噪声向基带的折返。斩波时序的协调也减少了DAC系统输出的噪声。

7. 发明申请

WO2012016221A2 COORDINATED DIMMER COMPATIBILITY FUNCTIONS 审中-公开
标题翻译：协调的调光兼容性功能
公开(公告)号：WO2012016221A2
公开(公告)日：2012-02-02
申请号：PCT/US2011/046027
申请日：2011-07-29
申请人： CIRRUS LOGIC, INC. , MELANSON, John, L. , KING, Eric, J.
发明人： MELANSON, John, L. , KING, Eric, J.
IPC分类号： H05B37/02
CPC分类号： H02M7/06 , H02M1/36 , H02M3/33507 , H02M2001/0006 , H05B33/0815 , Y02B20/346 , Y10T307/352 , Y10T307/50
摘要： A system and method includes a controller that is configured to coordinate (i) a low impedance path for a dimmer current, (ii), control of switch mode power conversion and (iii) an inactive state to, for example, to allow a dimmer to function normally from cycle to cycle of an alternating current (AC) supply voltage. In at least one embodiment, the dimmer functions normally when the dimmer conducts at a correct phase angle indicated by a dimmer input setting and avoids prematurely resetting while conducting. In at least one embodiment, by coordinating functions (i), (ii), and (iii), the controller controls a power converter system that is compatible with a triac-based dimmer. In at least one embodiment, the controller coordinates functions (i), (ii), and (iii) in response to a particular dimming level indicated by a phase cut, rectified input voltage supplied to the power converter system.
摘要翻译：系统和方法包括控制器，该控制器被配置为协调（i）调光器电流的低阻抗路径，（ii）开关模式功率转换的控制和（iii）不活动状态以例如，允许调光器在交流（AC）电源电压的循环之间正常工作。在至少一个实施例中，当调光器以由调光器输入设置指示的正确相位角传导时，调光器正常工作，并避免在导电时过早地重置。在至少一个实施例中，通过协调功能（i），（ii）和（iii），控制器控制与基于三端双向可控硅开关的调光器兼容的功率转换器系统。在至少一个实施例中，控制器响应于提供给功率转换器系统的相切，整流输入电压所指示的特定调光水平来协调功能（i），（ii）和（iii）。

8. 发明申请

WO2010065598A2 PRIMARY-SIDE BASED CONTROL OF SECONDARY-SIDE CURRENT FOR A TRANSFORMER 审中-公开
标题翻译：基于初级侧的变压器二次侧电流控制
公开(公告)号：WO2010065598A2
公开(公告)日：2010-06-10
申请号：PCT/US2009/066350
申请日：2009-12-02
申请人： CIRRUS LOGIC, INC. , MELANSON, John, L.
发明人： MELANSON, John, L.
IPC分类号： H02M3/335 , G01R19/00
CPC分类号： H02M3/33523 , H05B33/0815 , H05B33/0851
摘要： A power control system includes a transformer and a controller regulates a current on a secondary-side of the transformer based on a primary-side signal value. In at least one embodiment, the secondary-side current is a current out of a filter coupled to a rectifier and the secondary-side of the transformer and into a load. In at least one embodiment, the primary-side signal value is a sample of a current in the primary-side windings of the transformer. In at least one embodiment, the primary- side signal value represents a sample value of a primary-side transformer current. Proper timing of sampling the primary-side signal value substantially eliminates contributions of a transformer magnetizing current from the primary-side transformer current sample. Sampling the primary-side signal value when contributions of the transformer magnetizing current are substantially eliminated allows at least an average of the secondary-side current to be determined from the primary-side signal value.
摘要翻译：功率控制系统包括变压器和控制器，该控制器基于初级侧信号值调节变压器的次级侧上的电流。在至少一个实施例中，次级侧电流是耦合到整流器和变压器的次级侧并进入负载的滤波器中的电流。在至少一个实施例中，初级侧信号值是变压器的初级侧绕组中电流的样本。在至少一个实施例中，初级侧信号值表示初级侧变压器电流的样本值。对初级侧信号值进行采样的正确时间基本上消除了来自初级侧变压器电流采样的变压器磁化电流的贡献。当变压器磁化电流的贡献基本消除时对初级侧信号值进行采样允许从初级侧信号值至少确定次级侧电流的平均值。

9. 发明申请

WO2007112189A1 DELTA SIGMA MODULATOR ANALOG-TO-DIGITAL CONVERTERS WITH MULTIPLE THRESHOLD COMPARISONS DURING A DELTA SIGMA MODULATOR OUTPUT CYCLE 审中-公开
标题翻译： DELTA SIGMA调制器模拟数字转换器在DELTA SIGMA调制器输出周期期间具有多个阈值比较
公开(公告)号：WO2007112189A1
公开(公告)日：2007-10-04
申请号：PCT/US2007/063660
申请日：2007-03-09
申请人： CIRRUS LOGIC, INC. , MELANSON, John, L.
发明人： MELANSON, John, L.
IPC分类号： H03M1/14 , H03M1/38
CPC分类号： H03M3/426
摘要： The analog-to-digital (ADC) delta sigma modulators in the signal processing systems described utilize comparator number reduction techniques to improve a delta sigma modulator quantizer. The delta sigma modulator generates one quantization output signal per delta sigma modulator output cycle. A quantizer of the delta sigma modulator includes one or more comparators, that each makes at least two comparisons per delta sigma modulator output cycle. The one or more comparators compare a quantizer input signal against one or more thresholds. A successive reference generator determines the one or more thresholds for the one or more comparators wherein each of the one or more thresholds during a later one of the at least two comparisons is in conformity with results of an earlier one of the at least two comparisons. Redundant and other iterative comparison techniques and threshold generation techniques are used to efficiently reduce the number of comparators in the quantizer while maintaining accuracy.
摘要翻译：所描述的信号处理系统中的模数（ADC）ΔΣ调制器利用比较器数量削减技术来改进ΔΣ调制器量化器。 ΔΣ调制器每ΔΣ调制器输出周期产生一个量化输出信号。 ΔΣ调制器的量化器包括一个或多个比较器，每个比较器每个ΔΣ调制器输出周期进行至少两个比较。一个或多个比较器将量化器输入信号与一个或多个阈值进行比较。连续参考发生器确定一个或多个比较器的一个或多个阈值，其中在至少两个比较中的后一个比较中的一个或多个阈值中的每一个与所述至少两个比较中较早的一个比较的结果一致。使用冗余和其他迭代比较技术和阈值生成技术来有效地减少量化器中比较器的数量，同时保持精度。

10. 发明申请

WO2004064485A3 SIGNAL PROCESSING SYSTEM WITH BASEBAND NOISE MODULATION AND NOISE FILTERING 审中-公开
公开(公告)号：WO2004064485A3
公开(公告)日：2004-08-05
申请号：PCT/US2004/001916
申请日：2004-01-21
申请人： CIRRUS LOGIC, INC. , MELANSON, John, L. , HODAPP, Stephen, T. , RANGAN, Giri, N., K.
发明人： MELANSON, John, L. , HODAPP, Stephen, T. , RANGAN, Giri, N., K.
IPC分类号： H03M3/00
摘要： A digital-to-analog converter ("DAC") system utilizes notch filters and chopping modulation technology to remove 1/f and other baseband noise from a baseband of a signal of interest. Chopping modulation and demodulation circuitry of the DAC operate at a chopping frequency and all harmonics equal to approximately one-half of a digital input signal sampling frequency. A notch filter attenuates signals having frequencies around the chopping frequency prior to chopping to reduce fold back of noise into the baseband due to parasitic modulation. Another notch filter attenuating signals having frequencies around twice the chopping frequency further reduces fold back of noise into the baseband.

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