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    • 1. 发明申请
    • DIGITAL/ANALOG CONVERTER
    • 数字/模拟转换器
    • US20060284752A1
    • 2006-12-21
    • US11379428
    • 2006-04-20
    • Byung KimWon ChoiYoun LeeChan Park
    • Byung KimWon ChoiYoun LeeChan Park
    • H03M1/66
    • H03M1/682H03M1/765
    • The present invention relates to a digital/analog converter, in which a divided-voltage generating section and a divided-voltage selecting section are added to a conventional digital/analog converter so that a digital signal with high resolution of more than 10 bits can be processed and the size of an IC can be reduced. The digital/analog converter includes a first divided-voltage generating section which divides a reference supply voltage through the voltage distribution; a decoder section which receives a digital signal so as to output a decoded selection signal; a first divided-voltage selecting section which selects and outputs a plurality of divided voltages among the divided voltages generated from the first divided-voltage generating section on the basis of the selection signal output from the decoder section; a second divided-voltage selecting section which selects and outputs a plurality of divided voltages among the divided-voltages output from the first divided-voltage selecting section on the basis of the selection signal output from the decoder section; a second divided-voltage generating section which divides the plurality of divided-voltages output from the second divided-voltage selecting section; a third divided-voltage selecting section which selects a predetermined voltage among the divided-voltages output from the second divided-voltages generating section on the basis of the selection signal output from the decoder; and a voltage output section which outputs the predetermined voltage selected from the third divided-voltage selecting section.
    • 数字/模拟转换器技术领域本发明涉及数字/模拟转换器,其中分压产生部分和分压选择部分被添加到传统的数/模转换器,使得具有大于10位的高分辨率的数字信号可以是 并且可以减小IC的尺寸。 数字/模拟转换器包括:第一分压产生部,其通过电压分配来划分参考电源电压; 解码器部分,其接收数字信号以输出解码的选择信号; 第一分压电压选择部,其根据从解码部输出的选择信号,选择并输出从第一分压产生部生成的分压电压中的多个分压; 第二分压选择部,根据从解码部输出的选择信号,选择并输出从第一分压电压选择部输出的分压电压中的多个分压; 第二分压电压生成部,其对从第二分压电压选择部输出的多个分压进行分压; 第三分压选择部,其根据从解码器输出的选择信号,选择从第二分压产生部输出的分压中的规定电压; 以及电压输出部,输出从第三分压电压选择部选择的预定电压。
    • 3. 发明申请
    • APPARATUS AND METHOD OF RECORDING/REPRODUCING DIGITAL BROADCAST DATA
    • 记录/复制数字广播数据的装置和方法
    • US20080063382A1
    • 2008-03-13
    • US11942463
    • 2007-11-19
    • Sung ChoJan YooKang SeoByung Kim
    • Sung ChoJan YooKang SeoByung Kim
    • H04N5/76
    • H04N21/434H04N7/52H04N9/7925H04N9/8042H04N21/4344
    • The present invention relates to method and apparatus of recording/reproducing a non-MPEG formatted digital TV broadcast signal on/from a writable medium. The present recording method, when a digital TV broadcast signal composed of DirecTV transport packets is received, collects DirecTV transport packets as adding receiving time information to each packet optionally, slices the collected packets into 184-byte stream pieces, composes a Transport Packet defined in MPEG standard with each piece, and writes a series of Transport Packets on a recording medium. The present method can record a non-MPEG type of transport stream in MPEG recording format and reproduce the recorded transport stream to original DirecTV transport stream, whereby an applicability of a digital recorder is improved.
    • 本发明涉及在可写介质上记录/再现非MPEG格式的数字TV广播信号的方法和装置。 本记录方法当收到由DirecTV传输分组组成的数字电视广播信号时,收集DirecTV传输分组,作为向每个分组添加接收时间信息,可选地将收集的分组切片成184字节的流片段, MPEG标准,并将一系列传输数据包写入记录介质。 本方法可以以MPEG记录格式记录非MPEG类型的传输流,并将记录的传输流再现到原始DirecTV传输流,从而提高数字记录器的适用性。
    • 9. 发明申请
    • Gate structure including multi-tunneling layer and method of fabricating the same, non-volatile memory device and method of fabricating the same
    • 包括多隧道层的栅结构及其制造方法,非易失性存储器件及其制造方法
    • US20070114572A1
    • 2007-05-24
    • US11600737
    • 2006-11-17
    • Kwang-Soo SeolWoong-Chul ShinByung KimEun-Kyung LeeKyung-Sang Cho
    • Kwang-Soo SeolWoong-Chul ShinByung KimEun-Kyung LeeKyung-Sang Cho
    • H01L29/76
    • H01L29/42332B82Y10/00H01L27/115H01L29/7881
    • Provided is a gate structure including a multi-tunneling layer and method of fabricating the same. Also provided is a nanodot semiconductor memory device including such gate structure and method of fabricating the same. The gate structure may include a first insulation layer, a second insulation layer, a charge storage layer including nanodots and formed on the second insulation layer, a third insulation layer formed on the charge storage layer, and a gate electrode layer formed on the third insulation layer. There may also be a nanodot semiconductor memory device including a semiconductor substrate, in which a first impurity region and a second impurity region may be formed, and including the gate structure formed on the semiconductor substrate which contacts the first and second impurity regions. The second insulation layer may be formed on the first insulation layer and may include a material whose energy level may be lower than an energy level of the conduction band of the first insulation layer and higher an energy level of the valence band of the first insulation layer.
    • 提供一种包括多隧道层的栅极结构及其制造方法。 还提供了包括这种栅极结构的纳米点半导体存储器件及其制造方法。 栅极结构可以包括第一绝缘层,第二绝缘层,包括纳米点并形成在第二绝缘层上的电荷存储层,形成在电荷存储层上的第三绝缘层,以及形成在第三绝缘层上的栅电极层 层。 还可以存在包括可以形成第一杂质区域和第二杂质区域的半导体衬底的纳米点半导体存储器件,并且包括形成在与第一和第二杂质区域接触的半导体衬底上的栅极结构。 第二绝缘层可以形成在第一绝缘层上,并且可以包括其能级可以低于第一绝缘层的导带的能级的材料,并且第一绝缘层的价带的能级越高 。