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    • 1. 发明授权
    • SRAM synchronized with an optimized clock signal based on a delay and an external clock
    • SRAM与基于延迟和外部时钟的优化时钟信号同步
    • US06272067B1
    • 2001-08-07
    • US09613927
    • 2000-07-11
    • Bruce C. SunEric W. LeeHuy Nguyen
    • Bruce C. SunEric W. LeeHuy Nguyen
    • G11C800
    • G11C7/106G11C7/1012G11C7/1051G11C7/1066G11C7/1072G11C7/1078G11C7/1087G11C7/222G11C11/419
    • A synchronous SRAM chip that can increase the number of times it may be accessed within a single clock cycle. By knowing the processor's clock speed and determining a critical time, a signal optimizer may be constructed. The critical time is the longest interval of time required for a worst-case scenario memory access. A signal optimizer transforms the clock signal into a signal that has a higher frequency than the original clock signal and maintains both its high state and its low state for at least the critical time. By then allowing the synchronous SRAM chip to perform its access and pre-charge during the dips and posts of the optimized clock signal, the synchronous SRAM chip can perform multiple accesses and pre-charges during one clock cycle. The SRAM chip can be used for direct memory accesses such that the processor does not need to arbitrate access to the memory.
    • 同步SRAM芯片可以增加在单个时钟周期内访问的次数。 通过了解处理器的时钟速度并确定关键时间,可以构建信号优化器。 关键时间是最坏情况下存储器访问所需的最长时间间隔。 信号优化器将时钟信号变换成具有比原始时钟信号更高的频率的信号,并且至少在关键时刻保持其高状态和低状态。 在允许同步SRAM芯片在优化的时钟信号的下降和下降期间执行其访问和预充电,同步SRAM芯片可以在一个时钟周期内执行多次访问和预充电。 SRAM芯片可用于直接存储器访问,使得处理器不需要仲裁访问存储器。
    • 2. 发明授权
    • RAM synchronized with a signal
    • RAM与信号同步
    • US06324122B1
    • 2001-11-27
    • US09835010
    • 2001-04-13
    • Bruce C. SunEric W. LeeHuy Nguyen
    • Bruce C. SunEric W. LeeHuy Nguyen
    • G11C800
    • G11C7/106G11C7/1012G11C7/1051G11C7/1066G11C7/1072G11C7/1078G11C7/1087G11C7/222G11C11/419
    • A RAM module that can increase the number of times it may be accessed within a single clock cycle. By knowing the processor's clock speed and determining a critical time, a signal optimizer may be constructed. The critical time is the longest interval of time required for a worst-case scenario memory access. A signal optimizer transforms the clock signal into a signal that has a higher frequency than the original clock signal and maintains both its high state and its low state for at least the critical time. By then allowing the RAM module to perform its access and pre-charge during the dips and posts of the optimized clock signal, the RAM module can perform multiple accesses and pre-charges during one clock cycle. The RAM module can be used for direct memory accesses such that the processor does not need to arbitrate access to the memory.
    • RAM模块可以增加在单个时钟周期内访问的次数。 通过了解处理器的时钟速度并确定关键时间,可以构建信号优化器。 关键时间是最坏情况下存储器访问所需的最长时间间隔。 信号优化器将时钟信号变换成具有比原始时钟信号更高的频率的信号,并且至少在关键时刻保持其高状态和低状态。 在允许RAM模块在优化的时钟信号的下降和下降期间执行其访问和预充电,RAM模块可以在一个时钟周期内执行多次访问和预充电。 RAM模块可用于直接存储器访问,使得处理器不需要仲裁访问存储器。
    • 3. 发明申请
    • MINIATURE PIEZOELECTRIC MOTORS FOR ULTRA HIGH-PRECISION STEPPING
    • 微型压电电机用于超高精度步进
    • US20100127598A1
    • 2010-05-27
    • US12623258
    • 2009-11-20
    • Bruce C. SunTzong-Shii Pan
    • Bruce C. SunTzong-Shii Pan
    • H02N2/12
    • H02N2/103H02N2/001H02N2/0095
    • A miniature piezoelectric motor is described whereby in one embodiment teethed protrusions emanating inward from an annular-shaped stator engage with a rotor as the stator deforms in response to stresses applied to the stator by PZT pads attached thereto. The PZT pads are driven by voltage waveforms according to either a standing or traveling wave method and each deformation of the stator applies a tangential force to the rotor via a plurality of teethed protrusions, thereby moving the rotor a small amount. Flat PZT pads attached to flat facets on conductive surfaces of the stator are utilized in order to increase manufacturability and reduce cost. Configuration of the facets tunes the resonant frequency of the stator ensuring that the motor operates in the ultrasonic range, and also tunes the voltage level of drive signal required. Placement of PZT elements on the inner circumferential surface further optimizes overall motor size.
    • 描述了一种微型压电电动机,其中在一个实施例中,当定子根据连接到其上的PZT焊盘施加到定子的应力而变形时,从环形定子向内发出的流出的突起与转子啮合。 PZT焊盘根据立式或行波方式由电压波形驱动,定子的每个变形通过多个前端突起向转子施加切向力,从而使转子移动少量。 利用连接在定子的导电表面上的平坦小平面的扁平PZT垫以增加可制造性并降低成本。 小平面的配置调节定子的谐振频率,确保电机在超声波范围内工作,并调谐所需驱动信号的电压电平。 PZT元件在内圆周表面上的放置进一步优化了整个电机的尺寸。