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1. 发明申请

US20060292827A1 Chemical die singulation technique 有权
标题翻译：化学模切技术
公开(公告)号：US20060292827A1
公开(公告)日：2006-12-28
申请号：US11159553
申请日：2005-06-22
申请人： Brian Condie , David Dougherty , Mahesh Shah
发明人： Brian Condie , David Dougherty , Mahesh Shah
IPC分类号： H01L21/00
CPC分类号： H01L21/78
摘要： A method is provided for manufacturing a semiconductor device from a substrate (200) having an active surface (204) and a non-active surface (206). The method comprises depositing a backing material (104) onto the non-active surface of the substrate (206) in a pattern (500), the pattern (500) having at least a first die section (210), a second die section (212) adjacent the first die section (210), and a strip (216) connecting the first die section (210) and the second die section (212), removing material from portions of the non-active surface of the substrate (206) on which the backing material (104) is not deposited to thereby partially separate the substrate (200) into a first die (236) and a second die (238) connected to one another by the strip (254) of the deposited backing material, and breaking the strip connector (254) to separate the first die (236) from the second die (238).
摘要翻译：提供了一种从具有有源表面（204）和非有效表面（206）的衬底（200）制造半导体器件的方法。该方法包括以图案（500）将背衬材料（104）沉积到基底（206）的非活性表面上，图案（500）具有至少第一模具部分（210），第二模具部分 212），以及连接第一模具部分（210）和第二模具部分（212）的条带（216），从衬底（206）的非活性表面的部分去除材料，其上不沉积背衬材料（104），从而通过沉积的背衬材料的带（254）将衬底（200）部分地分离成第一模具（236）和第二模具（238），第二模具（238）彼此连接，以及断开带状连接器（254）以将第一管芯（236）与第二管芯（238）分离。

2. 发明申请

US20070090543A1 Plastic packaged device with die interface layer 有权
标题翻译：带芯片接口层的塑料封装装置
公开(公告)号：US20070090543A1
公开(公告)日：2007-04-26
申请号：US11257822
申请日：2005-10-24
申请人： Brian Condie , Mahesh Shah
发明人： Brian Condie , Mahesh Shah
IPC分类号： H01L23/28
CPC分类号： H01L23/3192 , H01L23/3164 , H01L23/3171 , H01L23/4334 , H01L24/97 , H01L2224/48091 , H01L2924/01004 , H01L2924/01005 , H01L2924/01021 , H01L2924/01033 , H01L2924/01057 , H01L2924/01074 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/3025 , H01L2924/00014 , H01L2924/00
摘要： Structure and method are provided for plastic encapsulated semiconductor devices having a buffer layer of low dielectric constant and/or low loss tangent material separating the die surface from the plastic encapsulation. Semiconductor wafers with substantially completed SC die are coated with the buffer layer. The buffer layer is patterned to expose the die bonding pads but leave the buffer layer over some or all of the other die metallization. The die are then separated, mounted on a lead-frame or other support, wire bonded or otherwise coupled to external leads, and encapsulated. The plastic encapsulation surrounds the die and the buffer layer, providing a solid structure. The buffer layer reduces the parasitic capacitance, cross-talk and loss between metallization regions on the die. An optional sealing layer may also be provided at the wafer stage between the buffer layer and the plastic encapsulation to mitigate any buffer layer porosity.
摘要翻译：提供了具有低介电常数和/或低损耗正切材料的缓冲层的塑料封装的半导体器件的结构和方法，其将管芯表面与塑料封装分开。具有基本上完成的SC管芯的半导体晶片被缓冲层涂覆。图案化缓冲层以露出芯片焊盘，但是将缓冲层留在其它芯片金属化部分或全部上。然后将管芯分离，安装在引线框架或其他支撑件上，引线键合或以其他方式耦合到外部引线，并封装。塑料封装围绕裸片和缓冲层，提供坚实的结构。缓冲层减少了裸片上的金属化区域之间的寄生电容，串扰和损耗。也可以在缓冲层和塑料封装之间的晶片台处设置可选的密封层，以减轻任何缓冲层孔隙率。

3. 发明申请

US20070090542A1 Semiconductor device with reduced package cross-talk and loss 有权
标题翻译：半导体器件具有减少的封装串扰和损耗
公开(公告)号：US20070090542A1
公开(公告)日：2007-04-26
申请号：US11257802
申请日：2005-10-24
申请人： Brian Condie , Mali Mahalingam , Mahesh Shah
发明人： Brian Condie , Mali Mahalingam , Mahesh Shah
IPC分类号： H01L23/28
CPC分类号： H01L23/3135 , H01L23/295 , H01L23/4334 , H01L24/48 , H01L2224/05553 , H01L2224/48247 , H01L2224/97 , H01L2924/00014 , H01L2924/01021 , H01L2924/09701 , H01L2924/10161 , H01L2924/14 , H01L2924/181 , H01L2924/3025 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Structure and method are provided for plastic encapsulated semiconductor devices having reduced package cross-talk and loss. Semiconductor die are first coated with a buffer region having a lower dielectric constant ε and/or lower loss tangent δ than the plastic encapsulation. The encapsulation surrounds the buffer region providing a solid structure. The lower ε buffer region reduces the stray capacitance and therefore the cross-talk between electrodes on or coupled to the die. The lower δ buffer region reduces the parasitic loss in the encapsulation. Low ε and/or δ buffer regions can be achieved using low density organic and/or inorganic materials. Another way is to disperse hollow microspheres or other fillers in the buffer region. An optional sealing layer formed between the buffer region and the encapsulation can mitigate any buffer layer porosity. The buffer region desirably has ε less than about 3.0 and/or δ less than about 0.005.
摘要翻译：提供了具有降低的封装串扰和损耗的塑料封装的半导体器件的结构和方法。半导体管芯首先被涂覆有比塑料封装具有更低的介电常数ε和/或更低的损耗角正切delta的缓冲区。封装围绕提供固体结构的缓冲区。较低的ε缓冲区域减小了杂散电容，并因此降低了电极之间或耦合到裸片上的串扰。较低的Δ缓冲区减少了封装中的寄生损耗。可以使用低密度有机和/或无机材料实现低ε和/或δ缓冲区。另一种方法是将中空微球或其它填料分散在缓冲区中。形成在缓冲区和封装之间的可选密封层可以缓解任何缓冲层的孔隙度。缓冲区域希望具有小于约3.0的ε和/或小于约0.005的Δ。

4. 发明申请

US20070090545A1 Semiconductor device with improved encapsulation 审中-公开
标题翻译：具有改进封装的半导体器件
公开(公告)号：US20070090545A1
公开(公告)日：2007-04-26
申请号：US11257887
申请日：2005-10-24
申请人： Brian Condie , Mahesh Shah
发明人： Brian Condie , Mahesh Shah
IPC分类号： H01L23/29
CPC分类号： H01L23/295 , H01L23/4334 , H01L24/48 , H01L2224/48247 , H01L2924/00014 , H01L2924/01021 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Structure and method are provided for plastic encapsulated semiconductor devices. The encapsulation comprises a plastic binder having a dielectric constant εb and loss tangent δb and a filler mixed therewith having lower εf and/or δf so that εm and/or δm of the mix is less than εb, δb, respectively. Hollow microspheres of varied sizes are preferred fillers, desirably in the size range of about 0.3 to 300 micrometers. These should comprise at least about 50%, more preferably 60 to 70% or more of the mixture by volume so that the resulting mix has εm
摘要翻译：为塑料封装半导体器件提供了结构和方法。封装包括具有介电常数εεb和损耗正切δB B的塑料粘合剂和与其混合的填料具有较低ε和/或以使得混合物的ε3 m和/或δ3 m小于ε3 b， SUB> b 。不同尺寸的中空微球体是优选的填料，理想地在约0.3至300微米的尺寸范围内。这些应该包含体积的混合物的至少约50％，更优选60至70％或更多，使得所得混合物具有ε3，优选<2.5和δ< /SUB><0.005。将密封剂混合物放置在模具附近或模具上，使得模具，模具布线和/或模具连接的边缘电场暴露于比没有填料的塑料封装的较小的ε和/或三角洲。

5. 发明申请

US20130256858A1 PCB Based RF-Power Package Window Frame 有权
公开(公告)号：US20130256858A1
公开(公告)日：2013-10-03
申请号：US13432333
申请日：2012-03-28
申请人： Alexander Komposch , Soon Ing Chew , Brian Condie
发明人： Alexander Komposch , Soon Ing Chew , Brian Condie
IPC分类号： H01L23/495 , H01L21/60
CPC分类号： H01L23/49844 , H01L21/76898 , H01L23/047 , H01L23/06 , H01L23/10 , H01L23/13 , H01L23/142 , H01L23/345 , H01L23/481 , H01L23/49827 , H01L23/5226 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/85 , H01L25/0657 , H01L2224/29144 , H01L2224/2919 , H01L2224/32245 , H01L2224/48137 , H01L2224/48195 , H01L2224/48227 , H01L2224/49109 , H01L2224/73265 , H01L2224/83447 , H01L2224/83801 , H01L2224/83805 , H01L2224/8385 , H01L2224/85447 , H01L2924/00014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01046 , H01L2924/01079 , H01L2924/01322 , H01L2924/10272 , H01L2924/10329 , H01L2924/1033 , H01L2924/1304 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/1421 , H01L2924/1531 , H01L2924/16251 , H01L2924/16787 , H01L2924/19041 , H01L2924/19105 , Y02P80/30 , H01L2924/01014 , H01L2924/0105 , H01L2924/01042 , H01L2924/01074 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package includes a baseplate having a die attach region and a peripheral region, a transistor die having a first terminal attached to the die attach region, and a second terminal and a third terminal facing away from the baseplate, and a frame including an electrically insulative member having a first side attached to the peripheral region of the baseplate, a second side facing away from the baseplate, a first metallization at the first side of the insulative member and a second metallization at the second side of the insulative member. The insulative member extends outward beyond a lateral sidewall of the baseplate. The first metallization is attached to the part of the first side which extends outward beyond the lateral sidewall of the baseplate. The first and second metallizations are electrically connected at a region of the insulative member spaced apart from the lateral sidewall of the baseplate.

6. 发明申请

US20060014280A1 Compositions and methods for enrichment of neural stem cells using ceramide analogs 失效
标题翻译：使用神经酰胺类似物富集神经干细胞的组合物和方法
公开(公告)号：US20060014280A1
公开(公告)日：2006-01-19
申请号：US10529115
申请日：2003-09-25
申请人： Brian Condie , Erhard Bieberich
发明人： Brian Condie , Erhard Bieberich
IPC分类号： C12N5/08
CPC分类号： C12N5/0618 , C12N5/0619 , C12N2500/34 , C12N2500/36 , C12N2500/90 , C12N2502/14 , C12N2506/02
摘要： The present invention provides compositions and methods for human neural cell production. More particularly, the present invention provides cellular differentiation methods employing amphiphilic lipid compounds, preferably ceramide analogs of the β-hydroxyalkylamine type and optionally employing an essentially serum free MEDII conditioned medium for the generation of human neural cells from pluripotent human cells. The methods alternatively comprise modulating apoptosis by modifying the levels of PAR-4, with or without the presence of amphiphilic lipid compounds and optionally employing MEDII conditioned medium. The methods alternatively encompass modulating apoptosis by modulating the intracellular concentration of endogenous lipid second messengers, such as ceramide.
摘要翻译：本发明提供了人神经细胞产生的组合物和方法。更具体地，本发明提供了使用两亲性脂质化合物，优选β-羟烷基胺类型的神经酰胺类似物的细胞分化方法，并且任选地使用基本上无血清的MEDII条件培养基用于从多能人细胞产生人神经细胞。所述方法或者包括通过修饰PAR-4的水平来调节凋亡，伴有或不存在两亲脂质化合物和任选地使用MEDII条件培养基。所述方法或者包括通过调节内源脂质第二信使（例如神经酰胺）的细胞内浓度调节凋亡。

7. 发明申请

US20070235855A1 Methods and apparatus for a reduced inductance wirebond array 有权
标题翻译：减小电感引线阵列的方法和装置
公开(公告)号：US20070235855A1
公开(公告)日：2007-10-11
申请号：US11393582
申请日：2006-03-29
申请人： Mario Bokatius , Peter Aaen , Brian Condie
发明人： Mario Bokatius , Peter Aaen , Brian Condie
IPC分类号： H01L23/52
CPC分类号： H01L23/552 , H01L23/642 , H01L23/66 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/85 , H01L2223/6611 , H01L2224/05554 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48011 , H01L2224/48091 , H01L2224/48137 , H01L2224/48195 , H01L2224/48472 , H01L2224/49175 , H01L2224/49176 , H01L2224/49433 , H01L2224/85205 , H01L2924/01006 , H01L2924/01013 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/10329 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/00014 , H01L2924/00
摘要： A wirebond array (100) comprising a plurality of signal wires 110 and a plurality of ground wires (120) interdigitated with and substantially parallel to the set of signal wires (110). In one embodiment, each of the plurality of signal wires (110) and ground wires (120) is attached to a first semiconductor device (102) (e.g., a microwave power device). In another, each of the plurality of signal wires (110) is further attached to a package lead (104). In one embodiment, each of the plurality of ground wires (120) is further attached to a ground connection region (106) substantially coplanar with the package lead (104). Alternatively, each of the plurality of signal wires (110) is further attached to a second semiconductor device, wherein each of the plurality of ground wires (120) is further attached to the second semiconductor device.
摘要翻译：一种引线键盘阵列（100），包括多个信号线110和与该组信号线（110）交叉并基本上平行的多个接地线（120）。在一个实施例中，多个信号线（110）和接地线（120）中的每一个连接到第一半导体器件（102）（例如，微波功率器件）。在另一个中，多个信号线（110）中的每一个进一步连接到封装引线（104）。在一个实施例中，多个接地线（120）中的每一个进一步连接到基本上与封装引线（104）共面的接地连接区域（106）。或者，多个信号线（110）中的每一个还被附接到第二半导体器件，其中多个接地线（120）中的每一个进一步附接到第二半导体器件。

8. 发明申请

US20060194315A1 Compositions and methods for the control, differentiaton and/or manipulation of pluripotent cells through a gamma-secretase signaling pathway 审中-公开
标题翻译：通过γ-分泌酶信号通路控制，分化和/或操纵多能细胞的组合物和方法
公开(公告)号：US20060194315A1
公开(公告)日：2006-08-31
申请号：US10551876
申请日：2004-03-31
申请人： Brian Condie , Allan Robins , Scott Noggle
发明人： Brian Condie , Allan Robins , Scott Noggle
IPC分类号： C12N5/08
CPC分类号： C07K16/18 , C12N5/0606 , C12N2501/42
摘要： The current invention relates to the control and/or manipulation of the gamma-secretase signaling pathway in pluripotent cells to stabilize the cells in a pluripotent state and/or to control the differentiation of the pluripotent cells towards a differentiated state. The invention further includes feeder layers that contain or express ligands or other compounds that inhibit gamma-secretase or Notch signaling to enhance the maintenance of pluripotent cells in a pluripotent state. The invention also includes cell culture compositions that comprise pluripotent cells and inhibitors of gamma-secretase, or activators or inhibitors of Notch signaling.
摘要翻译：本发明涉及在多能细胞中控制和/或操纵γ-分泌酶信号通路，以稳定多能状态的细胞和/或控制多能细胞向分化状态的分化。本发明还包括含有或表达抑制γ-分泌酶或Notch信号传导以增强多能细胞多能细胞维持的配体或其它化合物的饲养层。本发明还包括包含多能细胞和γ-分泌酶抑制剂或Notch信号传导激活剂或抑制剂的细胞培养组合物。

9. 发明申请

US20060121607A1 Compositions and methods for neural differentiation of embryonic stem cells 审中-公开
标题翻译：胚胎干细胞神经分化的组成和方法
公开(公告)号：US20060121607A1
公开(公告)日：2006-06-08
申请号：US10524157
申请日：2003-08-08
申请人： Thomas Schulz , Steven Stice , Brian Condie , Bruce Davidson
发明人： Thomas Schulz , Steven Stice , Brian Condie , Bruce Davidson
IPC分类号： C12N5/08
CPC分类号： C12N5/0618 , A61K35/12 , C12N5/0619 , C12N2500/32 , C12N2500/90 , C12N2501/115 , C12N2501/91 , C12N2502/13 , C12N2506/02
摘要： The present invention provides compositions and methods for human neural cell production. More particularly, the present invention provides cellular differentiation methods employing an essentially serum free MEDII conditioned medium for the generation of human neural cells from pluripotent and multipotent human stem cells.
摘要翻译：本发明提供了人神经细胞产生的组合物和方法。更具体地，本发明提供了使用基本上无血清的MEDII条件培养基用于从多能和多能人干细胞产生人神经细胞的细胞分化方法。

10. 发明申请

US20070090514A1 Semiconductor structure and method of manufacture 有权
标题翻译：半导体结构及制造方法
公开(公告)号：US20070090514A1
公开(公告)日：2007-04-26
申请号：US11257783
申请日：2005-10-24
申请人： Brian Condie , Lakshminarayan Viswanathan , Richard Wetz
发明人： Brian Condie , Lakshminarayan Viswanathan , Richard Wetz
IPC分类号： H01L23/12
CPC分类号： H01L23/13 , H01L23/10 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/45111 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/48464 , H01L2224/49 , H01L2224/73265 , H01L2224/92 , H01L2224/92247 , H01L2924/01007 , H01L2924/01014 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/10329 , H01L2924/12044 , H01L2924/15153 , H01L2924/1517 , H01L2924/16195 , H01L2924/181 , H01L2924/18301 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/01025 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor structure (100) includes a substrate (110) having a first surface (111) with a mold lock feature (101). The semiconductor structure also includes a semiconductor chip (120) located over the first surface of the substrate. The semiconductor structure further includes an electrical isolator structure (340) located over the first surface of the substrate. The electrical isolator structure includes an electrical lead (341, 342) and an electrically insulative element (343) molded to the electrical lead. An optional portion (444) of the electrical isolator structure is located in the mold lock feature. The semiconductor structure additionally includes an adhesive element (450) located between and coupling the electrical isolator structure and the first surface of the substrate.
摘要翻译：半导体结构（100）包括具有模具锁定特征（101）的第一表面（111）的基板（110）。半导体结构还包括位于衬底的第一表面上方的半导体芯片（120）。半导体结构还包括位于衬底的第一表面上方的电隔离器结构（340）。电隔离器结构包括电引线（341,342）和模制到电引线上的电绝缘元件（343）。电隔离器结构的可选部分（444）位于模具锁定特征中。半导体结构还包括位于电隔离器结构和衬底的第一表面之间的耦合的粘合元件（450）。

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