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    • 9. 发明授权
    • Fall time accelerator circuit
    • 下降时间加速器电路
    • US07992030B2
    • 2011-08-02
    • US11746102
    • 2007-05-09
    • Henry G. McMillanPravin PatelChallis L. PurringtonGwendolyn R. TobinChristopher C. WestIvan R. Zapata
    • Henry G. McMillanPravin PatelChallis L. PurringtonGwendolyn R. TobinChristopher C. WestIvan R. Zapata
    • G06F1/00
    • H03K5/1534H03K19/01721
    • Embodiments of the invention address deficiencies of the art in respect to digital signal transmissions and provide a novel and non-obvious fall time accelerator circuit for use in a USB interface. In one embodiment of the invention, the USB interface can include a USB port driver coupled to a host controller driver over a USB bus. The USB interface also can include a fall time accelerator circuit coupled to the USB bus between the USB port driver and the host controller driver. The fall time accelerator circuit can include a pulse signal generator coupled to an inbound signal path from the USB bus and arranged to generate a tunable pulse upon detecting a falling edge of a digital signal on the inbound signal path. The circuit further can include an active timer additionally coupled to the inbound signal path to hold the tunable pulse for a set period of time. Finally, the circuit can include a falling drive signal strengthener coupled to an outbound signal path from the pulse signal generator arranged to release the tunable pulse on the outbound signal path onto the USB bus.
    • 本发明的实施例解决了与数字信号传输相关的技术缺陷,并且提供了一种用于USB接口的新颖且不可见的下降时间加速器电路。 在本发明的一个实施例中,USB接口可以包括通过USB总线耦合到主控制器驱动器的USB端口驱动器。 USB接口还可以包括在USB端口驱动器和主机控制器驱动器之间耦合到USB总线的下降时间加速器电路。 下降时间加速器电路可以包括耦合到来自USB总线的入站信号路径的脉冲信号发生器,并且被布置成在检测入站信号路径上的数字信号的下降沿时产生可调脉冲。 电路还可以包括另外耦合到入站信号路径的有源定时器,以将可调谐脉冲保持一段时间。 最后,电路可以包括耦合到来自脉冲信号发生器的出站信号路径的下降驱动信号加强器,该脉冲信号发生器布置成将出站信号路径上的可调谐脉冲释放到USB总线上。
    • 10. 发明申请
    • FALL TIME ACCELERATOR CIRCUIT
    • 落地时间加速器电路
    • US20080278207A1
    • 2008-11-13
    • US11746102
    • 2007-05-09
    • Henry G. McMillanPravin PatelChallis L. PurringtonGwendolyn R. TobinChristopher C. WestIvan R. Zapata
    • Henry G. McMillanPravin PatelChallis L. PurringtonGwendolyn R. TobinChristopher C. WestIvan R. Zapata
    • H03K5/12
    • H03K5/1534H03K19/01721
    • Embodiments of the invention address deficiencies of the art in respect to digital signal transmissions and provide a novel and non-obvious fall time accelerator circuit for use in a USB interface. In one embodiment of the invention, the USB interface can include a USB port driver coupled to a host controller driver over a USB bus. The USB interface also can include a fall time accelerator circuit coupled to the USB bus between the USB port driver and the host controller driver. The fall time accelerator circuit can include a pulse signal generator coupled to an inbound signal path from the USB bus and arranged to generate a tunable pulse upon detecting a falling edge of a digital signal on the inbound signal path. The circuit further can include an active timer additionally coupled to the inbound signal path to hold the tunable pulse for a set period of time. Finally, the circuit can include a falling drive signal strengthener coupled to an outbound signal path from the pulse signal generator arranged to release the tunable pulse on the outbound signal path onto the USB bus.
    • 本发明的实施例解决了与数字信号传输相关的技术缺陷,并且提供了一种用于USB接口的新颖且不可见的下降时间加速器电路。 在本发明的一个实施例中,USB接口可以包括通过USB总线耦合到主控制器驱动器的USB端口驱动器。 USB接口还可以包括在USB端口驱动器和主机控制器驱动器之间耦合到USB总线的下降时间加速器电路。 下降时间加速器电路可以包括耦合到来自USB总线的入站信号路径的脉冲信号发生器,并且被布置成在检测入站信号路径上的数字信号的下降沿时产生可调脉冲。 电路还可以包括另外耦合到入站信号路径的有源定时器,以将可调谐脉冲保持一段时间。 最后,电路可以包括耦合到来自脉冲信号发生器的出站信号路径的下降驱动信号加强器,该脉冲信号发生器布置成将出站信号路径上的可调谐脉冲释放到USB总线上。