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1. 发明授权

US07851315B2 Method for fabricating a field effect transistor having a dual thickness gate electrode 有权
标题翻译：制造具有双厚度栅电极的场效应晶体管的方法
公开(公告)号：US07851315B2
公开(公告)日：2010-12-14
申请号：US12037113
申请日：2008-02-26
申请人： Brent Alan Anderson , Andres Bryant , William F. Clark, Jr. , Edward Joseph Nowak
发明人： Brent Alan Anderson , Andres Bryant , William F. Clark, Jr. , Edward Joseph Nowak
IPC分类号： H01L21/336
CPC分类号： H01L29/42384 , H01L29/66772 , H01L29/78654
摘要： A field effect transistor and a method of fabricating the field effect transistor. The field effect transistor includes: a silicon body, a perimeter of the silicon body abutting a dielectric isolation; a source and a drain formed in the body and on opposite sides of a channel formed in the body; and a gate dielectric layer between the body and an electrically conductive gate electrode, a bottom surface of the gate dielectric layer in direct physical contact with a top surface of the body and a bottom surface the gate electrode in direct physical contact with a top surface of the gate dielectric layer, the gate electrode having a first region having a first thickness and a second region having a second thickness, the first region extending along the top surface of the gate dielectric layer over the channel region, the second thickness greater than the first thickness.
摘要翻译：场效应晶体管和制造场效应晶体管的方法。场效应晶体管包括：硅体，硅体的周边抵靠电介质隔离; 源体和漏极，其形成在主体中并形成在主体中的通道的相对侧上; 以及位于主体和导电栅电极之间的栅极电介质层，栅极电介质层的与表面主体直接物理接触的底表面和栅电极与所述栅极电介质层，所述栅电极具有第一厚度的第一区域和具有第二厚度的第二区域，所述第一区域沿着所述沟道区域上的所述栅极电介质层的顶表面延伸，所述第二厚度大于所述第一厚度厚度。

2. 发明授权

US07374980B2 Field effect transistor with thin gate electrode and method of fabricating same 有权
标题翻译：具有薄栅电极的场效应晶体管及其制造方法
公开(公告)号：US07374980B2
公开(公告)日：2008-05-20
申请号：US11549311
申请日：2006-10-13
申请人： Brent Alan Anderson , Andres Bryant , William F. Clark, Jr. , Edward Joseph Nowak
发明人： Brent Alan Anderson , Andres Bryant , William F. Clark, Jr. , Edward Joseph Nowak
IPC分类号： H01L21/84 , H01L21/8242
CPC分类号： H01L29/42384 , H01L29/66772 , H01L29/78654
摘要： A field effect transistor and a method of fabricating the field effect transistor. The field effect transistor includes: a silicon body, a perimeter of the silicon body abutting a dielectric isolation; a source and a drain formed in the body and on opposite sides of a channel formed in the body; and a gate dielectric layer between the body and an electrically conductive gate electrode, a bottom surface of the gate dielectric layer in direct physical contact with a top surface of the body and a bottom surface the gate electrode in direct physical contact with a top surface of the gate dielectric layer, the gate electrode having a first region having a first thickness and a second region having a second thickness, the first region extending along the top surface of the gate dielectric layer over the channel region, the second thickness greater than the first thickness.
摘要翻译：场效应晶体管和制造场效应晶体管的方法。场效应晶体管包括：硅体，硅体的周边抵靠电介质隔离; 源体和漏极，其形成在主体中并形成在主体中的通道的相对侧上; 以及位于主体和导电栅电极之间的栅极电介质层，栅极电介质层的与表面主体直接物理接触的底表面和栅电极与所述栅极电介质层，所述栅电极具有第一厚度的第一区域和具有第二厚度的第二区域，所述第一区域沿着所述沟道区域上的所述栅极电介质层的顶表面延伸，所述第二厚度大于所述第一厚度厚度。

3. 发明授权

US07560753B2 Field effect transistor with thin gate electrode and method of fabricating same 有权
标题翻译：具有薄栅电极的场效应晶体管及其制造方法
公开(公告)号：US07560753B2
公开(公告)日：2009-07-14
申请号：US12037121
申请日：2008-02-26
申请人： Brent Alan Anderson , Andres Bryant , William F. Clark, Jr. , Edward Joseph Nowak
发明人： Brent Alan Anderson , Andres Bryant , William F. Clark, Jr. , Edward Joseph Nowak
IPC分类号： H01L29/78 , H01L21/64
CPC分类号： H01L29/42384 , H01L29/66772 , H01L29/78654
摘要： A field effect transistor and a method of fabricating the field effect transistor. The field effect transistor includes: a silicon body, a perimeter of the silicon body abutting a dielectric isolation; a source and a drain formed in the body and on opposite sides of a channel formed in the body; and a gate dielectric layer between the body and an electrically conductive gate electrode, a bottom surface of the gate dielectric layer in direct physical contact with a top surface of the body and a bottom surface the gate electrode in direct physical contact with a top surface of the gate dielectric layer, the gate electrode having a first region having a first thickness and a second region having a second thickness, the first region extending along the top surface of the gate dielectric layer over the channel region, the second thickness greater than the first thickness.
摘要翻译：场效应晶体管和制造场效应晶体管的方法。场效应晶体管包括：硅体，硅体的周边抵靠电介质隔离; 源体和漏极，其形成在主体中并形成在主体中的通道的相对侧上; 以及位于主体和导电栅电极之间的栅极电介质层，栅极电介质层的与表面主体直接物理接触的底表面和栅电极与所述栅极电介质层，所述栅电极具有第一厚度的第一区域和具有第二厚度的第二区域，所述第一区域沿着所述沟道区域上的所述栅极电介质层的顶表面延伸，所述第二厚度大于所述第一厚度厚度。

4. 发明申请

US20080213964A1 FIELD EFFECT TRANSISTOR WITH THIN GATE ELECTRODE AND METHOD OF FABRICATING SAME 有权
公开(公告)号：US20080213964A1
公开(公告)日：2008-09-04
申请号：US12037113
申请日：2008-02-26
申请人： Brent Alan Anderson , Andres Bryant , William F. Clark , Edward Joseph Nowak
发明人： Brent Alan Anderson , Andres Bryant , William F. Clark , Edward Joseph Nowak
IPC分类号： H01L21/336
CPC分类号： H01L29/42384 , H01L29/66772 , H01L29/78654
摘要： A field effect transistor and a method of fabricating the field effect transistor. The field effect transistor includes: a silicon body, a perimeter of the silicon body abutting a dielectric isolation; a source and a drain formed in the body and on opposite sides of a channel formed in the body; and a gate dielectric layer between the body and an electrically conductive gate electrode, a bottom surface of the gate dielectric layer in direct physical contact with a top surface of the body and a bottom surface the gate electrode in direct physical contact with a top surface of the gate dielectric layer, the gate electrode having a first region having a first thickness and a second region having a second thickness, the first region extending along the top surface of the gate dielectric layer over the channel region, the second thickness greater than the first thickness.

5. 发明申请

US20080142806A1 COMBINATION PLANAR FET AND finFET DEVICE 有权
标题翻译：组合平面FET和鳍FETFET器件
公开(公告)号：US20080142806A1
公开(公告)日：2008-06-19
申请号：US11610533
申请日：2006-12-14
申请人： Brent Alan Anderson , Andres Bryant , William F. Clark , Edward Joseph Nowak
发明人： Brent Alan Anderson , Andres Bryant , William F. Clark , Edward Joseph Nowak
IPC分类号： H01L29/04
CPC分类号： H01L29/785 , H01L21/823821 , H01L27/0924 , H01L29/66795
摘要： A semiconductor device. The device including: a planar FET formed in a single crystal-silicon substrate, the FET comprising a first channel region, first and second source drains on opposite sides of the first channel region and a gate, the gate over the channel region and electrically isolated from the channel region by a first gate dielectric layer; and a FinFET formed in single crystal silicon block on top of and electrically isolated from the substrate, the FinFET comprising a second channel region, third and fourth source drains on opposite first and second ends of a second channel region and the gate, the gate electrically isolated from the second channel region by a second gate dielectric layer.
摘要翻译：半导体器件。该器件包括：形成在单晶硅衬底中的平面FET，所述FET包括第一沟道区，在第一沟道区的相对侧上的第一和第二源极漏极和栅极，沟道区上方的栅极和电隔离从所述沟道区域通过第一栅极介电层; 以及在衬底顶部并与电极隔离的单晶硅块中形成的FinFET，所述FinFET包括第二沟道区，第三和第四源在第二沟道区的相对的第一和第二端上漏极，栅极电通过第二栅极介电层与第二沟道区隔离。

6. 发明申请

US20080090367A1 Field effect transistor with thin gate electrode and method of fabricating same 有权
公开(公告)号：US20080090367A1
公开(公告)日：2008-04-17
申请号：US11549311
申请日：2006-10-13
申请人： Brent Alan Anderson , Andres Bryant , William F. Clark , Edward Joseph Nowak
发明人： Brent Alan Anderson , Andres Bryant , William F. Clark , Edward Joseph Nowak
IPC分类号： H01L21/336
CPC分类号： H01L29/42384 , H01L29/66772 , H01L29/78654
摘要： A field effect transistor and a method of fabricating the field effect transistor. The field effect transistor includes: a silicon body, a perimeter of the silicon body abutting a dielectric isolation; a source and a drain formed in the body and on opposite sides of a channel formed in the body; and a gate dielectric layer between the body and an electrically conductive gate electrode, a bottom surface of the gate dielectric layer in direct physical contact with a top surface of the body and a bottom surface the gate electrode in direct physical contact with a top surface of the gate dielectric layer, the gate electrode having a first region having a first thickness and a second region having a second thickness, the first region extending along the top surface of the gate dielectric layer over the channel region, the second thickness greater than the first thickness.

7. 发明申请

US20090263949A1 TRANSISTORS HAVING ASYMMETRIC STRAINED SOURCE/DRAIN PORTIONS 有权
标题翻译：具有不对称应变源/漏区的晶体管
公开(公告)号：US20090263949A1
公开(公告)日：2009-10-22
申请号：US12104475
申请日：2008-04-17
申请人： Brent Alan Anderson , Andres Bryant , Edward Joseph Nowak
发明人： Brent Alan Anderson , Andres Bryant , Edward Joseph Nowak
IPC分类号： H01L21/336
CPC分类号： H01L29/7848 , H01L29/66795 , H01L29/785
摘要： A structure formation method. First, a structure is provided including (a) a fin region comprising (i) a first source/drain portion having a first surface and a third surface parallel to each other, not coplanar, and both exposed to a surrounding ambient, (ii) a second source/drain portion having a second surface and a fourth surface parallel to each other, not coplanar, and both exposed to the surrounding ambient, and (iii) a channel region disposed between the first and second source/drain portions, (b) a gate dielectric layer, and (c) a gate electrode region, wherein the gate dielectric layer (i) is sandwiched between, and (ii) electrically insulates the gate electrode region and the channel region. Next, a patterned covering layer is used to cover the first and second surfaces but not the third and fourth surfaces. Then, the first and second source/drain portions are etched at the third and fourth surfaces, respectively.
摘要翻译：一种结构形成方法。首先，提供一种结构，其包括（a）翅片区域，其包括：（i）第一源极/漏极部分，其具有彼此平行的第一表面和第三表面，不共面，并且暴露于周围环境;（ii）第二源极/漏极部分，具有彼此平行的第二表面和第四表面，不共面，并暴露于周围环境;以及（iii）设置在第一和第二源极/漏极部分之间的沟道区域，（b ）栅介质层，和（c）栅电极区，其中所述栅介质层（i）夹在其间，和（ii）使所述栅电极区和所述沟道区电绝缘。接下来，使用图案化覆盖层来覆盖第一表面和第二表面而不是第三表面和第四表面。然后，分别在第三和第四表面处蚀刻第一和第二源极/漏极部分。

8. 发明申请

US20080157188A1 FIELD EFFECT TRANSISTOR WITH THIN GATE ELECTRODE AND METHOD OF FABRICATING SAME 有权
标题翻译：具有薄门电极的场效应晶体管及其制造方法
公开(公告)号：US20080157188A1
公开(公告)日：2008-07-03
申请号：US12037121
申请日：2008-02-26
申请人： Brent Alan Anderson , Andres Bryant , William F. Clark , Edward Joseph Nowak
发明人： Brent Alan Anderson , Andres Bryant , William F. Clark , Edward Joseph Nowak
IPC分类号： H01L29/00
CPC分类号： H01L29/42384 , H01L29/66772 , H01L29/78654
摘要： A field effect transistor and a method of fabricating the field effect transistor. The field effect transistor includes: a silicon body, a perimeter of the silicon body abutting a dielectric isolation; a source and a drain formed in the body and on opposite sides of a channel formed in the body; and a gate dielectric layer between the body and an electrically conductive gate electrode, a bottom surface of the gate dielectric layer in direct physical contact with a top surface of the body and a bottom surface the gate electrode in direct physical contact with a top surface of the gate dielectric layer, the gate electrode having a first region having a first thickness and a second region having a second thickness, the first region extending along the top surface of the gate dielectric layer over the channel region, the second thickness greater than the first thickness.
摘要翻译：场效应晶体管和制造场效应晶体管的方法。场效应晶体管包括：硅体，硅体的周边抵靠电介质隔离; 源体和漏极，其形成在主体中并形成在主体中的通道的相对侧上; 以及位于主体和导电栅电极之间的栅极电介质层，栅极电介质层的与表面主体直接物理接触的底表面和栅电极与所述栅极电介质层，所述栅电极具有第一厚度的第一区域和具有第二厚度的第二区域，所述第一区域沿着所述沟道区域上的所述栅极电介质层的顶表面延伸，所述第二厚度大于所述第一厚度厚度。

9. 发明授权

US07964465B2 Transistors having asymmetric strained source/drain portions 有权
标题翻译：具有不对称应变源极/漏极部分的晶体管
公开(公告)号：US07964465B2
公开(公告)日：2011-06-21
申请号：US12104475
申请日：2008-04-17
申请人： Brent Alan Anderson , Andres Bryant , Edward Joseph Nowak
发明人： Brent Alan Anderson , Andres Bryant , Edward Joseph Nowak
IPC分类号： H01L21/336
CPC分类号： H01L29/7848 , H01L29/66795 , H01L29/785
摘要： A structure formation method. First, a structure is provided including (a) a fin region comprising (i) a first source/drain portion having a first surface and a third surface parallel to each other, not coplanar, and both exposed to a surrounding ambient, (ii) a second source/drain portion having a second surface and a fourth surface parallel to each other, not coplanar, and both exposed to the surrounding ambient, and (iii) a channel region disposed between the first and second source/drain portions, (b) a gate dielectric layer, and (c) a gate electrode region, wherein the gate dielectric layer (i) is sandwiched between, and (ii) electrically insulates the gate electrode region and the channel region. Next, a patterned covering layer is used to cover the first and second surfaces but not the third and fourth surfaces. Then, the first and second source/drain portions are etched at the third and fourth surfaces, respectively.
摘要翻译：一种结构形成方法。首先，提供一种结构，其包括（a）翅片区域，其包括：（i）第一源极/漏极部分，其具有彼此平行的第一表面和第三表面，不共面，并且暴露于周围环境;（ii）第二源极/漏极部分，具有彼此平行的第二表面和第四表面，不共面，并暴露于周围环境;以及（iii）设置在第一和第二源极/漏极部分之间的沟道区域，（b ）栅介质层，和（c）栅电极区，其中所述栅介质层（i）夹在其间，和（ii）使所述栅电极区和所述沟道区电绝缘。接下来，使用图案化覆盖层来覆盖第一表面和第二表面而不是第三表面和第四表面。然后，分别在第三和第四表面处蚀刻第一和第二源极/漏极部分。

10. 发明申请

US20090261380A1 TRANSISTORS HAVING ASYMETRIC STRAINED SOURCE/DRAIN PORTIONS 有权
标题翻译：具有非晶态应变源/漏极区的晶体管
公开(公告)号：US20090261380A1
公开(公告)日：2009-10-22
申请号：US12104513
申请日：2008-04-17
申请人： Brent Alan Anderson , Andres Bryant , Edward Joseph Nowak
发明人： Brent Alan Anderson , Andres Bryant , Edward Joseph Nowak
IPC分类号： H01L29/78
CPC分类号： H01L29/785 , H01L29/66795 , H01L29/7848
摘要： A semiconductor structure. The structure includes (a) a fin region having (i) a first source/drain portion having a first surface and a third surface, wherein the first and third surfaces are (A) parallel to each other and (B) not coplanar, (ii) a second source/drain portion having a second surface and a fourth surface, wherein the second and fourth surfaces are (A) parallel to each other and (B) not coplanar, and (iii) a channel region; (b) a gate dielectric layer; (c) a gate electrode region, wherein the gate dielectric layer (i) is sandwiched between, and (ii) electrically insulates the gate electrode region and the channel region; and (d) first second strain creating regions on the third and fourth surfaces, respectively, wherein the first and second strain creating regions comprise a strain creating material.
摘要翻译：半导体结构。该结构包括（a）翅片区域，其具有（i）具有第一表面和第三表面的第一源极/漏极部分，其中第一和第三表面是彼此平行的（A）和（B）不是共面的，（ ii）具有第二表面和第四表面的第二源极/漏极部分，其中第二和第四表面是彼此平行的（A）和（B）不共面的，（iii）沟道区域; （b）栅介质层; （c）栅极电极区域，其中所述栅极电介质层（i）夹在其间，和（ii）使所述栅电极区域和所述沟道区域电绝缘; 和（d）分别在第三和第四表面上的第一第二应变产生区域，其中第一和第二应变产生区域包括应变产生材料。

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