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1. 发明授权

US07952418B2 Enhanced transistor gate drive 有权
标题翻译：增强晶体管栅极驱动
公开(公告)号：US07952418B2
公开(公告)日：2011-05-31
申请号：US12163072
申请日：2008-06-27
申请人： Brent A. McDonald , George G. Richards, III , Brian P. Johnson
发明人： Brent A. McDonald , George G. Richards, III , Brian P. Johnson
IPC分类号： H03K17/687
CPC分类号： H03K17/165 , H03K17/145 , H03K2217/0036
摘要： An enhanced transistor gate drive is disclosed in which a pair of Kelvin sense leads measure the voltage potential across at the gate and source of the transistor. The difference in the voltage potential of the Kelvin sense lead from the gate and the Kelvin sense lead of the source is provided to a voltage controlled current source, which compares the output of the voltage differentiator to an oscillating voltage input. Changes to the voltage difference between the Kelvin sense connectors will result in more or less voltage being applied at the gate of the transistor, thereby parasitic inductance in the transistor from causing the device to switch on and off.
摘要翻译：公开了一种增强的晶体管栅极驱动器，其中一对开尔文感测引线测量晶体管的栅极和源极两端的电压电位。来自栅极的开尔文感测引线和源极的开尔文感测引线的电压电位的差异被提供给电压控制电流源，其将电压微分器的输出与振荡电压输入进行比较。对开尔文感测连接器之间的电压差的改变将导致在晶体管的栅极处施加或多或少的电压，从而晶体管中的寄生电感导致器件导通和截止。

2. 发明申请

US20090322405A1 Enhanced Transistor Gate Drive 有权
标题翻译：增强型晶体管栅极驱动
公开(公告)号：US20090322405A1
公开(公告)日：2009-12-31
申请号：US12163072
申请日：2008-06-27
申请人： Brent A. McDonald , George G. Richards, III , Brian P. Johnson
发明人： Brent A. McDonald , George G. Richards, III , Brian P. Johnson
IPC分类号： H03K17/00
CPC分类号： H03K17/165 , H03K17/145 , H03K2217/0036
摘要： An enhanced transistor gate drive is disclosed in which a pair of Kelvin sense leads measure the voltage potential across at the gate and source of the transistor. The difference in the voltage potential of the Kelvin sense lead from the gate and the Kelvin sense lead of the source is provided to a voltage controlled current source, which compares the output of the voltage differentiator to an oscillating voltage input. Changes to the voltage difference between the Kelvin sense connectors will result in more or less voltage being applied at the gate of the transistor, thereby parasitic inductance in the transistor from causing the device to switch on and off.
摘要翻译：公开了一种增强的晶体管栅极驱动器，其中一对开尔文感测引线测量晶体管的栅极和源极两端的电压电位。来自栅极的开尔文感测引线和源极的开尔文感测引线的电压电位的差异被提供给电压控制电流源，其将电压微分器的输出与振荡电压输入进行比较。对开尔文感测连接器之间的电压差的改变将导致在晶体管的栅极处施加或多或少的电压，从而晶体管中的寄生电感导致器件导通和截止。

3. 发明申请

US20090146622A1 PHASE SHEDDING CONVERTER WITH RIPPLE MINIMIZATION 有权
标题翻译：相位切换转换器，具有纹波最小化
公开(公告)号：US20090146622A1
公开(公告)日：2009-06-11
申请号：US11953985
申请日：2007-12-11
申请人： Brent A. McDonald , George G. Richards, III
发明人： Brent A. McDonald , George G. Richards, III
IPC分类号： G05F1/00
CPC分类号： H02M3/1584 , H02M2001/0032 , Y02B70/16
摘要： In an information handling system, a multi-phase electrical converter includes an electrical input, an electrical output, a plurality of converter phases coupled with the electrical input and the electrical output, and a controller to ramp operation of one or more of the converter phases as a load demand adjusts. In an embodiment the converter may be a multi-phase buck converter having a high side switch, a low side switch, and an inductor. In an embodiment, the controller may ramp operation of the converter phases by adjusting a duty cycle of the high side switch. In an embodiment, the controller may adjust a phase angle of one or more of the converter phases, wherein the adjustment may be relative to the ramping operation of the one or more of the converter phases.
摘要翻译：在信息处理系统中，多相电气转换器包括电输入，电输出，与电输入和电输出耦合的多个转换器相，以及控制器，用于使一个或多个转换器相随着负载需求的调整。在一个实施例中，转换器可以是具有高侧开关，低侧开关和电感器的多相降压转换器。在一个实施例中，控制器可以通过调整高侧开关的占空比来斜升变换器相位的操作。在一个实施例中，控制器可以调整一个或多个转换器相的相位角，其中调整可以相对于一个或多个转换器相的斜坡运算。

4. 发明申请

US20110248689A1 PHASE SHEDDING CONVERTER WITH RIPPLE MINIMIZATION 有权
标题翻译：相位切换转换器，具有纹波最小化
公开(公告)号：US20110248689A1
公开(公告)日：2011-10-13
申请号：US13165922
申请日：2011-06-22
申请人： Brent A. McDonald , George G. Richards, III
发明人： Brent A. McDonald , George G. Richards, III
IPC分类号： G05F1/00
CPC分类号： H02M3/1584 , H02M2001/0032 , Y02B70/16
摘要： In an information handling system, a multi-phase electrical converter includes an electrical input, an electrical output, a plurality of converter phases coupled with the electrical input and the electrical output, and a controller to ramp operation of one or more of the converter phases as a load demand adjusts. In an embodiment the converter may be a multi-phase buck converter having a high side switch, a low side switch, and an inductor. In an embodiment, the controller may ramp operation of the converter phases by adjusting a duty cycle of the high side switch. In an embodiment, the controller may adjust a phase angle of one or more of the converter phases, wherein the adjustment may be relative to the ramping operation of the one or more of the converter phases.
摘要翻译：在信息处理系统中，多相电气转换器包括电输入，电输出，与电输入和电输出耦合的多个转换器相，以及控制器，用于使一个或多个转换器相随着负载需求的调整。在一个实施例中，转换器可以是具有高侧开关，低侧开关和电感器的多相降压转换器。在一个实施例中，控制器可以通过调整高侧开关的占空比来斜升变换器相位的操作。在一个实施例中，控制器可以调整一个或多个转换器相的相位角，其中调整可以相对于一个或多个转换器相的斜坡运算。

5. 发明授权

US07999519B2 Phase shedding converter with ripple minimization 有权
标题翻译：相位脱落转换器具有纹波最小化
公开(公告)号：US07999519B2
公开(公告)日：2011-08-16
申请号：US11953985
申请日：2007-12-11
申请人： Brent A. McDonald , George G. Richards, III
发明人： Brent A. McDonald , George G. Richards, III
IPC分类号： G05F1/00
CPC分类号： H02M3/1584 , H02M2001/0032 , Y02B70/16
摘要： In an information handling system, a multi-phase electrical converter includes an electrical input, an electrical output, a plurality of converter phases coupled with the electrical input and the electrical output, and a controller to ramp operation of one or more of the converter phases as a load demand adjusts. In an embodiment the converter may be a multi-phase buck converter having a high side switch, a low side switch, and an inductor. In an embodiment, the controller may ramp operation of the converter phases by adjusting a duty cycle of the high side switch. In an embodiment, the controller may adjust a phase angle of one or more of the converter phases, wherein the adjustment may be relative to the ramping operation of the one or more of the converter phases.
摘要翻译：在信息处理系统中，多相电气转换器包括电输入，电输出，与电输入和电输出耦合的多个转换器相，以及控制器，用于使一个或多个转换器相随着负载需求的调整。在一个实施例中，转换器可以是具有高侧开关，低侧开关和电感器的多相降压转换器。在一个实施例中，控制器可以通过调整高侧开关的占空比来斜升变换器相位的操作。在一个实施例中，控制器可以调整一个或多个转换器相的相位角，其中调整可以相对于一个或多个转换器相的斜坡运算。

6. 发明申请

US20120324246A1 SHARED NON-VOLATILE STORAGE FOR DIGITAL POWER CONTROL 有权
标题翻译：用于数字电源控制的共享非易失性存储
公开(公告)号：US20120324246A1
公开(公告)日：2012-12-20
申请号：US13163183
申请日：2011-06-17
申请人： Johan Rahardjo , Abey K. Mathew , George G. Richards, III , John J. Breen , Timothy M. Lambert
发明人： Johan Rahardjo , Abey K. Mathew , George G. Richards, III , John J. Breen , Timothy M. Lambert
IPC分类号： G06F1/26
CPC分类号： G06F1/26
摘要： Systems and methods may be implemented in a power device subsystem topology to provide an arbitration and communication scheme between a single consolidated non-volatile random access (NVRAM) memory device and multiple discrete digital power controller devices in a manner that provides data protection and the ability to update the full NVRAM content when needed.
摘要翻译：系统和方法可以在功率器件子系统拓扑中实现，以提供单个合并的非易失性随机存取（NVRAM）存储器件和多个分立数字功率控制器器件之间的仲裁和通信方案，以提供数据保护和能力在需要时更新NVRAM的完整内容。

7. 发明授权

US09568966B2 Dynamic power budget allocation 有权
标题翻译：动态功率预算分配
公开(公告)号：US09568966B2
公开(公告)日：2017-02-14
申请号：US13600489
申请日：2012-08-31
申请人： Stuart Allen Berke , George G. Richards, III
发明人： Stuart Allen Berke , George G. Richards, III
IPC分类号： G06F1/32 , G06F1/26
CPC分类号： G06F1/3287 , G06F1/26 , G06F1/3296
摘要： A dynamic power budget allocation system includes a plurality of powered subsystems. A power system controller is coupled to the plurality of powered subsystems. The power system controller is operable, for each of a plurality of time intervals, to retrieve power usage data from each of the plurality of subsystems during a current time interval. The power system controller is then operable to project power requirements for the plurality of subsystems for a subsequent time interval using the power usage data. The power system controller is then operable to determine at least one power setting for at least one of the plurality of subsystems using the power requirements, and program the at least one of the plurality of subsystems with the at least one power setting. Each powered subsystem may include a voltage regulator that provides the power usage data and is programmed with the at least one power setting.
摘要翻译：动态功率预算分配系统包括多个被动子系统。电力系统控制器耦合到多个被动子系统。对于多个时间间隔中的每一个，电力系统控制器可操作以在当前时间间隔期间从多个子系统中的每个子系统检索电力使用数据。电力系统控制器然后可操作以使用电力使用数据来为后续时间间隔投影多个子系统的电力需求。电力系统控制器然后可操作以使用电力需求来确定多个子系统中的至少一个子系统的至少一个功率设置，并且利用所述至少一个功率设置对多个子系统中的至少一个进行编程。每个受电子系统可以包括提供电力使用数据并且用至少一个功率设置编程的电压调节器。

8. 发明申请

US20090271649A1 VOLTAGE REGULATOR PHASE SHEDDING 审中-公开
标题翻译：电压调节器相位冲击
公开(公告)号：US20090271649A1
公开(公告)日：2009-10-29
申请号：US12109610
申请日：2008-04-25
申请人： John Loffink , George G. Richards, III
发明人： John Loffink , George G. Richards, III
IPC分类号： G06F1/00 , G11C5/14
CPC分类号： G11C5/147
摘要： A voltage regulator phase shedding system includes one or more subsystems to inventory memory power requirements of an IHS component, calculate a calculated memory power consumption, compare the calculated memory power consumption to a predetermined table of values to determine which phases of the voltage regulator to turn on, apply system power, assert desired phases of the voltage regulator after power is applied to the voltage regulator, and enable the voltage regulator to operate the desired phases of the voltage regulator.
摘要翻译：电压调节器相位脱落系统包括一个或多个子系统以清点IHS组件的存储器功率要求，计算计算的存储器功耗，将计算的存储器功耗与预定值进行比较，以确定电压调节器的哪些相位转开启，施加系统电源，在电压施加到电压调节器之后，确定电压调节器的所需相位，并使电压调节器能够操作电压调节器的所需相位。

9. 发明申请

US20140067139A1 DYNAMIC POWER BUDGET ALLOCATION 有权
标题翻译：动态功率预算分配
公开(公告)号：US20140067139A1
公开(公告)日：2014-03-06
申请号：US13600489
申请日：2012-08-31
申请人： Stuart Allen Berke , George G. Richards, III
发明人： Stuart Allen Berke , George G. Richards, III
IPC分类号： G06F1/32
CPC分类号： G06F1/3287 , G06F1/26 , G06F1/3296
摘要： A dynamic power budget allocation system includes a plurality of powered subsystems. A power system controller is coupled to the plurality of powered subsystems. The power system controller is operable, for each of a plurality of time intervals, to retrieve power usage data from each of the plurality of subsystems during a current time interval. The power system controller is then operable to project power requirements for the plurality of subsystems for a subsequent time interval using the power usage data. The power system controller is then operable to determine at least one power setting for at least one of the plurality of subsystems using the power requirements, and program the at least one of the plurality of subsystems with the at least one power setting. Each powered subsystem may include a voltage regulator that provides the power usage data and is programmed with the at least one power setting.
摘要翻译：动态功率预算分配系统包括多个被动子系统。电力系统控制器耦合到多个被动子系统。对于多个时间间隔中的每一个，电力系统控制器可操作以在当前时间间隔期间从多个子系统中的每个子系统检索电力使用数据。电力系统控制器然后可操作以使用电力使用数据来为后续时间间隔投影多个子系统的电力需求。电力系统控制器然后可操作以使用电力需求来确定多个子系统中的至少一个子系统的至少一个功率设置，并且利用所述至少一个功率设置对多个子系统中的至少一个进行编程。每个受电子系统可以包括提供电力使用数据并且用至少一个功率设置编程的电压调节器。

10. 发明申请

US20110040987A1 TIME AVERAGED DYNAMIC PHASE SHEDDING 审中-公开
标题翻译：时间平均动态相位冲击
公开(公告)号：US20110040987A1
公开(公告)日：2011-02-17
申请号：US12540048
申请日：2009-08-12
申请人： John Loffink , George G. Richards, III
发明人： John Loffink , George G. Richards, III
IPC分类号： G06F1/26 , G05F1/00
CPC分类号： G06F1/26
摘要： A time averaged dynamic phase shedding system includes a system to generate a first phase electrical pulse using a phase 1 pulse generator and generate a second phase electrical pulse using a phase 2 pulse generator. The electrical current of the first phase electrical pulse and the electrical current of the second phase electrical pulse are sensed. The electrical pulses are combined into an output signal where a voltage level of the output signal is sensed. The time averaged dynamic phase shedding system turns off the phase 2 pulse generator in response to an average output current being below a current threshold and turns on the phase 2 pulse generator in response to the output signal having a change in output voltage with respect to the change in time (dv/dt) outside of a dv/dt threshold.
摘要翻译：时间平均动态相位脱落系统包括使用相位1脉冲发生器产生第一相电脉冲并使用相位2脉冲发生器产生第二相电脉冲的系统。检测第一相电脉冲的电流和第二相电脉冲的电流。电脉冲被组合成输出信号，其中检测输出信号的电压电平。时间平均动态相位脱落系统响应于平均输出电流低于电流阈值而关闭相位2脉冲发生器，并响应于输出信号相对于输出电压具有变化而导通相位2脉冲发生器 dv / dt阈值以外的时间（dv / dt）变化。

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