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    • 1. 发明授权
    • Semiconductor switch including a power transistor integrated with a
temperature sensor therefor
    • 半导体开关包括与其温度传感器集成的功率晶体管
    • US5434443A
    • 1995-07-18
    • US240949
    • 1994-05-10
    • Brendon P. KellyRoyce LowisPaul T. Moody
    • Brendon P. KellyRoyce LowisPaul T. Moody
    • G01K7/01H01L21/822H01L27/02H01L27/04H01L29/78H01L27/088
    • H01L29/7803G01K7/01H01L27/0248H01L29/0696H01L29/41766
    • A semiconductor switch includes a power FET and a temperature sensor for providing a control signal to switch off the power FET when it reaches a predetermined thermal condition, such as a particular temperature. The power FET consists of a semiconductor body having a first region (13) of a first conductivity type adjacent one major surface (10a) thereof, and a plurality of cells (11). Each such cell has a second region (32) of the second (opposite) conductivity type provided within the first region (13), a third region (33) of the first conductivity type formed within the second region (32), and an insulated gate overlying a conduction channel in the second region (32) between the first and third regions (33 and 13). The temperature sensor (2) is formed within the semiconductor body (10) and consists of a number of further cells (11') of the same structure as the cells (11) of the power FET. The insulated gate of each further cell (11') is electrically connected to the third region (33') so as to form a parasitic bipolar transistor having a leakage current which varies with temperature, thereby enabling the temperature sensor to provide a control signal to switch off the power FET when the predetermined thermal condition is reached.
    • 半导体开关包括功率FET和温度传感器,用于当其达到诸如特定温度的预定热条件时提供控制信号以关断功率FET。 功率FET由具有邻近其主表面(10a)的第一导电类型的第一区域(13)和多个单元(11)的半导体本体组成。 每个这样的单元具有设置在第一区域(13)内的第二(相对)导电类型的第二区域(32),形成在第二区域(32)内的第一导电类型的第三区域(33) 栅极覆盖第一和第三区域(33和13)之间的第二区域(32)中的导电通道。 温度传感器(2)形成在半导体本体(10)内并且由与功率FET的单元(11)相同结构的多个另外的单元(11')组成。 每个另外的单元(11')的绝缘栅电连接到第三区(33'),以形成具有随温度变化的漏电流的寄生双极晶体管,从而使温度传感器能够提供控制信号 当达到预定的热条件时关闭功率FET。
    • 3. 发明授权
    • Semiconductor device having an IGET and a control or protection component
    • 具有IGET和控制或保护组件的半导体器件
    • US5466952A
    • 1995-11-14
    • US269810
    • 1994-06-30
    • Paul T. Moody
    • Paul T. Moody
    • H01L23/58H01L21/822H01L27/02H01L27/04H01L27/06H01L29/78H01L29/10
    • H01L29/7802H01L27/0251H01L29/41766H01L29/78H01L29/7803H01L29/7808H01L29/8605H01L29/861H01L29/866H01L2924/0002
    • A semiconductor body (2) has first and second major surfaces (2c and 2d) with a first region (2b) of one conductivity type adjacent the first major surface (2c). An insulated gate field effect transistor (6) is formed within the first region (2c) and has source and drain electrodes (S and D) and an insulated gate electrode (G). At least one further component (R4) is coupled between the insulated gate electrode (G) of the insulated gate field effect transistor (6) and a gate input terminal (GT). The further region requires a second region (21) of the opposite conductivity type provided within the first region (2b) so that a region (26) of the further component (R4), the second region (21) and the first region (2b) form a parasitic bipolar transistor (B). An insulating layer (30) on the first major surface (2c) carries a first rectifying element (D1) coupled between the base region (8) of the parasitic bipolar transistor (B) and the gate input terminal (GT) and a second rectifying element (D2) coupled between the emitter region (26) of the parasitic bipolar transistor (B) and the gate input terminal (GT) for causing, when the voltage difference between the source and insulated gate electrodes (S and G) reverses sign, the first and second rectifying elements (D1 and D2) in series with the base and emitter regions of the parasitic bipolar transistor (B) to become forward-biassed to reduce the voltage between the base and emitter regions of the parasitic bipolar transistor (B) to inhibit turn-on of the parasitic bipolar transistor.
    • 半导体主体(2)具有与第一主表面(2c)相邻的第一和第二主表面(2c和2d),其具有一个导电类型的第一区域(2b)。 绝缘栅场效应晶体管(6)形成在第一区域(2c)内并具有源极和漏极(S和D)和绝缘栅电极(G)。 至少一个其它部件(R4)耦合在绝缘栅场效应晶体管(6)的绝缘栅极(G)和栅极输入端(GT)之间。 另外的区域需要设置在第一区域(2b)内的相反导电类型的第二区域(21),使得另外的部件(R4),第二区域(21)和第一区域(2b)的区域(26) )形成寄生双极晶体管(B)。 第一主表面(2c)上的绝缘层(30)承载耦合在寄生双极晶体管(B)的基极区域(8)和栅极输入端子(GT)之间的第一整流元件(D1)和第二整流元件 耦合在寄生双极晶体管(B)的发射极区域(26)和栅极输入端子(GT)之间的元件(D2),用于当源极和绝缘栅极(S和G)之间的电压差反转时, 与寄生双极型晶体管(B)的基极和发射极区域串联的第一和第二整流元件(D1和D2)变为正向偏置,以减小寄生双极晶体管(B)的基极和发射极区域之间的电压, 以抑制寄生双极晶体管的导通。
    • 4. 发明授权
    • IGFET power semiconductor circuit with GAE control and fault detection
circuits
    • 具有GAE控制和故障检测电路的IGFET功率半导体电路
    • US5506539A
    • 1996-04-09
    • US263701
    • 1994-06-22
    • Brendan P. KellyPaul T. Moody
    • Brendan P. KellyPaul T. Moody
    • H01L29/78H01L27/04H03K17/0412H03K17/08H03K17/082H03K17/687H03K17/16
    • H03K17/04123H03K17/0822
    • A power semiconductor device circuit has an insulated gate field effect power semiconductor device with first and second main electrodes and a gate electrode. A gate control circuit provides a conductive path between the gate electrode and a gate voltage supply terminal. The gate control circuit has a resistance coupled between the gate electrode and the gate voltage supply terminal. A switching device has first and second main electrodes coupled to the gate voltage supply terminal and the gate electrode, respectively, so that the main current path between the first and second main electrodes is coupled in parallel with the resistance, the switching device having a first non-conducting state and a second conducting state for providing, in the second conducting state, an additional resistance in parallel with the resistance. The switching device switches from one of the first and second states to the other when the voltage at the gate voltage supply terminal changes in order to turn the power semiconductor device on or off, or upon the detection of a fault condition within the power semiconductor device. In either case, the overall resistance of the conductive path between the gate electrode and the gate voltage supply terminal is altered.
    • 功率半导体器件电路具有具有第一和第二主电极和栅电极的绝缘栅场效应功率半导体器件。 栅极控制电路在栅极电极和栅极电压提供端子之间提供导电路径。 栅极控制电路具有耦合在栅极电极和栅极电压端子之间的电阻。 开关装置具有分别与栅极电压端子和栅电极耦合的第一和第二主电极,使得第一和第二主电极之间的主电流路径与电阻并联耦合,开关装置具有第一 非导通状态和第二导通状态,用于在第二导通状态下提供与电阻平行的附加电阻。 当栅极电压供应端的电压改变以便开启或关闭功率半导体器件时,或者在检测到功率半导体器件内的故障状态时,开关器件从第一状态和第二状态之一切换到另一状态 。 在这两种情况下,栅电极和栅极电压端子之间的导电路径的整体电阻改变。
    • 5. 发明授权
    • Power semiconductor device having a temperature sensor
    • 具有温度传感器的功率半导体器件
    • US5726481A
    • 1998-03-10
    • US673835
    • 1996-06-27
    • Paul T. Moody
    • Paul T. Moody
    • H01L27/02H01L29/06H01L29/78H01L29/861H01L35/00H01L31/058
    • H01L29/7804H01L27/0248H01L29/7803H01L29/861H01L29/0688H01L29/0692H01L29/0696H01L29/1095H01L29/402H01L2924/0002
    • A power semiconductor device (e.g. MOSFET or IGBT) has a temperature sensing means in the form of thin-film sensing element (D1) on a first insulating layer (2) on the device body (10). The sensing element is preferably a reverse-biased p-n junction thin-film polycrystalline silicon diode (D1). In order to screen the sensitive element (D1) from electrical noise, an electrically conductive layer (4) is present on a second electrically insulating layer (5) over the thin-film element (D1) and forms part of an electrical screen (3,4) which is present over and under the thin-film element (D1). This electrical screen (3,4) also comprises a semiconductive region (3) underlying the thin-film element (D1), with the overlying conductive layer (4) electrically connected to the semiconductive region (3) at a window (6) in the insulating layers (2,5). One electrical connection of the thin-film element (D1) may be formed by the screening conductive layer (4) extending through a contact window (46) in the second insulating layer (5) and connected to a stable reference potential (e.g. ground). The electrical screen (3,4) can be integrated around the thin-film element (D1) in the same process steps as are already used for power device fabrication, but with modified mask layouts for providing the desired geometry in accordance with the invention. The overlying screening conductive layer (4) may be a main electrode (e.g. source) of the power semiconductor device.
    • 功率半导体器件(例如MOSFET或IGBT)具有在器件本体(10)上的第一绝缘层(2)上的薄膜感测元件(D1)形式的温度感测装置。 感测元件优选为反向偏置p-n结薄膜多晶硅二极管(D1)。 为了从电噪声屏蔽敏感元件(D1),在薄膜元件(D1)上的第二电绝缘层(5)上存在导电层(4),并形成电屏幕(3)的一部分 ,4),其存在于薄膜元件(D1)之上和之下。 该电屏幕(3,4)还包括位于薄膜元件(D1)下方的半导电区域(3),其上覆导电层(4)在窗口(6)处电连接到半导体区域(3) 绝缘层(2,5)。 可以通过延伸穿过第二绝缘层(5)中的接触窗(46)并连接到稳定的参考电位(例如接地)的屏蔽导电层(4)形成薄膜元件(D1)的一个电连接, 。 电屏幕(3,4)可以以与已经用于功率器件制造的相同的工艺步骤集成在薄膜元件(D1)周围,但是具有用于提供根据本发明的所需几何形状的修改的掩模布局。 覆盖的屏蔽导电层(4)可以是功率半导体器件的主电极(例如源极)。
    • 6. 发明授权
    • Power semiconductor switch having a load open-circuit detection circuit
    • 具有负载开路检测电路的功率半导体开关
    • US5886543A
    • 1999-03-23
    • US953103
    • 1997-10-17
    • Paul T. Moody
    • Paul T. Moody
    • H01L29/78H01L27/04H03K17/00H03K17/18H03K17/687H03K5/153
    • H03K17/687H03K17/18
    • A power semiconductor device (2) has a first main electrode (S) for coupling to a first supply line (3), a second main electrode (D) coupled to a first terminal (4) for connection via a load (L) to a second voltage supply line (5) and an insulated gate electrode (G) coupled to a control terminal (GT) for supplying a gate control signal to enable conduction of the power semiconductor device (2). An open-circuit detection arrangement is integrated with the power semiconductor device (2) for providing an indication that a load (L) coupled to the power semiconductor device (2) is open-circuited. The detection arrangement has a reference current (Ir) providing arrangement (7, R3, R4, R7, Q1, Q2) and a current deriving arrangement (Q3, Q4) for deriving a current (Id) dependent on the voltage at the second main electrode (D). The detection arrangement provides an output signal (OS) to indicate that the load (L) is operating normally when the derived or detected current (Id) is greater than the reference current (Ir). This should allow accurate determination of the status of the load (L) because the use of the reference current (Ir) allows account to be taken of possible leakage current paths around the load (L) so that an indication that the load (L) is operating correctly and is not open-circuit is only given when the derived current (Id) is greater than the reference current (Ir).
    • 功率半导体器件(2)具有用于耦合到第一电源线(3)的第一主电极(S),耦合到第一端子(4)的第二主电极(D),用于经由负载(L)连接到 耦合到控制端子(GT)的第二电压供应线(5)和绝缘栅电极(G),用于提供栅极控制信号以使功率半导体器件(2)能够导通。 与功率半导体器件(2)集成有开路检测装置,用于提供耦合到功率半导体器件(2)的负载(L)是开路的指示。 检测装置具有参考电流(Ir)提供装置(7,R3,R4,R7,Q1,Q2)和用于导出取决于第二主电压的电流(Id)的电流导出装置(Q3,Q4) 电极(D)。 检测装置提供输出信号(OS)以指示当导出或检测电流(Id)大于参考电流(Ir)时负载(L)正常运行。 这可以准确地确定负载状态(L),因为使用参考电流(Ir)可以考虑负载(L)周围的可能的泄漏电流路径,以便指示负载(L) 只有当导出电流(Id)大于参考电流(Ir)时,才能正常工作,而不是开路。