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    • 1. 发明申请
    • ADVANCED RECEIVER WITH SLIDING WINDOW BLOCK LINEAR EQUALIZER
    • 具有滑动窗框线性均衡器的先进接收器
    • US20090190645A1
    • 2009-07-30
    • US12419333
    • 2009-04-07
    • Bin LiRobert A. DiFazioJung-Lin PanAlexander ReznikJohn David Kaewell, JR.Peter Edward Becker
    • Bin LiRobert A. DiFazioJung-Lin PanAlexander ReznikJohn David Kaewell, JR.Peter Edward Becker
    • H04L25/49H03H7/30
    • H04L25/03159H04B17/336
    • A receiver or an integrated circuit (IC) incorporated therein includes a fast Fourier transform (FFT)-based (or hybrid FFT-based) sliding window block level equalizer (BLE) for generating equalized samples. The BLE includes a noise power estimator, first and second channel estimators, an FFT-based chip level equalizer (CLEQ) and a channel monitor unit. The noise power estimator generates a noise power estimate based on two diverse sample data streams. The channel estimators generate respective channel estimates based on the sample data streams. The channel monitor unit generates a first channel monitor signal including truncated channel estimate vectors based on the channel estimates, and a second channel monitor signal which indicates an approximate rate of change of the truncated channel estimate vectors. The FFT-based CLEQ generates the equalized samples based on the noise power estimate, one-block samples of the first and second sample data streams, the channel estimates and the monitor signals.
    • 结合在其中的接收器或集成电路(IC)包括用于产生均衡样本的基于快速傅立叶变换(FFT)(或基于混合FFT)的滑动窗口块级均衡器(BLE)。 BLE包括噪声功率估计器,第一和第二信道估计器,基于FFT的码片级均衡器(CLEQ)和信道监视器单元。 噪声功率估计器基于两个不同的采样数据流产生噪声功率估计。 信道估计器基于样本数据流生成相应的信道估计。 信道监视单元基于信道估计产生包括截断的信道估计向量的第一信道监视信号,以及指示截断的信道估计向量的近似变化率的第二信道监视信号。 基于FFT的CLEQ基于噪声功率估计,第一和第二采样数据流的一个块采样,信道估计和监视信号来生成均衡的采样。
    • 2. 发明授权
    • Advanced receiver with sliding window block linear equalizer
    • 高级接收机带滑动窗口线性均衡器
    • US07570689B2
    • 2009-08-04
    • US11238318
    • 2005-09-29
    • Bin LiRobert A. DiFazioJung-Lin PanAlexander ReznikJohn David Kaewell, Jr.Peter Edward Becker
    • Bin LiRobert A. DiFazioJung-Lin PanAlexander ReznikJohn David Kaewell, Jr.Peter Edward Becker
    • H04L25/49H04L27/04H03H7/30
    • H04L25/03159H04B17/336
    • A receiver or an integrated circuit (IC) incorporated therein includes a fast Fourier transform (FFT)-based (or hybrid FFT-based) sliding window block level equalizer (BLE) for generating equalized samples. The BLE includes a noise power estimator, first and second channel estimators, an FFT-based chip level equalizer (CLEQ) and a channel monitor unit. The noise power estimator generates a noise power estimate based on two diverse sample data streams. The channel estimators generate respective channel estimates based on the sample data streams. The channel monitor unit generates a first channel monitor signal including truncated channel estimate vectors based on the channel estimates, and a second channel monitor signal which indicates an approximate rate of change of the truncated channel estimate vectors. The FFT-based CLEQ generates the equalized samples based on the noise power estimate, one-block samples of the first and second sample data streams, the channel estimates and the monitor signals.
    • 结合在其中的接收器或集成电路(IC)包括用于产生均衡样本的基于快速傅立叶变换(FFT)(或基于混合FFT)的滑动窗口块级均衡器(BLE)。 BLE包括噪声功率估计器,第一和第二信道估计器,基于FFT的码片级均衡器(CLEQ)和信道监视器单元。 噪声功率估计器基于两个不同的采样数据流产生噪声功率估计。 信道估计器基于样本数据流生成相应的信道估计。 信道监视单元基于信道估计产生包括截断的信道估计向量的第一信道监视信号,以及指示截断的信道估计向量的近似变化率的第二信道监视信号。 基于FFT的CLEQ基于噪声功率估计,第一和第二采样数据流的一个块采样,信道估计和监视信号来生成均衡的采样。
    • 6. 发明授权
    • Method and apparatus for performing chip level equalization using joint processing
    • 使用联合处理进行芯片级均衡的方法和装置
    • US07539262B2
    • 2009-05-26
    • US11259430
    • 2005-10-26
    • Jung-Lin PanRobert A. DiFazio
    • Jung-Lin PanRobert A. DiFazio
    • H04B7/02
    • H04B7/0854H04B1/71052H04B1/71055H04L25/0206H04L25/03171H04L2025/03426
    • A method and apparatus for performing chip level equalization (CLE) using joint processing to enhance performance and system throughput using a transmitter having a plurality of transmit antennas and a receiver having a plurality of receive antennas. A channel response matrix is formed between the transmit antennas and the receive antennas to generate a joint channel correlation matrix between the transmit antennas and the receive antennas using a block-FFT (B-FFT) decomposition of the channel response matrix. Estimates of transmitted chip sequences from each of the transmit antennas are generated using minimum mean square error (MMSE) and the joint channel correlation matrix are combined. The combined estimate of the transmitted chip sequences are despread to recover transmitted data.
    • 一种用于使用联合处理来执行芯片级均衡(CLE)的方法和装置,以使用具有多个发射天线的发射机和具有多个接收天线的接收机来提高性能和系统吞吐量。 在发射天线和接收天线之间形成信道响应矩阵,以使用信道响应矩阵的块FFT(B-FFT)分解来生成发射天线和接收天线之间的联合信道相关矩阵。 使用最小均方误差(MMSE)生成来自每个发射天线的发射码片序列的估计,并且组合联合信道相关矩阵。 传输的码片序列的组合估计被解扩以恢复发送的数据。