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1. 发明授权

US06813628B2 Method and apparatus for performing equality comparison in redundant form arithmetic 有权
标题翻译：用于在冗余形式算术中执行等式比较的方法和装置
公开(公告)号：US06813628B2
公开(公告)日：2004-11-02
申请号：US09746771
申请日：2000-12-22
申请人： Bharat Bhushan , Edward Grochowski , Vinod Sharma , John Crawford
发明人： Bharat Bhushan , Edward Grochowski , Vinod Sharma , John Crawford
IPC分类号： G06F704
CPC分类号： G06F7/5095 , G06F7/02 , G06F7/026 , G06F7/48 , G06F7/4824
摘要： A method and apparatus is disclosed to compare numbers for equality. The numbers represented in a redundant form, including numbers received from a bypass circuit are subtracted. More specifically, a complemented form is generated and supplied to an arithmetic circuit for at least one number represented in the redundant form. Input to the arithmetic circuit is adjusted to augment a result generated through the arithmetic circuit to generate a valid outcome represented in the redundant form as a result of a subtraction operation. Results of the subtraction operation are compared to zero in redundant form using a non-propagative circuit and without requiring carry propagation, thereby producing an equality comparison of the number in redundant form.
摘要翻译：公开了一种方法和装置，用于比较相等的数字。减去以冗余形式表示的数字，包括从旁路电路接收的数字。更具体地，产生补码形式并将其提供给用冗余形式表示的至少一个数字的运算电路。调整运算电路的输入以增加通过算术电路产生的结果，以产生作为减法运算的结果以冗余形式表示的有效结果。使用非传播电路将减法操作的结果与冗余形式进行比较，而不需要进位传播，从而产生冗余形式的数量的等式比较。

2. 发明授权

US06826588B2 Method and apparatus for a fast comparison in redundant form arithmetic 有权
标题翻译：冗余形式算法快速比较的方法和装置
公开(公告)号：US06826588B2
公开(公告)日：2004-11-30
申请号：US10032026
申请日：2001-12-17
申请人： Bharat Bhushan , Edward Grochowski , Vinod Sharma , John Crawford
发明人： Bharat Bhushan , Edward Grochowski , Vinod Sharma , John Crawford
IPC分类号： G06F702
CPC分类号： G06F7/48 , G06F7/02 , G06F7/026 , G06F7/4824
摘要： The present invention provides an efficient method for bypassing outputs while in redundant form to an arithmetic circuit that is capable of adding or subtracting numbers in redundant from and comparing the magnitudes of numbers received in redundant form for equality and inequality relationships. For one embodiment of the invention, an arithmetic circuit subtracts numbers received in redundant form and compares the result to zero represented in redundant form without carry propagation. In parallel with the subtraction and comparison, the most significant bits of each number received in redundant form are generated and compared for equality, and a carry-out is generated for the subtraction. These results are combined by magnitude comparison logic to produce a magnitude comparison for the numbers received in redundant form.
摘要翻译：本发明提供了一种用于以冗余形式旁路输出到算术电路的有效方法，该算术电路能够从冗余形式中增加或减少冗余中的数字并比较用于相等和不等式关系的以冗余形式接收的数字的数量。对于本发明的一个实施例，运算电路减去以冗余形式接收的数字，并将结果与以多余形式表示的零进行比较，而无需进位传播。与减法和比较并行地，以冗余形式接收的每个数字的最高有效位被生成和比较以相等，并且为减法产生进位输出。这些结果通过幅度比较逻辑组合，以产生以冗余形式接收的数字的幅度比较。

3. 发明授权

US06763368B2 Method and apparatus for performing single-cycle addition or subtraction and comparison in redundant form arithmetic 有权
标题翻译：用于在冗余形式算术中执行单周期加法或减法和比较的方法和装置
公开(公告)号：US06763368B2
公开(公告)日：2004-07-13
申请号：US09746940
申请日：2000-12-22
申请人： Bharat Bhushan , Vinod Sharma , Edward Grochowski , John Crawford
发明人： Bharat Bhushan , Vinod Sharma , Edward Grochowski , John Crawford
IPC分类号： G06F704
CPC分类号： G06F7/5095 , G06F7/02 , G06F7/4824
摘要： A method and apparatus for adding numbers represented in redundant form or for subtracting numbers received in redundant form and for comparing results in redundant form for equality to an expected value. A redundant arithmetic circuit performs an arithmetic operation on operands received in redundant form to generate a result represented in redundant form. A comparator circuit is coupled with the arithmetic circuit to receive the result in redundant form and to perform an equality comparison of the result to the expected value, and to indicate the truth of said equality comparison independent of carry signal propagation from the least significant digit to the most significant digit.
摘要翻译：一种用于添加以冗余形式表示的数字或用于减去以冗余形式接收的数字并用于将用于相等的冗余形式的结果与期望值进行比较的方法和装置。冗余算术电路对以冗余形式接收的操作数执行算术运算，以生成以冗余形式表示的结果。比较器电路与算术电路耦合以以冗余形式接收结果，并且执行结果与期望值的相等比较，并且指示所述等式比较的真实性，独立于从最低有效数字到进位信号传播的进位信号最重要的数字。

4. 发明授权

US07395304B2 Method and apparatus for performing single-cycle addition or subtraction and comparison in redundant form arithmetic 有权
标题翻译：用于在冗余形式算术中执行单周期加法或减法和比较的方法和装置
公开(公告)号：US07395304B2
公开(公告)日：2008-07-01
申请号：US10890848
申请日：2004-07-13
申请人： Bharat Bhushan , Vinod Sharma , Edward Grochowski , John Crawford
发明人： Bharat Bhushan , Vinod Sharma , Edward Grochowski , John Crawford
IPC分类号： G06F7/04
CPC分类号： G06F7/5095 , G06F7/02 , G06F7/4824
摘要： A method and apparatus is disclosed that uses an arithmetic circuit for adding numbers represented in a redundant form to also subtract numbers received in redundant form, including numbers received from a bypass circuit. A non-propagative comparator circuit is then used to compare a given value with a result from the arithmetic circuit to determine if the result is equal to the given value. All of the operations described above can be accomplished without propagating carry signals throughout the circuitry.The method includes generating a complemented redundant form of at least one number supplied to the arithmetic circuit in redundant form. It also includes providing adjustment input to the arithmetic circuit to augment a result produced through the arithmetic circuit. This adjustment causes the arithmetic circuit to generate a valid outcome in redundant form as a result of a subtraction operation if the arithmetic operation is subtraction. Then the result is compared to a given value using a non-propagative comparator to determine equality or inequality of the result to the given value.
摘要翻译：公开了一种方法和装置，其使用运算电路来添加以冗余形式表示的数字，还可以减去以冗余形式接收的数字，包括从旁路电路接收的数字。然后使用非传播比较器电路将给定值与运算电路的结果进行比较，以确定结果是否等于给定值。可以在整个电路中不传播进位信号来实现上述所有操作。该方法包括以冗余的形式生成提供给运算电路的至少一个数的补码冗余形式。它还包括向算术电路提供调整输入以增加通过运算电路产生的结果。如果算术运算是减法，则该调整使得运算电路作为减法运算的结果以冗余形式产生有效结果。然后将结果与使用非传播比较器的给定值进行比较，以确定结果与给定值的相等或不等式。

5. 发明授权

US06327646B1 Translation look-aside buffer utilizing high-order bits for fast access 有权
标题翻译：翻译后备缓冲器利用高阶位进行快速访问
公开(公告)号：US06327646B1
公开(公告)日：2001-12-04
申请号：US09267336
申请日：1999-03-12
申请人： Vinod Sharma , Bharat Bhushan
发明人： Vinod Sharma , Bharat Bhushan
IPC分类号： G06F1210
CPC分类号： G06F12/1027
摘要： A fast translation look-aside buffer for translating a linear address RL=A+B to a physical address, where A and B are two N bit operands. Inputs to the translation look-aside buffer are the n highest-order bits of A and B, where n
摘要翻译：用于将线性地址RL = A + B转换为物理地址的快速翻译后备缓冲器，其中A和B是两个N位操作数。转换后备缓冲器的输入是A和B的n个最高位，其中n

6. 发明授权

US08777874B2 Acoustic based cough detection 有权
标题翻译：声学咳嗽检测
公开(公告)号：US08777874B2
公开(公告)日：2014-07-15
申请号：US13114838
申请日：2011-05-24
申请人： Xusheng Zhang , Vinod Sharma , Eduardo N. Warman
发明人： Xusheng Zhang , Vinod Sharma , Eduardo N. Warman
IPC分类号： A61B7/00
CPC分类号： A61B5/0823 , A61B5/0205 , A61B5/11 , A61B5/686 , A61B2562/0204 , A61B2562/0219 , A61N1/3621 , A61N1/3627
摘要： The present disclosure is directed to the detection of coughs and coughing episodes using acoustic signals. In various examples, an implantable medical device processes an acoustic signal obtained from an acoustic sensor to determine whether a patient has coughed. In some examples, the implantable medical device also performs a cough severity assessment. In some examples, the cough severity assessment may include a determination of the depth of the cough, the duration of the coughing episode, or whether the cough was wet or dry.
摘要翻译：本公开涉及使用声信号检测咳嗽和咳嗽发作。在各种示例中，可植入医疗装置处理从声传感器获得的声信号，以确定患者是否已经咳嗽。在一些示例中，可植入医疗装置还执行咳嗽严重度评估。在一些实例中，咳嗽严重度评估可以包括确定咳嗽的深度，咳嗽发作的持续时间，或者咳嗽是湿还是干燥。

7. 发明授权

US08565898B2 Rate control during AF using cellular intervention to modulate AV node 有权
标题翻译：使用细胞干预调整AV节点的AF期间的速率控制
公开(公告)号：US08565898B2
公开(公告)日：2013-10-22
申请号：US11116621
申请日：2005-04-28
申请人： Vinod Sharma , Daniel C. Sigg
发明人： Vinod Sharma , Daniel C. Sigg
IPC分类号： A61N1/00 , A61K38/00 , A61K38/16
CPC分类号： A61N1/362 , A61K9/0019 , A61K31/221 , A61K38/177 , A61N1/0568
摘要： A biologic intervention method and apparatus generates a persistent modification to an AV node that is physiologically stable after the agent has matured but is alterable with subsequent application of an agent. Specifically, the generic agent is used to modulate a node in a cardiac conduction system including rate control using one and a combination of a family of K+ channel or equivalent. Specifically, the channel is implemented to slow conduction by generating an outward current during optimization of action potential and repolarization phase thus decreasing the current that is available to excite downstream cells. A Kv 1.3 channel, for example, may be used as the biologic channel. The invention enables reversal of the modulation or adjustment for various heart rates (BPM) based on medical and patient-specific needs.
摘要翻译：生物干预方法和装置对于在该药剂已经成熟但随后随后施用药剂而可变化的生理稳定的AV节点产生持久性修饰。具体地，通用代理用于调制心脏传导系统中的节点，包括使用一个K +通道或等效物系的组合的速率控制。具体地，通过在动作电位和复极相优化期间产生向外的电流来实现缓慢传导，从而减少可用于激发下游单元的电流。例如，可以使用Kv1.3通道作为生物通道。本发明能够根据医疗和患者特定的需要逆转各种心率（BPM）的调节或调整。

8. 发明申请

US20110300107A1 Compositions and Methods to Treat Cardiac Pacing Conditions 有权
标题翻译：心脏起搏条件的组合和方法
公开(公告)号：US20110300107A1
公开(公告)日：2011-12-08
申请号：US13096135
申请日：2011-04-28
申请人： Vinod Sharma , Xiaohong Qiu
发明人： Vinod Sharma , Xiaohong Qiu
IPC分类号： A61K31/7088 , A61P9/00 , C12N5/10 , A61K35/00
CPC分类号： C12N15/86 , A61K35/13 , A61K48/005 , A61K48/0075 , C07K14/4705 , C12N2750/14143
摘要： The method may include administering to a subject in need thereof an effective amount of an HCN polynucleotide. The HCN polynucleotide includes a nucleotide sequence encoding an HCN polypeptide having channel activity. The amino acid sequence of the HCN polypeptide and the amino acid sequence of a reference polypeptide have at least 80% identity, where the reference polypeptide begins with an amino acid selected from amino acids 92-214 and ends with an amino acid selected from amino acids 723-1188 of SEQ ID NO:8. An example of a reference polypeptide is amino acids 214-723 of SEQ ID NO:8. The HCN polynucleotide may be DNA or RNA.
摘要翻译：该方法可以包括向有需要的受试者施用有效量的HCN多核苷酸。 HCN多核苷酸包括编码具有通道活性的HCN多肽的核苷酸序列。 HCN多肽的氨基酸序列和参考多肽的氨基酸序列具有至少80％的同一性，其中参考多肽以选自氨基酸92-214的氨基酸开始，并以选自氨基酸的氨基酸结束 SEQ ID NO：8的723-1188。参考多肽的实例是SEQ ID NO：8的氨基酸214-723。 HCN多核苷酸可以是DNA或RNA。

9. 发明申请

US20090034128A1 Method and apparatus for independent piezoelectric excitation in the micro-actuator assemblies of a hard disk drive for improved drive reliability 审中-公开
标题翻译：用于硬盘驱动器的微致动器组件中的独立压电激励的方法和装置，用于提高驱动可靠性
公开(公告)号：US20090034128A1
公开(公告)日：2009-02-05
申请号：US11897936
申请日：2007-08-31
申请人： Vinod Sharma , Hyung Jai Lee
发明人： Vinod Sharma , Hyung Jai Lee
IPC分类号： G11B21/24
CPC分类号： G11B5/4826 , G11B5/4873 , G11B5/5552
摘要： A hard disk drive using a micro-actuator assembly to position a slider over a track on a rotating disk surface. The micro-actuator assembly includes a first piezoelectric device and a second piezoelectric device, both mechanically coupled to the slider. The first piezoelectric device includes a first terminal electrically coupled to a first voltage line and a second terminal electrically coupled to a ground line. The second piezoelectric device includes a third terminal electrically coupled to a ground line and a fourth terminal electrically coupled to a voltage line. A voltage applied to the first voltage line stimulates only the first piezoelectric device to alter a lateral position of the slider over the rotating disk surface, and a second voltage applied to the second voltage line stimulates only the second piezoelectric device to alter the lateral position of the slider over the rotating disk surface.
摘要翻译：使用微型致动器组件的硬盘驱动器将滑块定位在旋转盘表面上的轨道上。微致动器组件包括机械地联接到滑块的第一压电装置和第二压电装置。第一压电器件包括电耦合到第一电压线的第一端子和电耦合到接地线的第二端子。第二压电器件包括电耦合到接地线的第三端子和电耦合到电压线的第四端子。施加到第一电压线的电压仅刺激第一压电装置来改变滑块在旋转盘表面上的横向位置，并且施加到第二电压线的第二电压仅刺激第二压电装置改变第二压电装置的横向位置滑块越过旋转盘表面。

10. 发明申请

US20080259480A1 Glide test and calibration using flying height on demand 审中-公开
标题翻译：使用飞行高度进行滑行测试和校准
公开(公告)号：US20080259480A1
公开(公告)日：2008-10-23
申请号：US11787879
申请日：2007-04-17
申请人： Hoa Pham , Vinod Sharma , Sang Lee
发明人： Hoa Pham , Vinod Sharma , Sang Lee
IPC分类号： G11B5/455 , G11B15/64 , G11B5/56
CPC分类号： G11B5/455 , G11B5/60 , G11B5/6064
摘要： A glide head that can be used to certify disks of hard disk drives. The glide head includes a heater that can change the temperature of a slider surface of the head and vary the head flying height. The slider surface may induce the negative pressure so that the glide head more accurately simulates a head used in a production disk drive. A piezoelectric transducer may be coupled to the glide head so that contact between the head and a disk may be sensed and recorded in a disk certification routine.
摘要翻译：可用于认证硬盘驱动器磁盘的滑动头。滑行头包括可以改变头部的滑块表面的温度并改变头部飞行高度的加热器。滑块表面可以引起负压，使得滑动头更准确地模拟生产磁盘驱动器中使用的磁头。压电传感器可以耦合到滑动头，使得头和盘之间的接触可以被感测并记录在磁盘认证程序中。

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