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    • 2. 发明申请
    • LIQUID CRYSTAL DISPLAY HAVING DEFECT REPAIR MECHANISM
    • 具有缺陷修复机构的液晶显示
    • US20070263134A1
    • 2007-11-15
    • US11744457
    • 2007-05-04
    • Beom-Jun KimJong-Hwan LeeSang-Jin JeonSung-Man KimBong-Jun LeeHong-Woo Lee
    • Beom-Jun KimJong-Hwan LeeSang-Jin JeonSung-Man KimBong-Jun LeeHong-Woo Lee
    • G02F1/1333
    • G02F1/136213G02F1/136259G02F1/136286
    • A liquid crystal display that is subject to pixel-high defects due to manufacturing anomalies is provided with programmable repair means for each pixel electrode. In one embodiment, a transistor-array substrate is provided with plural gate lines that are separated from each other by a first interval, plural data lines that are insulated from the gate lines while crossing the gate lines, and separated from each other by a second interval larger than the first interval, thereby defining plural pixel areas. Each pixel area has a corresponding pixel unit comprising a switching device, pixel electrode, and repair electrode. The repair electrode branches from a neighboring gate line and extends such that the repair electrode is in overlapping spaced-apart relation with the pixel electrode and selectively connectable to the pixel electrode. Accordingly, a pixel where a high pixel defect occurs can be repaired by selective connection with the repair electrode, thereby improving display quality of the liquid crystal display.
    • 由于制造异常而受到像素高缺陷的液晶显示器,为每个像素电极提供可编程修复装置。 在一个实施例中,晶体管阵列基板设置有多条栅极线,它们彼此分开第一间隔,多条数据线在与栅极线交叉的同时与栅极线绝缘并且彼此分开第二个 间隔大于第一间隔,从而限定多个像素区域。 每个像素区域具有包括开关器件,像素电极和修复电极的对应像素单元。 修复电极从相邻的栅极线分支并延伸,使得修复电极与像素电极重叠间隔开,并且可选择性地连接到像素电极。 因此,可以通过与修复电极的选择性连接来修复发生高像素缺陷的像素,从而提高液晶显示器的显示质量。
    • 6. 发明授权
    • Gate driver and display apparatus having the same
    • 门驱动器和显示装置具有相同的功能
    • US08194026B2
    • 2012-06-05
    • US11782957
    • 2007-07-25
    • Hong-Woo LeeMyung-Koo HurJong-Hwan LeeBeom-Jun KimSung-Man Kim
    • Hong-Woo LeeMyung-Koo HurJong-Hwan LeeBeom-Jun KimSung-Man Kim
    • G09G3/36
    • G09G3/3677G09G2300/0408G09G2310/0267G09G2320/02G09G2330/08G11C19/28
    • A gate driver comprises a shift register that has a plurality of stages connected together and outputs a gate signal comprising a first pulse and a second pulse to a gate line. A stage includes a holding part, a pre-charging part, a pull-up part, and a pull-down part. The holding part discharges an output terminal to an off-voltage in response to a first clock signal. The pre-charging part turns off the holding part and outputs the first clock signal as the first pulse to the output terminal in response to an output signal of a previous stage. The pull-up part outputs a second clock signal as the second pulse to the output terminal in response to the output signal of the previous stage. The pull-down part discharges the first output terminal to the off-voltage in response to an output signal of a next stage.
    • 栅极驱动器包括具有连接在一起的多个级的移位寄存器,并将包括第一脉冲和第二脉冲的门信号输出到栅极线。 舞台包括保持部分,预充电部分,上拉部分和下拉部分。 保持部分响应于第一时钟信号将输出端子放电到截止电压。 预充电部件关闭保持部件,并响应于前一级的输出信号将第一时钟信号作为第一脉冲输出到输出端子。 上拉部分响应于前一级的输出信号,将第二时钟信号作为第二脉冲输出到输出端。 下拉部分响应于下一级的输出信号将第一输出端子放电到截止电压。
    • 7. 发明授权
    • Gate driving circuit and display apparatus having the same
    • 栅极驱动电路及其显示装置
    • US08098227B2
    • 2012-01-17
    • US12338182
    • 2008-12-18
    • Hong-Woo LeeJong-Hwan LeeBeom-Jun KimSung-Man KimGyu-Tae KimKyoung-Jun Jang
    • Hong-Woo LeeJong-Hwan LeeBeom-Jun KimSung-Man KimGyu-Tae KimKyoung-Jun Jang
    • G09G3/36
    • G09G3/3677G11C19/184H03K17/165
    • A gate driving circuit includes cascaded stages, each including a pull-up part, a carry part, a pull-up driving part, a holding part and an inverter. The pull-up part pulls up a gate voltage to an input clock. The carry part pulls up a carry voltage to the input clock. The pull-up driving part is connected to a control terminal (Q-node) common to the carry part and the pull-up part, and receives a previous carry voltage from a previous stage to turn on the pull-up part and the carry part. The holding part holds the gate voltage at an off-voltage, and the inverter controls at least one of turning on the holding part and turning off the holding part based on an inverter clock. A high level of the inverter clock in a given horizontal period (1H) temporally precedes a high level of the input clock by a predetermined time interval.
    • 栅极驱动电路包括级联级,每级包括上拉部分,进位部分,上拉驱动部分,保持部分和逆变器。 上拉部分将输入时钟的栅极电压上拉。 进位部分将输入电压提升到输入时钟。 上拉驱动部分连接到与进位部分和上拉部分相同的控制端子(Q-节点),并且从前一级接收先前的进位电压以打开上拉部分和进位 部分。 保持部将栅极电压保持在截止电压,逆变器基于逆变器时钟来控制保持部的开启和关闭保持部中的至少一个。 给定水平周期(1H)中的高电平的反相器时钟在时间上在预定时间间隔的输入时钟的高电平之前。
    • 10. 发明申请
    • Display apparatus
    • 显示装置
    • US20070070021A1
    • 2007-03-29
    • US11528214
    • 2006-09-26
    • Byeong-Jae AhinBeom-Jun KimSung-Man KimBong-Jun LeeHyeong-Jun Park
    • Byeong-Jae AhinBeom-Jun KimSung-Man KimBong-Jun LeeHyeong-Jun Park
    • G09G3/36
    • G09G3/20G09G3/3677G09G2310/0267G09G2330/08G11C19/184H03K5/15093
    • A scan driver sequentially activates scan lines of a display apparatus having m-number of scan lines. The scan driver includes a pull-up driving section and a pull-down driving section. The pull-up driving section includes a pull-up transistor that is electrically connected to an ith scan line to activate the ith scan line to be in a high level state. The pull-down driving section includes a pull-down transistor that is electrically connected to the ith scan line to inactivate the ith scan line to be in a low level state when (i+1)th scan line is activated. A gate electrode of the pull-up transistor is electrically separated from the ith scan line. The above ‘m’ is an integer greater than 1, and ‘i’ is an integer no greater than ‘m’. Therefore, display defects may be minimized, and detecting a cause of the display defect may be simplified to enhance productivity.
    • 扫描驱动器顺序激活具有m条扫描线的显示装置的扫描线。 扫描驱动器包括上拉驱动部分和下拉驱动部分。 上拉驱动部分包括电连接到第i扫描线的上拉晶体管,以将第i条扫描线激活成高电平状态。 下拉驱动部分包括一个下拉晶体管,当第(i + 1)扫描线被激活时,该下拉晶体管电连接到第i条扫描线以使第i条扫描线失效为处于低电平状态。 上拉晶体管的栅电极与第i扫描线电隔离。 上述'm'是大于1的整数,'i'是不大于'm'的整数。 因此,显示缺陷可能被最小化,并且可以简化检测显示缺陷的原因以提高生产率。